Abstract: An optical storage system employing a laser beam which is directed and focused onto an optical disk for reading and/or writing data in a track of the disk. Positioning control is achieved by providing for track following and track seeking using a plurality of interactive servo-loops. Proper focusing is maintained using focusing control circuitry which produces a focus error signal that is applied to a focus motor. This focusing control circuitry is able to return the objective lens assembly to its in-focus position so long as the objective lens assembly remains within a predetermined capture range. In the event that the objective lens assembly is outside of this capture range, a waveform generator is enabled which produces a correction signal that causes the focus motor to move the objective lens assembly back within the capture range with a velocity and for a time period sufficient to permit the focusing control circuitry to regain control and return the objective lens assembly to its in-focus position.

Abstract: Improved disk pack media for data storage is illustrated as comprising a pack of flexible magnetic recording disks which may be partitioned "end-wise".In one embodiment the disks are perforated for partitioning and also stacked in a different respective rotational orientation to facilitate end-wise partitioning. The disks are hole-encoded and either cut in different hole patterns, or else cut in a common hole pattern and stacked to dispose each in a unique rotational "misregistration" relative to all others--the result being to generate sets of "partition bores" permitting associated automatic apparatus to selectively partition the pack and expose any desired disk-side for operation thereon.In another embodiment the disks are stacked between apertured spacers about a hollow spindle, the spacers and disks being partition-apertured and stacked to generate a set of partition bores.

Abstract: An optical storage system employing a laser beam which is directed and focused onto an optical disk for reading and/or writing data in a track of the disk. Proper focusing is maintained using focusing control circuitry which produces a focus error signal that is applied to a focus motor. This focusing control circuitry is able to return the objective lens assembly to its in-focus position so long as the objective lens assembly remains within a predetermined capture range. In the event that the objective lens assembly is outside of this capture range, a waveform generator is enabled which produces a correction signal that causes the focus motor to move the objective lens assembly back within the capture range with a velocity and for a time period sufficient to permit the focusing control circuitry to regain control and return the objective lens assembly to its in-focus position.

Abstract: A programmable unit for attachment to a work-station whereby power to the work-station will be shut off after a pre-set time-period, unless work-station activity occurs before the outset of the time-period, when the pre-set time-period will initiate again.

Abstract: Each digital module in a network is provided with a local power switching control subsystem wherein the local module uses a local power switching control logic card which controls main power and subordinate power units in a predetermined sequence. Power up/down conditions or incremental/decremental voltage conditions can be effected by a local operator or by an instruction from a remote master logic unit. The power subsystem can sense failure conditions and communicate this information to the remote master unit or to a local operator.

Abstract: Described is a novel "bevel tool" and associated technique for holding prescribed magnetic head workpieces and placing them in prescribed constant angular relation with a rotary lapping means; this tool preferably including a workpiece-receiving pocket adapted to be spread apart and to resiliently grip the work, with one or more guide-faces surrounding this pocket and adapted to indicate a prescribed orientation of the work against a prescribed "lapping plane".

Abstract: A magnetically sealed integrated circuit package includes a substrate having a cavity for holding multiple integrated circuit die, a lid for covering the cavity to protect the die, a ferromagnetic seal ring which is fixed to the substrate around the die, and a magnet which is fixed to the lid and coincides in shape to the seal ring for magnetically attracting the seal ring to hold the lid in place when the lid covers the cavity.

Abstract: An integrated complementary transistor circuit at an intermediate stage of manufacturing comprises a semiconductor substrate having dopant atoms of a first conductivity type and having a substantially flat major surface; a patterned layer of material that is essentially impervious to oxygen diffusion covering first and second spaced apart areas on the surface and having openings which expose the surface between the areas; a channel stop region having dopant atoms of the first conductivity type with a larger doping concentration than the substrate throughout that portion of the surface which is exposed by the openings; and a well region having dopant atoms of a second conductivity type opposite to the first type in the substrate under all of the second area and extending under an adjacent portion of the channel stop region but terminating before reaching the first area; the well region also having a depth and doping concentration at the center of the second area which is substantially smaller than the depth an

Abstract: A system for controlling communication in a network of digital modules where each digital module has a maintenance processor which connects the digital module through a network bus to every other digital module's maintenance processor. Each transmitting module can lock up the network bus temporarily for data transmission operations to a specifically addressed receiver module. This system basically permits free communication access of any digital module to any other digital module.

Abstract: A method and apparatus are shown for use in adding electrical connections to existing printed circuit boards. To this end, apparatus in the form of a multilayered pad is provided which has an adhesive layer over at least part of one face which is responsive to heat so that the pad can be bonded by heat to the surface of a printed circuit board. The other face of the pad includes a layer of stainless steel to which nickel wire can be stitched, or welded. A method according to the invention includes cutting a sheet of pads into individual pads, placing a plurality of pads, adhesive side down, on the surface of a printed circuit board, heating the pads to bond them to the board, and stitching (welding) wire to a succession of pads to complete a series of new connections. Some pads include plated-through-holes enabling connections to be completed from the pads to existing circuitry on the boards and to components mounted in the holes by the use of flow soldering techniques.

Abstract: A parallel register-transfer mechanism has been disclosed above for use in the evaluation of expressions of a variable-free applicative language stored as binary directed graphs. The expression is reduced through a series of transformations until a result is obtained. A register file is provided with several crossbar networks interconnecting the various registers in the file for simultaneous transfer of their contents.

Abstract: A power supply circuit including A.C. input of either 110 volts or 220 volts coupled to a full diode bridge, across the output of which are provided series connected capacitors across which the desired system operating voltage appears. A voltage-controlled current generator for driving a diac and triac is connected between the input supply and the bridge capacitors. At 110 volt input, the current generator closes the triac and the circuitry operates as a voltage doubler to provide the desired system voltage. At 220 volt input, the triac remains open, and the full bridge and capacitors provide the same desired system voltage.

Abstract: Multi-phase subroutine control apparatus for use in a data processing system which provides for the concurrent execution of a plurality of tasks in a multiprogramming and multiprocessing environment. Subroutine control operations are staged so as to share common hardware in a manner which in effect provides a plurality of phased concurrently operating subroutine control circuits wherein each circuit provides control for a different one of a plurality of concurrently executing tasks. The common subroutine hardware includes a multi-level stack for each task and a fast access return address register which permits a return address to be rapidly made available when required during execution of a task.

Abstract: A circuit which operates on input signals representing multiformatted sequences of idle characters, voice characters, and data characters comprises: a first state machine consisting essentially of a logic array, a register, and a counter. One section of the register is coupled to receive the input signals and another section of the register together with the counter is coupled to receive respective signals from the logic array. The logic array has input terminals coupled to receive signals from the register and the counter, and in response, generate control signals indicating in which format and which location therein each character is being received. Second, third, and fourth state machines are coupled to receive respective subsets of the control signals from the first state machine.

Abstract: An integrated circuit for measuring conductor misalignment comprises: a set of 2n+1 conductor pairs where n is a predetermined positive integer; each conductor pair includes a U-shaped conductor having a central axis; each conductor pair also includes a rectangular shaped conductor having a central axis and which is narrow enough to fit between the legs of the U-shaped conductor provided their central axis are aligned; and the rectangular shaped conductor of each conductor pair has its central axis a distance .delta.+k.DELTA.d from the central axis of the U-shaped conductor where .DELTA.d is a fixed increment, k is an integer between +n and -n that differs for each conductor pair, and .delta.is a misalignment between the central axis of each conductor pair.

Abstract: The present disclosure describes an assembly which has particular application in the testing of printed circuit boards. More specifically, the assembly is comprised of an apertured holding plate which is registered with the board under test, and a probe subassembly. The latter includes a body member having a spring-actuated plunger type probe and a hook-like member. In operation, the body member is advanced toward the plate and the probe and hook-like member enter respective plate apertures. As electrical contact is made by the probe with a desired test location on the board, the hook-like member locks the body onto the plate. The body member is so formed that subsequent pressure applied thereto will release it from its locked condition.

Abstract: A method of synchronizing the sequence by which a variety of unrelated activities are executed in a digital processor when the activities are randomly called by multiple callers includes the steps of: providing a single processor queue for holding respective pointers to each different kind of activity that the processor performs; entering the pointer of an activity in the processor queue the first time that the activity is called; providing respective activity queues for each different kind of activity that the processor performs; entering a pointer to the caller of an activity in the respective queue for the called activity each time the activity is called subsequent to its first call; repeatedly executing a single activity pointed to by one pointer in the processor queue until that activity is executed once for each of its callers, provided that if the single activity calls another activity then, executing the single activity only up to the point where the call occurs; and proceeding in the same fashion wit

Abstract: A peripheral-controller (called a Data Link Processor) optimizes the rate of data transfers between a host computer and magnetic tape peripherals by use of a block counter sensing system for monitoring the occupation-status of word-blocks in a buffer memory. The peripheral-controller provides Automatic Read/Write Logic for buffer-peripheral tape transfers and a burst mode routine for rapid host-buffer transfers of data words. The sensing system provides means to inform a microcode sequencer when certain action routines should be executed in order to maintain steady error-free data transfer operations which minimize the need for retries of data transfer cycles previously initiated.

Abstract: An integrated circuit package comprises a plurality of thin flat epoxy-glass layers which are arranged in a stack and are laminated together by prepreg layers that lie between the epoxy-glass layers. This stack has a cavity which is staircase-shaped and extends from an outer epoxy-glass layer to an internal epoxy-glass layer, goes parallel along the internal epoxy-glass layer and then penetrates through it. Patterned electrical conductors lie on the flat surface of the internal epoxy-glass layer, including wire bonding pads on its exposed flat surface portion.

Abstract: .[.The disclosure is of.]. .Iadd.An .Iaddend.apparatus for generating raster scans on an oscilloscope combined with an electron microscope used for scanning and examining semiconductor devices. A scanning electron microscope can be operated to generate artificial or induced faults in semiconductor memories, and the raster scanner, in carrying out a scan, will visually display on the oscilloscope natural and artificial or induced faulty locations or cells in semiconductor memories. The semiconductor memory under test is positioned at different locations in the microscope, at each of which an artificial fault is generated until a position is reached, at which the artificial fault coincides, or nearly coincides, with the natural fault location as displayed by the raster scanner. When this is achieved, the electron microscope can then be used to examine the naturally faulty location or cell to determine the reason for the fault.