Patents Represented by Attorney, Agent or Law Firm Law Offices of Peter H. Priest, PLLC
  • Patent number: 8342208
    Abstract: An object of the present invention is to allow a vehicle to run in the case where an air compressor connected to an input port fails so as to cause air leakage from the location of the failure, by preventing air in a parking brake circuit from leaking from the failure location through a bleed air flow path. In order to achieve the object, a multi-protection valve includes: a communication passage for communicating between an input chamber and a service output port so as to bypass a pressure control valve provided in correspondence with the service output port, the communication passage having a check valve for preventing air from flowing from the service output port into the input chamber and a throttle for restricting the air flow rate; and a bleed air flow path for communicating between the input chamber and the parking output port so as to bypass pressure control valves, the bleed air flow path having a second check valve for preventing air from flowing from the input chamber to the parking output port.
    Type: Grant
    Filed: November 29, 2007
    Date of Patent: January 1, 2013
    Assignees: Nabtesco Corporation, Isuzu Motors Limited
    Inventors: Ichirou Minato, Kenji Hattori, Fumiaki Uno, Hiroshi Ozawa
  • Patent number: 8340960
    Abstract: Techniques for implementing vocoders in parallel digital signal processors are described. A preferred approach is implemented in conjunction with the BOPS® Manifold Array (ManArray™) processing architecture so that in an array of N parallel processing elements, N channels of voice communication are processed in parallel. Techniques for forcing vocoder processing of one data-frame to take the same number of cycles are described. Improved throughput and lower clock rates can be achieved.
    Type: Grant
    Filed: June 16, 2009
    Date of Patent: December 25, 2012
    Assignee: Altera Corporation
    Inventors: Ali Soheil Sadri, Navin Jaffer, Anissim A. Silivra, Bin Huang, Matthew Plonski
  • Patent number: 8341381
    Abstract: An array of processing elements (PEs) is logically twisted in a first direction, wrapped to form a cylindrical array, and grouped in a second direction to determine PEs that are to be located in clusters and implemented to form physical clusters of PEs. Inter-cluster communication paths are mutually exclusive. Due to the mutual exclusivity of the data paths, communications between the processing elements of each cluster may be combined in a single inter-cluster path, thus eliminating half the wiring required for the path. The length of the longest communication path is not directly determined by the overall dimension of the array, as in conventional torus arrays. Rather, the longest communications path is limited by the inter-cluster spacing. Transpose elements of an N×N torus may be combined in clusters and communicate with one another through intra-cluster communications paths. Transpose operation latency is eliminated in this approach. Each PE may have a single transmit port and a single receive port.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: December 25, 2012
    Assignee: Altera Corporation
    Inventors: Gerald George Pechanek, Charles W. Kurak, Jr.
  • Patent number: 8335786
    Abstract: A method is presented for large media data base query and media entry identification based on multi-level similarity search and reference-query entry correlation. Media content fingerprinting detects unique features and generates discriminative descriptors and signatures used to form preliminary reference data base. The preliminary reference data base is processed and a subset-set of it is selected to form a final reference data base. To identify a media query a fast similarity search is performed first on the reference database resulting in a preliminary set of likely matching videos. For each preliminary likely matching video a further multi-level correlation is performed which includes iterative refinement, sub-sequence merging, and final result classification.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: December 18, 2012
    Assignee: Zeitera, LLC
    Inventors: Jose Pio Pereira, Sunil Suresh Kulkarni, Shashank Merchant, Prashant Ramanathan, Pradipkumar Dineshbhai Gajjar
  • Patent number: 8335812
    Abstract: Efficient computation of complex long multiplication results and an efficient calculation of a covariance matrix are described. A parallel array VLIW digital signal processor is employed along with specialized complex long multiplication instructions and communication operations between the processing elements which are overlapped with computation to provide very high performance operation. Successive iterations of a loop of tightly packed VLIWs may be used allowing the complex multiplication pipeline hardware to be efficiently used.
    Type: Grant
    Filed: January 19, 2010
    Date of Patent: December 18, 2012
    Assignee: Altera Corporation
    Inventors: Gerald George Pechanek, Ricardo Rodriguez, Matthew Plonski, David Strube, Kevin Coopman
  • Patent number: 8315936
    Abstract: Techniques for more accurately estimating the risk, or active risk, of an investment portfolio when using factor risk models are disclosed. This improved accuracy is achieved by identifying and compensating for the inherent “modeling error” present when risk is represented using a factor risk model. The approach adds one or more factors that depend on the investment portfolio and that explicitly compensate for factors that are unspecified or unattributed in the original factor risk model. These unspecified factors of the original factor risk model lead to modeling error in the original factor risk model. The approach can be used with a variety of different factor risk models, such as, fundamental, statistical and macro risk models, for example, and for a variety of securities, such as equities, international equities, composites, exchange traded funds (ETFs), or the like, currencies, and fixed-income, for example.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: November 20, 2012
    Assignee: Axioma, Inc.
    Inventors: Robert A. Stubbs, Stefan Hans Schmieta
  • Patent number: 8296479
    Abstract: Details of a highly cost effective and efficient implementation of a manifold array (ManArray) architecture and instruction syntax for use therewith are described herein. Various aspects of this approach include the regularity of the syntax, the relative ease with which the instruction set can be represented in database form, the ready ability with which tools can be created, the ready generation of self-checking codes and parameterized test cases. Parameterizations can be fairly easily mapped and system maintenance is significantly simplified.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: October 23, 2012
    Assignee: Altera Corporation
    Inventors: Gerald George Pechanek, David Strube, Edwin Franklin Barry, Charles W. Kurak, Jr., Carl Donald Busboom, Dale Edward Schneider, Nikos P. Pitsianis, Grayson Morris, Edward A. Wolff, Patrick R. Marchand, Ricardo E. Rodriguez, Marco C. Jacobs
  • Patent number: 8274891
    Abstract: Systems and techniques are described which improve performance, reliability, and predictability of networks without having costly hardware upgrades or replacement of existing network equipment. An adaptive communication controller provides WAN performance and utilization measurements to another network node over multiple parallel communication paths across disparate asymmetric networks which vary in behavior frequently over time. An egress processor module receives communication path quality reports and tagged path packet data and generates accurate arrival times, send times, sequence numbers and unutilized byte counts for the tagged packets. A control module generates path quality reports describing performance of the multiple parallel communication paths based on the received information and generates heartbeat packets for transmission on the multiple parallel communication paths if no other tagged data has been received in a predetermined period of time to ensure performance is continually monitored.
    Type: Grant
    Filed: January 19, 2012
    Date of Patent: September 25, 2012
    Assignee: Talari Networks Incorporated
    Inventors: John Earnest Averi, Stephen Craig Connors, John Edward Dickey, Andrew Joshua Gottlieb
  • Patent number: 8255664
    Abstract: Techniques are described for efficient reordering of data and performing data exchanges within a register tile or memory, or in general, any device storing data that is accessible through a set of addressable locations. In one technique, an address translator is placed in the path of all or a selected set of address busses to a storage device to provide a programmable and selectable means of translating the storage device addresses. An effect of this translation is that the data stored in one pattern may be accessed and stored in another pattern or accessed, processed and stored in another pattern. The address translation operation may be carried out in a single cycle, does not involve the physical movement of data in swap operations, allows data to effectively be ordered more efficiently for algorithmic processing and therefore saves power. Address translation functions are shown to be useful for vector operations and a new type of storage unit using built in address translation functions is presented.
    Type: Grant
    Filed: May 11, 2011
    Date of Patent: August 28, 2012
    Assignee: Altera Corporation
    Inventors: Edwin Franklin Barry, Gerald George Pechanek
  • Patent number: 8244931
    Abstract: Techniques for providing improved data distribution to and collection from multiple memories are described. Such memories are often associated with and local to processing elements (PEs) within an array processor. Improved data transfer control within a data processing system provides support for radix 2, 4 and 8 fast Fourier transform (FFT) algorithms through data reordering or bit-reversed addressing across multiple PEs, carried out concurrently with FFT computation on a digital signal processor (DSP) array by a DMA unit. Parallel data distribution and collection through forms of multicast and packet-gather operations are also supported.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: August 14, 2012
    Assignee: Altera Corporation
    Inventors: Edwin Franklin Barry, Nikos P. Pitsianis, Kevin Coopman
  • Patent number: 8234004
    Abstract: Techniques are described for assigning an item to a slot in an item storage facility, such as a warehouse or a distribution center. A plurality of scores are determined, each score associated with an item and slot pair, the slot chosen from a plurality of slots and each score representing a degree of conformity of the item to a desired sequence of item and slot pairs, wherein the degree of conformity is measured in a simulated pairing of the item with the slot chosen from the plurality of slots in a sequence of other item and slot pairs and a different slot is chosen from the plurality of slots for each simulated pairing with the item. The item is physically assigned to a best slot associated with a highest score among the plurality of scores.
    Type: Grant
    Filed: February 25, 2009
    Date of Patent: July 31, 2012
    Assignee: Optricity Corporation
    Inventor: Charles Ray Grissom
  • Patent number: 8229227
    Abstract: Scaleable video sequence processing with various filtering rules is applied to extract dominant features, and generate unique set of signatures based on video content. Video sequence structuring and subsequent video sequence characterization is performed by tracking statistical changes in the content of a succession of video frames and selecting suitable frames for further treatment by region based intra-frame segmentation and contour tracing and description. Compact representative signatures are generated on the video sequence structural level as well as on the selected video frame level, resulting in an efficient video database formation and search.
    Type: Grant
    Filed: June 18, 2008
    Date of Patent: July 24, 2012
    Assignee: Zeitera, LLC
    Inventors: Mihailo M. Stojancic, Jose Pio Pereira, Shashank Merchant
  • Patent number: 8213643
    Abstract: A sound transducer for the transmission of audio frequency signals with a pressure-voltage transducer is provided. This pressure-voltage transducer is disposed on a supporting plate and at least partially embedded in a sound-insulating, substantially incompressible material, for example a gel. The supporting plate rests herein in contact on a body part, for example a jaw or skull bone, of a person. If this person conducts a conversation, the vibrations of the bone generated through the conversation are transmitted to a supporting plate. This supporting plate subsequently transmits the vibrations onto the pressure-voltage transducer, for example a piezoelectric element or an electret element.
    Type: Grant
    Filed: July 30, 2008
    Date of Patent: July 3, 2012
    Assignee: Ceotronics Aktiengesellschaft Audio, Video, Data Communication
    Inventor: Berthold Hemer
  • Patent number: 8208553
    Abstract: An apparatus and a method for quarter-pel motion compensated search are described in the context of an array processor with tightly coupled, multi-cycle hardware assist attached to each node. A quarter-pel motion compensated search (QPMCS) instruction initiates the quarter-pel motion compensated search pipeline operation. An instruction decode and instruction operation control unit generates a starting address for a 4×4 block of a current macro block search operation indicating where to fetch the pel values. An interpolation unit determines at least eight neighboring quarter-pels per pipeline stage based on the 4×4 block of pel values. An absolute value of difference function computes the absolute value of difference values between a current macro block pel and the at least eight neighboring quarter-pels per pipeline stage. An accumulator accumulates at least eight summation values for the 4×4 block at quarter-pel positions per pipeline stage.
    Type: Grant
    Filed: April 18, 2007
    Date of Patent: June 26, 2012
    Assignee: Altera Corporation
    Inventors: Mihailo M. Stojancic, Gerald George Pechanek
  • Patent number: 8195689
    Abstract: The overall architecture and details of a scalable video fingerprinting and identification system that is robust with respect to many classes of video distortions is described. In this system, a fingerprint for a piece of multimedia content is composed of a number of compact signatures, along with traversal hash signatures and associated metadata. Numerical descriptors are generated for features found in a multimedia clip, signatures are generated from these descriptors, and a reference signature database is constructed from these signatures. Query signatures are also generated for a query multimedia clip. These query signatures are searched against the reference database using a fast similarity search procedure, to produce a candidate list of matching signatures. This candidate list is further analyzed to find the most likely reference matches. Signature correlation is performed between the likely reference matches and the query clip to improve detection accuracy.
    Type: Grant
    Filed: May 3, 2010
    Date of Patent: June 5, 2012
    Assignee: Zeitera, LLC
    Inventors: Prashant Ramanathan, Jose Pio Pereira, Shashank Merchant
  • Patent number: 8192056
    Abstract: Lighting packages are described for light emitting diode (LED) lighting solutions having a wide variety of applications which seek to balance criteria such as heat dissipation, brightness, and color uniformity. The present approach includes a backing of thermally conductive material and two or more arrays of LEDs attached to a printed circuit board (PCB). The PCB is attached to the top surface of the backing and the two or more arrays of LEDs are separated by a selected distance to balance heat dissipation and color uniformity of the LEDs.
    Type: Grant
    Filed: December 10, 2009
    Date of Patent: June 5, 2012
    Assignee: Cree, Inc.
    Inventor: Russell G. Villard
  • Patent number: 8195732
    Abstract: Techniques for single function stage Galois field (GF) computations are described. Such a single function stage GF multiplication technique may utilize only m-bits per internal logic stage, a savings of m?1 bits per logic stage that do not have to be accounted for as compared with a previous two function stage approach. Also, a common design GF multiplication cell is described that may be suitably used to construct an m-by-m GF multiplication array for the calculation of GF[2m]/g[x]. In addition, these techniques are further described in the context of packed data form computation, very long instruction word (VLIW) processing, and processing on multiple processing elements in parallel.
    Type: Grant
    Filed: November 6, 2008
    Date of Patent: June 5, 2012
    Assignee: Altera Corporation
    Inventors: Nikos P. Pitsianis, Gerald George Pechanek
  • Patent number: 8189945
    Abstract: Video sequence processing is described with various filtering rules applied to extract dominant features for content based video sequence identification. Active regions are determined in video frames of a video sequence. Video frames are selected in response to temporal statistical characteristics of the determined active regions. A two pass analysis is used to detect a set of initial interest points and interest regions in the selected video frames to reduce the effective area of images that are refined by complex filters that provide accurate region characterizations resistant to image distortion for identification of the video frames in the video sequence. Extracted features and descriptors are robust with respect to image scaling, aspect ratio change, rotation, camera viewpoint change, illumination and contrast change, video compression/decompression artifacts and noise.
    Type: Grant
    Filed: November 5, 2009
    Date of Patent: May 29, 2012
    Assignee: Zeitera, LLC
    Inventors: Mihailo Stojancic, Prashant Ramanathan, Peter Wendt, Jose Pio Pereira
  • Patent number: 8178239
    Abstract: A cathode material for a secondary battery containing a cathode active material represented by the general formula LinFePO4 (wherein n represents a number from 0 to 1) as a primary component and molybdenum (Mo), wherein the cathode active material LinFePO4 is composited with the Mo. In a preferred embodiment, the cathode material has conductive carbon deposited on the surface thereof.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: May 15, 2012
    Assignees: Mitsui Engineering & Shipbuilding Co., Ltd., Research Institute of Innovative Technology for the Earth
    Inventors: Naoki Hatta, Toshikazu Inaba, Izumi Uchiyama
  • Patent number: 8166733
    Abstract: Techniques for providing cost effective and tamper evident prepaid card packaging are described. By forming a cutout in a panel of the prepaid card packaging, covering the cutout with a material such as red glassine, and aligning an activation bar code or other indicia on the card with the cutout when mounting the card within the packaging, the security of the activation indicia can be better maintained. After purchase, the bar code can be scanned through the red glassine but prior to purchase, the red glassine prevents photocopying.
    Type: Grant
    Filed: June 23, 2011
    Date of Patent: May 1, 2012
    Assignee: Oberthur Technologies of America Corp.
    Inventor: David Garland Abell