Abstract: A system and method for increasing the speed of operation of a theorem prover relating to program verification using adaptive pattern matching technique is disclosed. Source code in a specific programming language is converted to one or more formulae, each representing a specific reformulation of the source code that facilitates program verification. Each formula derived from the source code is converted into an E-graph which is a particular type of a directed acyclic graph having leaf nodes and interior nodes. Some of the nodes of an E-graph may be related to other nodes through equivalence relationships. Equivalence relationships between a group of nodes is stored in a data structure called an equivalence class. A collection of rules defining the grammar of the programming language is stored in an axiom database. Rules and conjectures can dynamically be added to the axiom database. Each rule or conjecture to be tested is converted into a pattern.

Abstract: The present invention discloses an apparatus and method for maintaining the coherence of data within a shared memory network including a plurality of nodes. The system utilizes processors monitoring the occurrence of particular processing events within a local memory storage area. Upon the detection of events indicating the change of status of a particular group of data, a comparison is made between a modified copy of the group of data and a clean copy of the group of data to detect any modifications made to the group of data. These modifications are entered into the clean copy of the group of data and processing continues.

Abstract: A method estimates statistics of properties of transactions processed by a memory sub-system of a computer system. The method randomly selects memory transactions processed by the memory sub-system. States of the system are recorded as samples while the selected transaction are processed by the memory sub-system. The recorded states from a subset of the selected transactions are statistically analyzed to estimate statistics of the memory transactions.

Abstract: An operating system is simulated to run in conjunction with a native operating system, allowing processes, particularly multi-threaded processes, originally developed for the simulated operating system to be ported to the environment of the native operating system with a minimum of effort. In their natural environment the processes being ported have the capability of requesting that other processes be terminated. This capability is provided in the simulated system and in a multi-threaded environment of the simulated system. Processes executing in the simulated system, even if multi-threaded, also have the capability of protecting against being stopped when executing critical code.

Abstract: A computer graphics system renders an image on a display device using improved pre-filtering techniques that minimize aliasing artifacts in the image, particularly at the endpoints of lines. To anti-alias the image, a plurality of edges are placed near a line in the image. An edge function represents the edge. This edge function is multiplied by a scale factor to produce a distance function. This scale factor is the reciprocal of the Euclidean length of the line. The distance function is evaluated to determine the distance of selected pixels from each edge in units of pixels. These distances determine the intensity value for each selected pixel. Pixels on or beyond an edge, with respect to the line, are given a minimum intensity value; pixels inside all edges are given intensity values corresponding to their distances from the edge. An intensity function describing a relationship between pixel distances from the edges and their corresponding intensity values is developed.

Abstract: A method and apparatus for providing additional memory storage within a local node associated with shared memory system is disclosed. A processor associated with a local node of the shared memory system initially requests a fetch operation to a local memory associated with the processor of a first group of data from the home node location of the first group of data. The processor determines whether sufficient local memory exists for receiving the requested first group of data, and if not, selects a second group of data presently located within the local memory for removal in such a manner that no data will be lost due to the removal of the second group of data from the local memory. The selected second group of data is removed from the local memory and any directory information relating to said second group of data updated to reflect any new location information. The first group of data may then be fetched to the local memory.

Abstract: Systems and methods for ensuring that two different subordinate transactions will not be created at any given transaction processing node for the same parent transaction. Upon receiving a work request from a remote transaction processing system, the local transaction manager creates a local subordinate transaction associated with the parent transaction. A local transaction identifier that identifies the local subordinate transaction is also created. The local identifier includes an indicator, such as a one-bit flag, which identifies the local subordinate transaction as an imported transaction. The global identifier for the parent transaction is stored to a map in association with the transaction identifier of the new local subordinate transaction.

Abstract: A computer graphics system maps textures to displayed anti-aliased images with surfaces defined at oblique angles to the viewer. A circular pixel filter is projected onto a texture map to define an elliptical footprint in that texture map. The elliptical footprint has a major axis. Sample points are determined on a line in the footprint that closely approximates the major axis. These sample points are mapped to levels of detail and locations within a mip-map. Using a space-invariant filter, a texture value is computed for each sample point using data from one or more texture maps within the mip-map. These texture values for the sample points are post-filtered using a Gaussian filter function and summed to produce a final texture value. Blending the final texture with other characteristics of the pixel a produces the pixel data that are displayed on a display screen.

Abstract: A transaction processing system, including multiple processor units communicatively interconnected, manages information collection by employing a distributed transaction management facility to track and make consistent changes. When each transaction is started, a data structure is created that maintains information concerning the transaction. Included in the data structure is the identity of all processor units having resources involved in the transaction. Should a processor unit fail, and the transaction management facility is notified of that failure, the data structures of all pending transactions will be examined to see if the failed processor unit had a resource that was a participant in the corresponding transaction. If so, the transaction management facility can then make a decision as to whether or not to abort the transaction.

Abstract: Methods and systems for interoperating a transaction processing system implementing the presumed abort variation of the two-phase commit (2PC) protocol with a system implementing the presumed nothing variation. The gateway process that is responsible for exporting a transaction branch to a foreign transaction management system from a system implementing the presumed abort variation records whether the foreign transaction manager is implementing the presumed abort variation or the presumed nothing variation. After system failure, the gateway process determines which variation is adopted for a specific transaction branch. If the foreign transaction manager is implementing the presumed abort variation, the transaction manager from which the transaction branch originated communicates with the foreign transaction manager through the gateway process in accordance with the presumed abort variation.

Abstract: A system for issuing a family of instructions during a single clock includes a decoder for decoding the family of instructions and logic, responsive to the decode result, for determining whether resource conflicts would occur if the family were issued during one clock. If no resource conflicts occur, an execution unit executes the family regardless of whether dependencies among the instructions in the family exist.

Abstract: In a system for communicating optically encoded data among a network of nodes, the nodes are connected to each other by optical transmit and receive fibers. Each node includes a laser, a transmitter, and a receiver connected to the transmitters of the other nodes by a fiber stretcher. The rate at which the laser generates light pulses is controlled by a frequency control signal supplied to an oscillator connected to the laser. The delay from the transmitters to the receivers is controlled by a phase control signal supplied to the fiber stretcher connected to the receive fiber. The transmitter connected to the transmit fiber selective delays the pulses into a plurality of time multiplexed channels. The receiver connected to the fiber stretcher selectively detects the pulses in the time multiplexed channels while all of the pulses of all of the nodes are globally synchronized in all of the time multiplexed channels in frequency and phase using the frequency and phase control signals.

Abstract: In a distributed network of host computers, a system and method are provided for translating names and addresses of the host computers. The names of a substantial number of all of the host computers of the network are collected by probing the network from a collecting site. The names are stored in a table. Name-address bindings, which may include time-to-live information, are obtained for each of the collected names. The name-address bindings can be compressed and transferred to a cache memory of a recipient computer, such as, for example, a proxy server. The recipient computer receives translation requests for any of the name-address bindings stored in the memory. These translation requests can include first translation requests for the any of the name-address bindings stored in the memory. In response to the requests, including the first requests, the recipient computer replies the name-address bindings to reduce response latencies.

Abstract: A keyboard input device includes a processor repeatedly executing a scan routine to detect key press events while masking the events from an external monitoring means. The keyboard input device has a number of finger-activatable keys, each connected at the intersection of row signal lines and column signal lines, which are in turn connected to the processor. The processor systematically activates the rows and randomly activates the columns. A key press event causes the key's associated row and column to create a closed switch. The processor monitors the columns for a signal forced on pairs of rows. Obfuscating signals forced onto the columns inhibit detection of the key press event signals by an external source.

Abstract: An improved hybrid flow control protocol for providing FIFO capacity to prevent overflow due to bytes arriving after the FIFO indicates it is not ready to receive any more bytes utilizes a combination of a high/low watermark and credit based system. In one embodiment, when the byte count exceed the high watermark fixed credits are sent when N bytes are pulled from the FIFO. In a second embodiment, variable credits are sent depending on the difference between the number of bytes received in and pulled from the FIFO.

Abstract: In a multiple processing system comprising multiple communicatively interconnected nodes, each node having one or more processor units, multicast messages sent by a sender node will contain information that allows intended receiver nodes to check and determine the possibility that earlier-sent multicast messages from the sender node were not received by the receiver node.

Abstract: A method is provided for guiding virtual-to-physical mapping policies in a computer system including a processor and a memory. State information is randomly sampled from selected memory references in a stream of memory references issued by the processor to the memory. Cache hit/miss status, translation-look-aside buffer hit/miss status, and effective virtual and physical memory addresses of the sampled memory references are recorded in a profile record. The recorded information is aggregated by virtual memory address, and a new virtual-to-physical mapping is choosen to reduce cache and translation-look-aside buffer miss rates.

Abstract: A web server computer system includes a dispatcher program that processes transaction request messages received from a web browser. The dispatcher program includes a combination of persistent and transient interpreters that are used to process the transaction. The persistent interpreters are maintained in memory for an indefinite period of time and across multiple transactions. One type of persistent interpreter is a master interpreter that is used to coordinate the processing activity. A second type of persistent interpreter is a pristine interpreter that provides relevant context for any application programs required to process the transaction. A transient interpreter is maintained in memory for a finite duration, such as across a single transaction. One type of transient interpreter is a transaction interpreter that is used to process the transaction request message.

Abstract: Disclosed is an object-oriented programming mechanism to control and manage object ownership by more than one reference. According to that mechanism, an envelope class is created in a manner that makes itself look (to the user) like the actual object. The envelope class is then used to create an envelope object that references the actual object, and used as a base for all other references to the actual object to which the object reference relates. The envelope object keeps track of how many references are made to the underlying object by maintaining a reference count that is incremented with each reference to the object that is established, and decremented each time a reference is deleted or goes out of scope. The object reference will keep the object viable (i.e., maintain its memory space) until the last reference to the object goes out of scope. When this happens, the envelope object will then call upon one or more virtual member functions to destroy the object and free the memory space it was using.

Abstract: An encoded loss resilient message, includes a first number of first data items, a second number of second data items, and a third number of third data items. Respective portions of the first data items correspond to different numbers of associated second data items in a first distribution. Respective portions of the second data items correspond to different numbers of associated first data items in a second distribution. Respective portions of the second data items correspond to different numbers of associated third data items in a third distribution which is proportional to the first distribution with the different numbers of associated third data items equaling the different numbers of associated second data items multiplied by the first number divided by the second number.