Abstract: A nonvolatile memory device includes a memory cell array including a plurality of nonvolatile memory cells each having a resistance corresponding to one of a plurality of first resistance distributions, a temperature compensation circuit including one or more reference cells each having a resistance corresponding to one among one or more second resistance distributions, and a data read circuit including a compensation unit and a sense amplifier, the compensation unit being adapted to supply compensation current to a sensing node, an amount of the compensation current varying based on the resistance of each reference cell, and the sense amplifier being adapted to compare the level of the sensing node with a reference level and to output a comparison result.

Abstract: A composition for acrylic artificial stone, the composition including a (meth)acrylic monomer and an inorganic material. At least one of the (meth)acrylic monomer and the inorganic material may be contained in a component generated by decomposing a polymeric (meth)acrylic resin.

Abstract: A TFT includes a substrate, a transparent semiconductor layer on the substrate, the transparent semiconductor layer including zinc oxide and exhibiting a surface roughness of about 1.3 nm or less, a gate electrode on the transparent semiconductor layer, a gate insulating layer between the gate electrode and the transparent semiconductor layer, the gate insulting layer insulating the gate electrode from the transparent semiconductor layer, and source and drain electrodes on the substrate, the source and drain electrodes being in contact with the transparent semiconductor layer.

Abstract: A camera includes a first substrate having a convex refractive element, a second substrate having a concave refractive element, a separation between the first to second substrates, the separation including an air gap between convex refractive element and the concave refractive element, and a third substrate having a detector array thereon, the concave refractive element being closer to the detector than the convex refractive element, at least two of the first to third substrates being secured along a z-axis, wherein the z axis is perpendicular to a plane of the detector array, e.g., at a wafer level. The convex refractive element may include a plurality of convex refractive elements, the concave refractive element may include a plurality of concave refractive elements, and the detector array may include a plurality of detector arrays, each of the plurality forming a plurality of sub-cameras.

Abstract: A clock-data recovery circuit includes a plurality of input ports and a code generation circuit. The plurality of input ports generates sampling clock signals based on digital control codes and samples input data signals based on the sampling clock signals to generate output data signals and phase detection signals, respectively. The code generation circuit generates the digital control codes based on the phase detection signals received from the input ports during a training mode.

Abstract: A phase change memory device and a write method thereof allow writing of both volatile and non-volatile data on the phase change memory device. The phase change memory device may be written by setting a write mode as one of a volatile write mode and a non-volatile write mode, and writing data as volatile or non-volatile by applying a write pulse corresponding to the write mode, wherein, when power is not supplied to the phase change memory device, the non-volatile data is retained and the volatile data is not retained.

Abstract: A non-volatile memory device includes field insulating layer patterns on a substrate to define an active region of the substrate, upper portions of the field insulating layer patterns protruding above an upper surface of the substrate, a tunnel insulating layer on the active region, a charge trapping layer on the tunnel insulating layer, a blocking layer on the charge trapping layer, first insulating layers on upper surfaces of the field insulating layer patterns, and a word line structure on the blocking layer and first insulating layers.

Abstract: A secondary battery including an electrode assembly; a can having an upper opening to receive the electrode assembly and having two facing wide walls, wherein the wide walls are asymmetrical to each other; and a cap assembly sealing the upper opening of the can.

Abstract: A full-color organic light emitting display device and a method of fabricating the same, including a substrate, at least one color conversion layer, a color filter, and an organic light emitting diode having a lower electrode disposed on the substrate, an upper electrode disposed on the lower electrode, and an organic layer with at least a first emission layer.

Abstract: A semiconductor device and associated methods, the semiconductor device including a semiconductor substrate with a first well region, a first gate electrode disposed on the first well region, and a first N-type capping pattern, a first P-type capping pattern, and a first gate dielectric pattern disposed between the first well region and the first gate electrode.

Abstract: An organic light emitting display includes a substrate, an organic light emitting device on the substrate, the organic light emitting device including a first electrode, an organic emitting layer, and a second electrode, a UV light shielding layer having at least two layers, each layer absorbing different wavelengths of UV light, and an encapsulation layer sealing the organic light emitting device.

Abstract: A method of fabricating a rechargeable battery having an electrode assembly, a PCB and a battery case, wherein the electrode assembly is connected to the PCB, the method including preparing a PCB having a first surface with an external contact terminal formed thereon and having a second surface with a conductive feature formed thereon, wherein the conductive feature is electrically connected to the external contact terminal through a conductive trace, and plating the external contact terminal by electrically connecting a plating electrode to the conductive feature.

Abstract: A wet etching solution includes hydrogen fluoride in an amount of about 0.1% to about 3% by weight of the etching solution, an inorganic acid in an amount of about 10% to about 40% by weight of the etching solution, the inorganic acid being one or more of nitric acid, sulfuric acid, and/or hydrochloric acid, a surfactant in an amount of about 0.0001% to about 5% by weight of the etching solution, the nonionic surfactant including one or more of alkylphenol ethoxylate and/or ammonium lauryl sulfate, and water.

Abstract: A method of forming a semiconductor memory device includes sequentially forming an etch stop layer and then a mold layer, forming a plurality of line-shaped support structures and a first sacrificial layer filling gaps between the support structures on the mold layer, sequentially forming a plurality of line-shaped first mask patterns, a second sacrificial layer, and then second mask patterns on the support structures and on the first sacrificial layer, removing the second sacrificial layer, the first sacrificial layer, and the mold layer using the first mask patterns, the second mask patterns, and the support structures as masks, removing the first mask patterns and second mask patterns, filling the storage node electrode holes with a conductive material and etching back the conductive material to expose the support structures, and removing the first sacrificial layer and the mold layer to form pillar-type storage node electrodes supported by the support structures.

Abstract: A power supply including a transformer primary coil coupled to an input power source and a secondary coil coupled to an output terminal, a first switch coupled to the primary coil of the transformer, a duty cycle of the first switch controlling a voltage of the output terminal, first and second resistors coupled to the output terminal in series, a third resistor having a first terminal coupled to a node common to the output terminal and the first resistor, a second switch having a first terminal coupled to a second terminal of the third resistor and having a second terminal coupled to a node common to the first and second resistors, the second switch controlled based on an accumulated driving time, and a switching controller configured to receive a feedback voltage varying according to an on/off of the second switch, and configured to control the duty cycle.

Abstract: A semiconductor device includes a substrate having a first area and a second area, a first transistor in the first area, a second transistor in the second area, an isolation layer between the first area and the second area, and at least one buried shield structure on the isolation layer.

Abstract: A polymer electrolyte membrane for a fuel cell that can maintain a stable performance for a long time, a method of manufacturing the same, and a fuel cell employing the same. The polymer electrolyte membrane includes at least one kind of a basic polymer and an acidic dopant. A dimensional change in the planar direction of the electrolyte membrane between a wet state and a dry state is 5% or less.

Abstract: A flexible printed circuit board includes a first substrate portion having at least one first terminal, a second substrate portion in communication with the first substrate portion and having at least one circuit device, a connection substrate portion in communication with the second substrate portion, the connection substrate portion extending away from the second substrate portion in a same direction as the first substrate portion, and a third substrate portion in communication with the connection substrate portion, the third substrate portion having at least one second terminal.

Abstract: A method of patterning a substrate includes processing first regions of the substrate to form a first pattern, the first regions defining a second region between adjacent first regions, arranging a block copolymer on the first and second regions, the block copolymer including a first component and a second component, the first component of the block copolymer being aligned on the first regions, and selectively removing one of the first component and the second component of the block copolymer to form a second pattern having a pitch that is less than a pitch of a first region and an adjacent second region.

Abstract: A method of fabricating a semiconductor device having a capacitorless one-transistor memory cell includes forming a first floating body pattern on a lower insulating layer of a substrate and a first gate pattern crossing over the first floating body pattern and covering sidewalls of the first floating body pattern is formed. The first floating body pattern at both sides of the first gate pattern is partially etched to form a protrusion portion extending between and above the partially etched regions, and first impurity regions are formed in the partially etched regions of the first floating body pattern.