Patents Represented by Attorney, Agent or Law Firm Lise A. Rode
  • Patent number: 6535525
    Abstract: Multiple streams of digital video data are partitioned into frames of at least two different lengths, where each frame length is an integer multiple times a minimum frame length. Each frame is written into a series of full cells and one or two partial cells. Each full cell carries the same number of video data bits, while each partial cell carries video data bits and/or other overhead bits which together equal the number of video data bits in one full cell. All of the full cells and partial cells for the frames are sent in a time-multiplexed fashion on a communication channel at a single cell rate. A constraint is imposed whereby the different frame lengths are limited to those where the integer multiple of the minimum frame length, divided by the total number of full and partial cells per frame, is a single ratio; and consequently, the video data bits in all of the video streams occur on the communication channel at the same average bit rate, independent of the different frame lengths.
    Type: Grant
    Filed: June 10, 1999
    Date of Patent: March 18, 2003
    Assignee: Unisys Corporation
    Inventor: John Vernon Morelli
  • Patent number: 6535935
    Abstract: A stream of data words is sent from a memory thru a controller and an external data buffer to an I/O device by a method which includes the steps of: 1) transferring a segment of the stream of data from the memory into the controller while concurrently sending a subsegment of the segment from the controller thru the data buffer to the I/O device via a transmission burst in which the receipt of individual parts of the subsegment are not acknowledged by the I/O device; 2) receiving a signal in the controller from the I/O device at any time during the sending step, to terminate the transmission burst; 3) subsequently receiving a signal in the controller, from the I/O device, to restart the transmission burst beginning with a selectable part of the last subsegment that was sent; 4) removing from the controller, only the portion of the segment which precedes the selectable part of the subsegment; and, 5) repeating the above steps until the stream of data is received in its entirety by the I/O device.
    Type: Grant
    Filed: April 6, 2000
    Date of Patent: March 18, 2003
    Assignee: Unisys Corporation
    Inventors: Lewis Rossland Carlson, John James Carver, II
  • Patent number: 6530069
    Abstract: The invention provides a method, system, and computer-readable medium having computer-executable instructions for designing a PCB using both HDL design elements and schematic design elements. The inventive method comprises the steps of selecting the HDL design elements and selecting the schematic design elements. The inventive method further comprises automatically interconnecting the HDL design elements, and automatically interconnecting the schematic design elements. The PCB is then physically designed based on the interconnected HDL and schematic design elements. The method may further comprise creating a schematic version from the interconnected HDL design elements, and creating a HDL version from the interconnected schematic design elements. The inventive method also may simulate the schematic version of the HDL design elements, and simulate the HDL version of the schematic design elements.
    Type: Grant
    Filed: November 29, 2000
    Date of Patent: March 4, 2003
    Assignee: Unisys Corporation
    Inventors: Mark W. Jennion, Christina B. Kettlety, Anthony P. Gold
  • Patent number: 6522156
    Abstract: An electromechanical apparatus for testing IC chips includes a chip holding subassembly, a power converter subassembly, and a temperature regulating subassembly which are squeezed together in multiple sets by respective pressing mechanisms; and this apparatus uses a generic structure for both the chip holding subassembly and the power converter subassembly. This generic structure is comprised of a planer substrate having first and second faces that are opposite to each other and are surrounded by an edge that is free of any electrical edge connectors. To use the above generic subassembly as the chip holding subassembly, an electrical components on the first face of the substrate include sockets which hold the chips that are tested. To use the above generic subassembly as the power converter subassembly, the electrical components on the first face of the substrate include electrical power converters for the chips that are tested.
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: February 18, 2003
    Assignee: Unisys Corporation
    Inventors: Jerry Ihor Tustaniwskyj, Lawrence William Friedrich
  • Patent number: 6513239
    Abstract: An alloy film is fabricated, on the face of a heat exchanger for an integrated circuit, by a process that dispenses various liquids onto the heat exchanger's face. To prevent those liquids from falling off of the heat exchanger's face onto other components which hold the heat exchanger on a frame, the process begins by combining the heat exchanger into an assembly that includes a retainer and a compliant member. The retainer catches any liquids that fall off the heat exchanger's face, and the compliant member forms a seal between the heat exchanger and the retainer which prevents the liquids from leaking onto the other components.
    Type: Grant
    Filed: July 24, 2001
    Date of Patent: February 4, 2003
    Assignee: Unisys Corporation
    Inventor: Blanquita Ortega Morange
  • Patent number: 6513070
    Abstract: A method and configuration for interprocessor communication provides reduced latency and complexity, as well as the ability to simultaneously transfer different types of data. A multi-channel interface is disposed between a slave processor and a master processor, wherein the multi-channel interface has a low-latency channel for transferring low-latency information and a high-throughput channel for transferring high-throughput information. The master processor interrupts the slave processor when the master processor has control information to transfer to the slave processor. Interrupt driven notification and the multi-channel interface provide reliable, high-speed communication between dissimilar processors.
    Type: Grant
    Filed: July 21, 1999
    Date of Patent: January 28, 2003
    Assignee: Unisys Corporation
    Inventors: William L. Kozlowski, David A. LaPorte, Weston J. Morris, Christopher N. St. John
  • Patent number: 6510411
    Abstract: A simplification of the process of developing call or dialog flows for use in an Interactive Voice Response system is provided. Three principal aspects of the invention include a task-oriented dialog model (or task model), development tool and a Dialog Manager. The task model is a framework for describing the application-specific information needed to perform the task. The development tool is an object that interprets a user specified task model and outputs information for a spoken dialog system to perform according to the specified task model. The Dialog Manager is a runtime system that uses output from the development tool in carrying out interactive dialogs to perform the task specified according to the task model. The Dialog Manager conducts the dialog using the task model and its built-in knowledge of dialog management. Thus, generic knowledge of how to conduct a dialog is separated from the specific information to be collected in a particular application.
    Type: Grant
    Filed: October 29, 1999
    Date of Patent: January 21, 2003
    Assignee: Unisys Corporation
    Inventors: Lewis M. Norton, Deborah A. Dahl, Marcia C. Linebarger
  • Patent number: 6499734
    Abstract: A method of detecting a document in a system for feeding and transporting documents includes detecting an acceleration of an accelerator idler indicating when the document trailing edge exits a feeder and a separator. The system includes a feeder stage including the feeder and the separator for receiving a document therebetween and gripping the document with a first grip, and a transport stage downstream of the feeder stage. The transport stage includes an accelerator driver and the accelerator idler for receiving the document therebetween and gripping the document with a second grip that is less than the first grip. When the document is simultaneously gripped by the feeder and separator and gripped by the accelerator driver and accelerator idler, the document slips at the accelerator driver until the document trailing edge exits the feeder and separator. The acceleration of the accelerator idler is detected to indicate when the document trailing edge exits the feeder and separator.
    Type: Grant
    Filed: December 4, 2001
    Date of Patent: December 31, 2002
    Assignee: Unisys Corporation
    Inventor: Michael N. Tranquilla
  • Patent number: 6497406
    Abstract: A document jogger jogs unit records such as checks and like value documents. The jogger has a bin for receiving the documents, and a vibrator coupled to the bin to vibrate it. A liner is adapted to be removably attached to the bin. The liner has an impact absorbing flexible material attached to the liner to absorb the shock of the documents as the bin is vibrated. A thin abrasion resistant, low friction layer covers the flexible material to prevent documents from damaging the flexible material and allows the documents to slide easily. The thin abrasion resistant, low friction layer is also soft enough to permit the flexible material to absorb the shock of said documents.
    Type: Grant
    Filed: August 27, 1998
    Date of Patent: December 24, 2002
    Assignee: Unisys Corporation
    Inventors: Michael J. Moore, Michael N. Tranquilla
  • Patent number: 6496010
    Abstract: A power system includes an output voltage terminal that is coupled by a first conductor to one pressed power contact which is then coupled by a second conductor to an electronic device. Also, the electronic device is coupled by a third conductor to one pressed signal contact which is then coupled by a fourth conductor to an output voltage feedback terminal on the power supply. Further, the power system includes a fault detection circuit which is coupled to the fourth conductor. In operation, the fault detection circuit senses if the pressed signal contact is open at a time when the pressed signal contact is supposed to be closed. If an open contact is sensed, the fault detection circuit sends a signal to an operator which indicates that corrective action is needed.
    Type: Grant
    Filed: February 7, 2001
    Date of Patent: December 17, 2002
    Assignee: Unisys Corporation
    Inventors: Nicholas Tyson Myers, James Dunbar Walker
  • Patent number: 6496948
    Abstract: A method and an estimator program for estimating the server farm size and the availability of the server farm for a given redundancy factor and a given particular number of clients.
    Type: Grant
    Filed: November 19, 1999
    Date of Patent: December 17, 2002
    Assignee: Unisys Corporation
    Inventor: Lev Smorodinsky
  • Patent number: 6490585
    Abstract: A number of partitions of a cellular multiprocessor (CMP) are connected to respective databases and form respective nodes of a data warehouse. Heterogeneous data stored across the nodes is accessed automatically in parallel at high speed from a user site using a simple script request containing a data source object name wherein the heterogeneous data is treated as a single data source object, the script further containing at least one method to be performed on the data source object. Respective agent processes are stored in memory dedicated to each partition and automatically generate descriptor files containing metadata corresponding to the data source object from a repository available to each partition. A messenger process transmits the new scripts to the appropriate nodes via memory-based messaging using a shared portion of the CMP memory. Respective agent processes at each node respond to automatically access the appropriate data and execute specified methods upon it.
    Type: Grant
    Filed: November 12, 1999
    Date of Patent: December 3, 2002
    Inventors: Charles Albin Hanson, Thomas Winston Johnson, Carol Jean O'Hara, Koon-yui Poon, Roger Anthony Redding
  • Patent number: 6483911
    Abstract: In a computer system that has an interface to a telephone network and that executes network applications comprising one or more call flows that provide telephony services to callers who access the computer system via the telephone network, a call flow library provides an interface between the network applications and a client application to enable the client application to externally call and initiate execution of a selected call flow of one of the network applications.
    Type: Grant
    Filed: November 5, 1997
    Date of Patent: November 19, 2002
    Assignee: Unisys Corporation
    Inventor: Steven J. Capriotti
  • Patent number: 6478076
    Abstract: A mechanical assembly is comprised of a heat exchanger for an integrated circuit. In the assembly, a retainer for a liquid has a bottom with an opening thru which the heat exchanger extends such that a face of the heat exchanger is surrounded by the retainer. Also in the assembly, a compliant member forms a seal for the liquid between the heat exchanger and the retainer. This mechanical assembly is useful in fabricating an alloy film on the heat exchanger's face.
    Type: Grant
    Filed: July 24, 2001
    Date of Patent: November 12, 2002
    Assignee: Unisys Corporation
    Inventor: Blanquita Ortega Morange
  • Patent number: 6480981
    Abstract: An output stage of a multi-stage algorithmic pattern generator which generates bit streams for testing IC chips, is comprised of multiple input registers which hold input addresses and input data words; and a multiplexer circuit, having a plurality of parallel data inputs which concurrently receive the input addresses and the input data words, having control inputs for receiving a sequence of control signals, and which generates serial bit streams by selectively passing bits from the input addresses and input data words in response to the control signals. These serial bit streams from the multiplexer circuit preferably include a first bit stream which defines a data input to an integrated circuit chip that is to be tested, and a second bit stream which defines an expected output from the chip corresponding to the first bit stream.
    Type: Grant
    Filed: November 3, 1999
    Date of Patent: November 12, 2002
    Assignee: Unisys Corporation
    Inventors: James Vernon Rhodes, Robert David Conklin
  • Patent number: 6477676
    Abstract: An intermediate stage of a multi-stage algorithmic pattern generator which generates bit streams for testing IC chips, is comprised of a plurality of input address registers which hold respective input addresses; and a memory address generator, coupled to the input address registers, which generates a series of memory addresses by selecting bits from the input addresses. A memory is coupled to the memory address generator, which sequentially receives each memory address in the series; and in response, this memory sends a corresponding series of translated addresses to a memory output. Multiple output registers are coupled to the memory output, and each output register stores a respective translated address in the series. With this intermediate stage, the input addresses can be virtual addresses in a virtual, or hypothetical, memory; and, those virtual addresses can be translated into physical addresses for an actual memory chip that is to be tested.
    Type: Grant
    Filed: November 3, 1999
    Date of Patent: November 5, 2002
    Assignee: Unisys Corporation
    Inventors: James Vernon Rhodes, Robert David Conklin
  • Patent number: 6473834
    Abstract: In a data processing system comprising a first level cache, a second level cache, and a processor return path, wherein only one of the first level cache and second level cache can control the processor return path at a given time, an improvement comprises a queue disposed between an output of the first level cache and the processor return path to buffer data output from the first level cache so that the first level cache can continue to process memory requests even though the second level cache has control of the processor return path.
    Type: Grant
    Filed: December 22, 1999
    Date of Patent: October 29, 2002
    Assignee: Unisys
    Inventors: Steven T. Hurlock, Stanley P. Naddeo
  • Patent number: 6464147
    Abstract: A magnetic read head assembly and method for recognizing magnetic ink characters involves the scaling of peak information based on a second waveform. The read head assembly includes a first read head for generating a first waveform in response to a magnetic field of a magnetic ink character printed on a document. A second read head generates a second waveform in response to the magnetic field of the magnetic ink character. The read heads have a known head spacing, where the known head spacing defines an actual distance between the first read head and the second read head. In operation, peak information is determined for the character based on the first waveform. The peak information is scaled based on the first waveform and the second waveform. The scaled peak information is then compared to peak profiles, where the profiles correspond to known magnetic ink characters. Scaling the peak information based on the second waveform eliminates the need for precise knowledge or control of the document velocity.
    Type: Grant
    Filed: October 20, 2000
    Date of Patent: October 15, 2002
    Assignee: Unisys Corporation
    Inventor: Thomas D. Hayosh
  • Patent number: 6453255
    Abstract: A novel sales system of complex products whose configuration is designed based on the customer requirements provides method steps for generating guarantee offers. A value of the guarantee criterion for the complex product (such as product availability) can be evaluated only after the complex product configuration is determined. For each combination of the customer requirements, a system configuration and a corresponding value of the guarantee criterion is generated. Then, this value is used for the customer remedy calculations.
    Type: Grant
    Filed: January 17, 2001
    Date of Patent: September 17, 2002
    Assignee: Unisys Corporation
    Inventors: Lev Smorodinsky, Leonard Eugene Eismann
  • Patent number: 6453324
    Abstract: An improved computer-implemented method is disclosed, which maintains a version history of objects in a repository. Modifications to property values and links are tracked with respect to versions of a model. The method includes the steps of maintaining a start version and a list of end versions for each object in the model and maintaining a start version and a list of end versions for each attribute value in the model. Moreover, in response to a request for objects in a class with respect to a current version, only those objects whose start version is in the history of the current version and whose end versions are not in the history of the current version are retrieved. Also, in response to a request for attribute values of an object with respect to a current version, only those values whose start version is in the history of the current version and whose end versions are not in the history of the current version are retrieved.
    Type: Grant
    Filed: March 30, 2000
    Date of Patent: September 17, 2002
    Assignee: Unisys Corporation
    Inventors: Donald Edward Baisley, Peter Johnson