Abstract: In a distributed computing environment, a method, system and program product for monitoring, from a client computer system the performance of an application program residing on a server computer system. A probe program residing at the client computer generates requests for the services of the application program and records transaction records based upon service responses therefrom. The requests and transaction record generation is controlled by a set of probe configuration information at the client computer. Transaction records are provided to a central repository whereat statistical information is pre-processed and inserted into statistics tables. A display system enables a computer user to interactively request and view a plurality of displays of data sets of the monitoring data. Each data set includes data elements which may be interactively indicated by the viewer to cause the retrieval and display of related data sets having data elements associated with those in the original display.

Abstract: The present invention provides checking on information units sent and received as packets over fiber channel networks by providing check bits on the header information and separate check bits on the data.

Abstract: The invention relates to an electronic system, in particular a mobile data capture and data output device in which the electronic system has a processor (1) and at least one i/o unit (8) with a control unit (7), and in which the processor (1) is connected to the control unit (7), and the control unit (7) is connected with at least one i/o unit (8). The electronic system is switched to a standby-mode, in which a control software unit (2), which is connected to the processor (1) and the control unit (7) executes part of the processor work, and the control software unit (2) monitors the time when data input from at least one i/o unit (8) commences. If commencement of data input is registered the steps needed for data capture are initiated and concluded before the data input is terminated.

Abstract: A method, system and program product for sizing a programming effort associated with the migration of a computer program from a first to a second computer platform is described herein. The size of a computer program is estimated and an adjustment factor is applied to represent a base estimate of the programming effort required for the migration. Analysis of availability of required middleware, object and program libraries may further lead to modification of the estimate. An evaluation of scaling issues related to the migration and a comparison of the programming models for the first and second computer platform may additionally affect the estimate. If the migration port is to be made from a multiple system platform to a single system platform the re-architecting effort to reduce path lengths such as replacing network interfaces with direct file sharing must be added to the base estimate.

Abstract: This invention describes a method and system for virtualizing an internal capability of a computing system; specifically, the invention describes a method and system for establishing a virtual machine containing a programmed hardware-machine function that is normally executed natively as proprietary internal code in its own hardware environment, a Central Electronics Complex (CEC) or logical partition of a CEC. The code resides in a separate hardware domain of the CEC called the Service Element (SE). The IBM VM/ESA (VM) operating system requests the SE to transfer a copy of the code into a virtual machine that VM has initialized, where the machine function is provided (in the current embodiment) as an isolated and encapsulated part of a virtual Parallel Sysplex system comprising multiple virtual CECs in a testing environment.

Abstract: The information technology environment and requirements of a business entity are evaluated via an interactive engagement process, system and program product to successively match the entity's needs to a set of information technology solutions so as to generate a business solution deliverables such as a formal solution proposal. The engagement entails the determination of the entity's ability to participate in the evaluation. The engagement next includes partitioning the entity's information technology infrastructure into segments along the lines of established business criteria, receiving profile information from the entity thereon and mapping the profiled segments to potential solutions creating an ordered listing of solutions. Ordered solutions may be selected for detailed investigation including a further profiling of the segment to which the solution is to be applied and a workload analysis of the proffered solution.

Abstract: The present invention pertains to a design method for VLSI-chips. The chips are partitioned into segments in order to enable DRC and LVS. Thus, the memory requirements are kept below the limits of the platform used for the verification and the turnaround time is drastically reduced.

Abstract: A method, system and program product for determining the cost to an enterprise of a proposed information technology solution implementation is described herein. A detailed evaluation of the information technology resources of an enterprise is undertaken via successively detailed questions and analysis of the enterprise's technology environment. From information gleaned from this detailed evaluation, it is determined if a particular proposed solution implementation requires the addition of new hardware, associated software and administrative procedures and training. Based upon these determinations a raw cost for the implementation is established. Generally accepted accounting principles are applied to the raw cost, such as adjusting for inflation, and including the amount that may be deducted for depreciation of hardware assets to arrive at an actual cost for the implementation.

Abstract: The present invention provides for a computer program product for use with a computer system having a main storage device in processing communication with an information transfer interface mechanism capable of coupling to a plurality of input/output devices. The computer program device comprises of a data storage element included in the main storage device having a computer usable medium with computer readable program means for receiving and retrieving data and computer readable code means for concurrently receiving multiple packets of data from said interface mechanism. It also includes computer readable code means for concurrently storing multiple packets of data concurrently in said data storage element as well as computer readable code means for storage and retrieval of multiple packets of data concurrently between said interface mechanism and said data storage element.

Abstract: A method system and program product for facilitating the transfer of data between a requesting computer and data repository over a computer network is disclosed herein. An interface is provided over the network to a requesting computer from a front-end server computer via a network communication session. Via the interface the requesting computer generates requests to the data repository to access the data stored therein. Requests are passed via a temporary data link from the requesting computer to a software-based bridge element which is continuously logically coupled to the data repository. The bridge accesses the requested data from the repository and sends the requested data to the requesting computer system. The communication session between the front-end server and the requesting computer may be terminated upon the sending of the interface to permit the server to service further requests.

Abstract: In a distributed computing environment, a method, system and program product for monitoring, from a client computer system the performance of an application program residing on a server computer system. A probe program residing at the client computer generates requests for the services of the application program and records transaction records based upon service responses therefrom. The requests and transaction record generation is controlled by a set of probe configuration information at the client computer. Transaction records are provided to a central repository whereat statistical information is pre-processed and inserted into statistics tables. A display system enables a computer user to interactively request and view a plurality of displays of data sets of the monitoring data. Each data set includes data elements which may be interactively indicated by the viewer to cause the retrieval and display of related data sets having data elements associated with those in the original display.

Abstract: Six instructions for the manipulation of discontinuous memory locations in a computer memory are described. They are: Compare and Load (CL), Compare and Swap (CS), Double Compare and Swap (DCS), Compare and Swap and Store (CSST), Compare and Swap and Double Store (CSDST), and Compare and Swap and Triple Store (CSTST). In each instruction a processor associates a programming-specified blocking symbol with a lock not accessible to software. The lock is used by any of these instructions only during its single instance of instruction execution, and the lock is made available (unlocked) at the end of each instance to then enable another blocking-symbol instruction instance to use the lock, thereby serializing concurrent multiple processor requests for accessing the same resource. Programming associates resources in a system with the unique blocking symbols. Each instance of these instructions executes an operand earlier prepared from a data value taken from the resource..

Abstract: A system and method for register renaming and allocation in an out-of-order processing system which allows the use of a minimum number of physical registers is described. A link list allows concatenation of a physical register representing a certain instance of the corresponding logical register to the physical register representing the next instance of the same logical register. By adding and removing links in this link list, it is possible to manage the assignment of physical registers to logical registers dynamically. Both the physical registers representing speculative instances and the physical registers representing in-order instances are administrated together. This is done by means of an in-order list, which indicates the physical registers that actually represent the architected state of the machine.

Abstract: A method and apparatus for passing messages between nodes in a distributed network of interconnected nodes wherein a two dimensional array is arranged with each of the nodes represented by a single row heading and a single column heading. The intersections of row and column headings between which messages are to pass may be provided with a token indicative of this condition. The token may further be associated with message parameters defining the passage of the message and operations to be performed thereon, between the two nodes represented by the intersecting row and column headings. Successive versions of the two dimensional array may be provided to form a three dimensional array for passing messages between nodes over the network via successive communication patterns defined by the successive versions of the two dimensional array.

Abstract: A method and apparatus for configuring a single point arbitration scheme for a commonly accessed communication bus using bus master devices with arbitration control circuitry included therein. Bus master devices including arbitration control circuitry may be connected to an arbitration control bus over which signals for arbitrating control to the commonly accessed communications bus are provided. During a configuration mode of operation, the same connections to the arbitration control bus provide signals which are decoded at each bus master device to provide a configuration status which indicates whether other bus master devices requiring arbitration are connected to the arbitration control bus and whether the arbitration control circuitry included on the particular device will be enabled to perform the arbitration.

Abstract: Preprocessing emulation methods utilizing search argument controls for a template routine address table in a target computing system. Target routines are stored in a target computing system for emulating incompatible instructions of an incompatible architecture which need not be recognized by the architecture of the target computing system. Preprocessing of template routines is preferrably executed on an Auxiliary Emulation Processor (AEP) which may access and patch (modify) some or all of the target instructions in any selected target routine and send them through a queue to a target processor for execution. Execution of the target routines on a target processor emulates the execution of incompatible instructions in an incompatible program in the incompatible architecture.

Abstract: In a distributed computing environment, a method, system and program product for monitoring, from a client computer system the performance of an application program residing on a server computer system. A probe program residing at the client computer generates requests for the services of the application program and records transaction records based upon service responses therefrom. The requests and transaction record generation is controlled by a set of probe configuration information at the client computer. Transaction records are provided to a central repository whereat statistical information is pre-processed and inserted into statistics tables. A display system enables a computer user to interactively request and view a plurality of displays of data sets of the monitoring data. Each data set includes data elements which may be interactively indicated by the viewer to cause the retrieval and display of related data sets having data elements associated with those in the original display.

Abstract: A method and apparatus are described for providing a human sensorially significant indication of the occurrence of a sequence of error events in an ECC system as they occur over time. Each error indication element is kept activated for a human sensorially significant ("HSS") time interval which is tracked by maintaining a count of refresh pulses received from a memory system. A HSS interval timer includes a D-type flip flop which pulses a binary counter for each refresh operation. The counter, when full, produces a reset signal. An error indication signal from an ECC system is provided to a error condition latch which activates a sensorial error indicator element if the error indication signal is provided to the latch while the memory system is performing a memory read operation. The latch is subsequently reset by the reset signal from the counter after a HSS interval has transpired.

Abstract: A method and apparatus are described for providing error correcting code (ECC) which may be incorporated into a computer system which includes one of a plurality of memory configurations and which may include a pre-existing error control feature. A data store operation causes the receipt of a word including data bits and check bits generated by a pre-existing error control feature. The data and check bits of the received word are used to generate additional check bits based upon the configuration of the computer system memory. The additionally generated check bits are stored in the memory along with the received word. Upon a subsequent data fetch operation which retrieves the word and check bits the check bits are decoded thereby providing error detection and correction in the retrieved word for single and multiple bit errors including the failure of an entire memory chip.

Abstract: A set of storage devices together with a method for storing data to the storage devices and retrieving data from the storage devices is presented. The set of storage devices provide the function of a multi-writeport cell through the use of a set of single-writeport cells. The storage devices allow for multiple write accesses. Information contained in the set of storage device is represented by all of the devices together. The stored information may be retrieved via a read operation which accesses a subset of the set of storage devices. A write operation is a staged operation: First, the contents of all of the storage devices which are not to be modified are read. Next, the values that are to be written to a subset B of the set of storage devices are calculated in a way that the contents and the values of subset B together represent the desired result.