Abstract: A computer enclosure is provided which is capable of accommodating a plurality of drive devices therein in a fashion whereby the drive devices are readily removable. The enclosure includes a box having first and second opposed sides and a substantially rectangular opening extending between the first and second sides. The enclosure further includes a drive device retainer member having first and second opposed ends, the first end of the retainer being removably pivotally attachable to the first end of the box, the second end of the retainer member being attachable to the second side of the box. The retainer member contacts the drive devices to hold the drive devices in the box. The enclosure further includes a bezel structure having first and second opposed ends.
Type:
Grant
Filed:
October 27, 1989
Date of Patent:
March 31, 1992
Assignee:
International Business Machines Corporation
Inventors:
Kevin K. Cooke, John R. Dewitt, Paul J. Galinis
Abstract: A removable rail guide apparatus is provided for a disk drive mounting structure which is capable of receiving disk drives or other rail-mounted devices therein. The mounting structure includes a frame including a bay capable of accepting therein one first height drive or two second height drives which are smaller than the first size drive. The bay includes first and second opposed side walls situated in spaced apart relationship. First and second stationary rail guides are fixedly situated on the first and second side walls, respectively, to mate with corresponding side rails of the first size disk drive. First and second removable rail guides are removably mounted on the first and second side walls, respectively, at a distance spaced apart from the first and second stationary rail guides. The first and second removable rail guides mate with corresponding side rails of the second size disk drive when the first size disk drive is not present in the first and second stationary guide rails.
Type:
Grant
Filed:
October 27, 1989
Date of Patent:
March 24, 1992
Assignee:
International Business Machines Corporation
Abstract: A shielding strip is provided for a computer including an electrically conductive housing and a non-conductive drive mounting structure situated within the housing. The drive mounting structure includes a plurality of bays which communicate with an opening in the housing. An electrically conductive retainer is situated over the opening to hold the disk drives in the bays. The shielding strip includes a longitudinal main portion extending along a first side of the housing adjacent the opening and situated between the first side of the housing and the drive mounting structure. The shielding strip further includes a plurality of spring structures extending laterally away from the main portion and toward the bays, each of such spring structures including a first spring portion for contacting a conductive portion of a disk drive mounted in a respective bay and a second spring portion for contacting the retainer.
Type:
Grant
Filed:
October 27, 1989
Date of Patent:
November 19, 1991
Assignee:
International Business Machines Corporation
Inventors:
Kevin K. Cooke, John R. Dewitt, John E. McCloskey
Abstract: A microprocessor system employing an 80386 CPU and an 82385 cache controller has the capability of functioning with dynamic bus sizing (where the CPU interacts with devices which may or may not be 32-bits wide), as well as posted write capability. Unfortunately, the two capabilities have the possibility of an incompatibility if a write cycle is posted to a device which cannot transfer 32 bits on a single cycle. The present invention provides logic to overcome this incompatibility. An address decoder is provided to decode the tag portion of an address asserted on a CPU bus to determine if the asserted address is inside or outside a range of addresses which define cacheable devices. Any cacheable device is by definition 32 bits wide and therefore posted writes are allowed only to cacheable devices. Accordingly, the microcomputer system employing the invention posts write cycles to cacheable devices; write cycles to non-cacheable devices are inhibited from being posted.
Type:
Grant
Filed:
June 1, 1989
Date of Patent:
September 3, 1991
Assignee:
International Business Machines Corporation
Inventors:
Ralph M. Begun, Patrick M. Bland, Mark E. Dean
Abstract: A computer system is provided in which memory access time is substantially reduced. After row address strobe (RAS) and column address strobe (CAS) signals are used to select a particular address in a memory during a first memory cycle, the addressed data is latched for later transfer to a data bus. A CAS precharge of the memory is then conducted after such latching and prior to the end of the first memory cycle before the commencement of the second memory cycle.
Abstract: An balun/antenna apparatus is provided which is capable of being fabricated on a printed circuit board substrate by automated equipment. The balun-antenna includes a microstrip groundplane conductor which is split into two balanced ground arms at one end. The split groundplane conductor operates as both a balun and as a radiating conductor. A unique microstrip excitation structure is situated above the split ground elements on the opposed surface of the substrate to excite the antenna with radio frequency energy.
Abstract: An antenna is provided which includes a half wave helical element RF coupled to a monopole element. The monopole element is situated on the axis of the helical element and extends into the helical element a distance sufficient to permit resonant coupling between the helical element and the monopole element. The monopole element is driven by a source of radio frequency energy such that the helical element coupled thereto is excited by such radio frequency energy.
Abstract: A stripline filter resonator structure is provided which exhibits high Q and results in a filter with low insertion loss. The dielectric consists of two sections of dielectric material. A groove shaped as half an ellipse is formed in each of the sections. The surface of the grooves are covered with electrically conductive material. The two grooves are aligned and filled with adhesive material to hold the two dielectric sections together. An elliptically shaped resonator is thus formed in the center of the dielectric sandwich. Ground plane layers are respectively situated on the outer layers of the dielectric sandwich thus forming a stripline resonator structure. This unique resonator structure results in a more uniform current density around the periphery and thus undesired current bunching is correspondingly decreased.
Abstract: An antenna is provided which includes first and second helical elements which are separated by a dielectric spacer. The first helical element is fed a radio frequency driving signal and the remaining second element is coupled to ground. The first and second elements are coupled together in a fashion which results in a dramatic increase in antenna bandwidth in comparison to prior helical antennas.
Abstract: An balun-antenna arrangement is provided which is capable of being fabricated on a printed circuit board by automated equipment. The balun-antenna includes a microstrip transmission line which is coupled to one end of a split microstrip transmission line having opposed ends. An antenna which is symmetric about its feedpoint is coupled to the remaining end of the split microstrip transmission line.
Abstract: A method and apparatus are provided for generating a uniquely shaped prototype digital pulse which is transmitted with minimal frequency spectrum consumption and yet a relatively high bit rate. Such uniquely shaped digital pulse is stored in a memory included in a transmitter until transmission is desired, at which time a positive of the pulse is transmitted to correspond to a first logic level or the negative of the pulse is transmitted to correspond to a second logic level.
Type:
Grant
Filed:
January 28, 1987
Date of Patent:
April 12, 1988
Assignee:
Motorola, Inc.
Inventors:
Francis R. Steel, Clifford D. Leitch, Jose I. Suarez
Abstract: A speech amplifier circuit increases the maximum perceived loudness at the speaker (412) and reduces distortion at high volume levels without increasing the power consumed by the speech powder amplifier (410). When a low volume is selected by the volume control (414), the microcomputer (418) sets the step attenuator (406) at a correspondingly high attenuation level and the high-pass filter (408) is bypassed. As the volume control (414) is advanced and the speech power amplifier (410) is 12 dB into clipping, the microcomputer (418) activates the high-pass filter (408) and simultaneously steps the gain of the step attenuator (406) by 6 dB.
Type:
Grant
Filed:
January 7, 1987
Date of Patent:
January 26, 1988
Assignee:
Motorola, Inc.
Inventors:
Jaromir R. Bares, Bakulesh B. Patel, James H. Stangel