Patents Represented by Attorney McGinn Intellectual Property Law Group, PLLC

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  • Image processing apparatus for reading compressed data from and writing to memory via data bus and image processing method
    Patent number: 8078778
    Abstract: An image processing apparatus includes a data bus provided to access a memory, a compressing unit which compresses an image data and outputs a compressed image data, a write unit which writes the compressed image data into the memory via the data bus, a read unit which reads a compressed image from the memory via the data bus, a decompression unit which decompresses the compressed data read by the read unit, and a control unit which controls operations of the write unit and the read unit, based on an amount per unit time of the compressed image data outputted from the compressing unit, an amount per unit time of the compressed image data read from the memory and a degree of congestion of the data bus.
    Type: Grant
    Filed: April 10, 2008
    Date of Patent: December 13, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Kazuhiro Fuji
  • Electrostatic protection circuit
    Patent number: 8072720
    Abstract: An electrostatic protection circuit that affords protection without effecting transfer of an ordinary output signal includes an output terminal; a ground terminal; a first N-channel transistor having its drain and source connected between the output terminal and the ground terminal GND; a first electrostatic protection element connecting the output terminal and the ground terminal; and a second electrostatic protection element connected the drain and gate of the first N-channel transistor. The second N-channel transistor is connected to the gate of the first N-channel transistor.
    Type: Grant
    Filed: April 9, 2008
    Date of Patent: December 6, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Mototsugu Okushima
  • Display apparatus, data driver and method of driving display panel
    Patent number: 8068083
    Abstract: A display apparatus includes a display panel; and a data driver configured to output drive voltages from a plurality of output nodes to drive the display panel. The data driver includes a plurality of output amplifiers, each of which is configured to receive a gradation voltage corresponding to a pixel data and to output the drive voltage in response to the gradation voltage; and a driver-side demultiplexer configured to connect the plurality of output amplifiers to selection output nodes selected from among the plurality of output nodes. The display panel includes a plurality of data lines; and a panel-side demultiplexer configured to connect selection data lines selected from among the plurality of data lines with the plurality of output nodes.
    Type: Grant
    Filed: October 25, 2007
    Date of Patent: November 29, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Hiroaki Shirai, Yoshiharu Hashimoto
  • Data processing device and control method for preventing an exception caused by an instruction sent to a peripheral device by a branch source program from occurring during execution of a branch destination program or interrupt program
    Patent number: 8069338
    Abstract: A data processing device includes a program execution section to supply an operation direction signal to a peripheral device based on an executed program and execute a branch operation in response to a branch direction signal, and a branch wait operation section to receive the branch direction signal and a peripheral device status notification signal indicating whether an operation performed in the peripheral device is being executed. The branch wait operation section outputs an instruction issue stop signal directing waiting of the branch operation to the program execution section if the branch direction signal is input during a period when the peripheral device status notification signal is active indicating that the operation in the peripheral device is being executed.
    Type: Grant
    Filed: November 14, 2008
    Date of Patent: November 29, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Hitoshi Suzuki, Yukihiko Akaike
  • Display apparatus, source driver, and display panel driving method
    Patent number: 8068080
    Abstract: A liquid crystal display apparatus includes a liquid crystal display panel having a data line and a source driver for supplying a data signal to the data line based on a polarity signal. A polarity of the data signal is determined based on the polarity signal. The source driver includes an offset cancel control circuit for generating an offset cancel control signal and an output amplifier used to generate the data signal. The output amplifier is constructed so as to invert a polarity of an offset voltage based on the offset cancel control signal. The offset cancel control signal is generated based on the polarity signal.
    Type: Grant
    Filed: December 14, 2007
    Date of Patent: November 29, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Kouichi Nishimura
  • Semiconductor integrated circuit for minimizing a deviation of an internal power supply from a desired value
    Patent number: 8065535
    Abstract: A semiconductor integrated circuit includes an external terminal input with an external power supply voltage, a plurality of field effect transistors connected between the external terminal and an internal power supply line and a control circuit input with potentials of spots where voltage drops from output points of the output transistors are substantially the same in the internal power supply line, and controlling the plurality of field effect transistors according to the potential being input.
    Type: Grant
    Filed: November 13, 2006
    Date of Patent: November 22, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Shingo Nakashima
  • Semiconductor integrated circuit device having control circuit to selectively activate decoupling cells
    Patent number: 8053934
    Abstract: The semiconductor integrated circuit device includes a plurality of decoupling cells that suppress power noise respectively, a plurality of power switches that connect the decoupling cells to a power line respectively, and a control circuit that controls the number of power switches selected from among the plurality of power switches and to be turned on according to power noise to be changed according to the operation state of each of internal circuits driven by a power supplied from the power line.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: November 8, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Hidenari Nakashima
  • Semiconductor integrated circuit and method of testing the same
    Patent number: 8055965
    Abstract: A semiconductor integrated circuit includes: a plurality of scan flip-flops configured to form a scan chain in a scan test; and a plurality of clock gating circuits connected between a clock input and corresponding portions of the plurality of scan flip-flops, respectively. The plurality of clock gating circuits are connected in serial to form a chain and gating setting data is inputted in serial through the chain connection. Each of the plurality of clock gating circuits controls a connection between the clock input and a corresponding portion of the plurality of scan flip-flops based on the gating setting data.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: November 8, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Naoki Kaneko
  • Load driving device
    Patent number: 8054106
    Abstract: A load driving device according to an aspect of the invention may includes an output transistor connected between a power supply line and an output terminal, a load connected between the output terminal and a first ground line, a control circuit connected between a gate of the output transistor and a second ground line, the control circuit controlling turning on/off of the output transistor, and a compensation transistor that turns on when a potential of the second ground line assumes a predetermined value or higher, thereby maintaining an off state of the output transistor.
    Type: Grant
    Filed: December 11, 2008
    Date of Patent: November 8, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Akihiro Nakahara
  • Gaming system
    Patent number: 8052523
    Abstract: A gaming system comprising: a gaming machine and a server capable of communicating with the gaming machine is provided. The gaming machine comprises a receiving unit for receiving a game medium. The server comprises a plurality of first storage devices for storing a plurality of accumulated amounts to which predetermined proportions of bet game media received by the receiving unit is cumulatively added, a first lottery unit for conducting a lottery to determine whether or not one of the accumulated amounts is to be paid, and a first processor that operates to transmit an instruction for payout based on a result of the lottery and reset all accumulated amounts stored in the plurality of first storage devices when the instruction for payout is transmitted based on the result of the lottery.
    Type: Grant
    Filed: August 22, 2007
    Date of Patent: November 8, 2011
    Assignee: Universal Entertainment Corporation
    Inventor: Yukinori Inamura
  • Electronic components on trenched substrates and method of forming same
    Patent number: 8054630
    Abstract: A method of mounting an electronic component on a substrate includes forming at least one trench in a surface of the substrate. The trenches formed in the substrate reduce a stiffness of the substrate, which provides less resistance to shear. Accordingly, the trenches reduce the amount of strain on the joints, which mount the electronic component to the substrate, which enhances the life of the joints.
    Type: Grant
    Filed: February 13, 2008
    Date of Patent: November 8, 2011
    Assignee: International Business Machines Corporation
    Inventors: David Questad, Vijayeshwar D. Khanna, Jennifer V. Muney, Arun Sharma, Sri M. Sri-Jayantha, Lorenzo Valdevit
  • Light receiver
    Patent number: 8055139
    Abstract: There is provided a light receiver including a photodiode converting an optical signal into an electrical signal, and a plurality of amplifiers respectively having different gains, each input end of the plurality of amplifiers being connected to one end of the photodiode, and one of the plurality of amplifiers being in operating state for outputting an output signal. At least one of the plurality of amplifiers and the photodiode are connected through a diode.
    Type: Grant
    Filed: October 16, 2006
    Date of Patent: November 8, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Munetaka Noya, Koichi Iguchi
  • Semiconductor integrated circuit having latch circuit applied changeable capacitance and method thereof
    Patent number: 8044694
    Abstract: A semiconductor integrated circuit includes a flip-flop circuit, a capacitive element, and a switch circuit. The switch circuit includes a first switch circuit which couples the capacitive element to two nodes of the flip-flop circuit at a first timing, and a second switch circuit which short-circuits ends of the capacitive element connected to the two nodes at a second timing different from the first timing.
    Type: Grant
    Filed: July 21, 2009
    Date of Patent: October 25, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Junji Monden
  • Semiconductor apparatus and method of disposing observation flip-flop
    Patent number: 8042014
    Abstract: A semiconductor apparatus includes a functional block to observe a state of a signal line in the apparatus. The functional block includes a signal transfer section to receive, transmit and output the state of the signal line, and an observation flip-flop to store a state of an input terminal or an output terminal of the signal transfer section.
    Type: Grant
    Filed: May 4, 2007
    Date of Patent: October 18, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Masahiko Hayashi
  • Oil pump pressure control device
    Patent number: 8038416
    Abstract: A device including a first discharge passage from a first rotor assembly to an engine, a first return passage that returns to an intake side of the first rotor assembly, a second discharge passage from a second rotor assembly to the engine, a second return passage that returns to an intake side of the second rotor assembly, and a pressure control valve whose valve main body is provided between a discharge port from the second rotor assembly and the first discharge passage. The first discharge passage and the second discharge passage are coupled, and a flow passage control is executed in each of: a low revolution range; an intermediate revolution range; and a high revolution range.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: October 18, 2011
    Assignee: Yamada Manufacturing Co., Ltd.
    Inventors: Yasunori Ono, Keiichi Kai, Kenichi Fujiki, Kosuke Yamane
  • CDMA-based mobile terminal, CDMA-based mobile communication method, and communication quality estimating method
    Patent number: 8040866
    Abstract: A mobile terminal comprises an antenna, radio unit, signal processing unit, signal analyzer unit, received signal information storage unit, and reception quality storage unit. Signal processing unit comprises a received signal processing unit and notified information processing unit, while the received signal information storage unit comprises a common pilot channel information storage unit and common control channel information storage unit. Received signal processing unit measures the reception quality of a common pilot channel and stores it in the common pilot channel information storage unit. Notified information processing unit extracts transmission power of the common pilot channel and common control channel from report information, and then stores them in the common control channel information storage unit.
    Type: Grant
    Filed: March 16, 2006
    Date of Patent: October 18, 2011
    Assignee: NEC Corporation
    Inventor: Tomoaki Hokao
  • Interface circuit
    Patent number: 8040144
    Abstract: An interface circuit includes a reference voltage generation circuit to generate a reference voltage, a differential voltage signal generation circuit to convert send data input in sending data into a pair of differential voltage signals and output the pair of differential voltage signals based on the reference voltage generated by the reference voltage generation circuit, a receiver to convert a pair of differential voltage signals input in receiving data and output received data, and a receiver test circuit to perform a sensitivity test of the receiver, the receiver test circuit having a resistance circuit to generate a pair of differential voltage signals having a potential difference being necessary for the sensitivity test of the receiver.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: October 18, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Hiroyuki Aizawa
  • Bus relay device and bus control system including bus masters, interconnect section, and bridge section
    Patent number: 8041868
    Abstract: A combination includes a first bus master coupled to a first bus to output a first signal group including at least one of signals onto the first bus, a second bus master coupled to the first bus to output a second signal group including at least one of signals onto the first bus, an interconnect section coupled between the first bus and a second bus to receive the first and second signal groups and to output a third signal group including at least one of signals onto the second bus, and a bridge section coupled between the second bus and a third bus to receive the third signal group and to output a fourth signal group including at least one of signals onto the third bus free from performing a selecting operation for the third signal group.
    Type: Grant
    Filed: July 13, 2010
    Date of Patent: October 18, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Atsushi Kazama
  • Semiconductor integrated circuit
    Patent number: 8040165
    Abstract: Provided is a semiconductor integrated circuit including: a differential driver that is disposed between a first power supply and a second power supply and drives differential input signals to generate differential output signals; and a control signal generation circuit that generates a first control signal for controlling a voltage level of each of the differential output signals. When each of a pair of output signals forming the differential output signals is changed from a voltage level corresponding to the first power supply to a voltage level corresponding to the second power supply, an amount of change in the voltage level of the corresponding output signal is controlled based on the first power supply.
    Type: Grant
    Filed: April 13, 2010
    Date of Patent: October 18, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Motoshi Azetsuji
  • Frequency control
    Patent number: 8041352
    Abstract: The invention provides for a mobile radio communications device, and related method, arranged for communication by way of at least two RATs and having at least first and second RAT systems and related respective automatic frequency controls for control of an internal clock of the device, the mobile radio communications device further including a search frequency controller for controlling the internal clock during an initial network search, the frequency controller and related method steps being arranged to be initiated at a nominal correction value at the start of the search procedure, and to depart from the said nominal value responsive to one of a receipt of a valid frequency error reading, or receipt of a request for a raster step during an initial network search procedure.
    Type: Grant
    Filed: November 8, 2007
    Date of Patent: October 18, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Richard Gavin Ormson