Patents Represented by Attorney McGinn IP Law Group
  • Patent number: 8324709
    Abstract: A semiconductor device has an electrical fuse formed on a substrate, having a first interconnect, a second interconnect respectively formed in different layers, and a via provided in a layer between the first interconnect and the second interconnect, connected to one end of the second interconnect and connected also to the first interconnect; and a guard interconnect portion formed in the same layer with the second interconnect, so as to surround such one end of the second interconnect, wherein, in a plan view, the second interconnect is formed so as to extend from the other end towards such one end, and the guard interconnect portion is formed so as to surround such one end of the second interconnect in three directions, while placing such one end at the center thereof.
    Type: Grant
    Filed: July 27, 2011
    Date of Patent: December 4, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Atsuki Ono
  • Patent number: 8325189
    Abstract: An information processing apparatus includes a controller acquiring texts including each of a plurality of commercial product names to be analyzed, with respect to the respective commercial product names, from a storage device when the commercial product names are entered into the controller, extracting first phrases and second phrases from the acquired texts with respect to the commercial product names, the first phrases and the second phrases being classified as belonging to a first kind and a second kind, respectively, as expressions of evaluation of commercial products indicated by the commercial product names, and generating a graph representing evaluation points as values corresponding to the differences between counts of the first phrases and the second phrases.
    Type: Grant
    Filed: September 24, 2009
    Date of Patent: December 4, 2012
    Assignee: NEC Biglobe, Ltd.
    Inventor: Norikazu Matsumura
  • Patent number: 8326856
    Abstract: A method (and apparatus) for adapting an input parameter, for dynamically invoking target Web services, and for adapting output results, includes receiving an invocation request including an input parameter in a first format. A semantic information representation module MetaWSDL (Meta Web Service Description Language), wherein the MetaWSDL includes a universal XML (eXtended Markup Language) representation which includes semantic information of a Web service method signature, is retrieved from a memory. A MetaWSDL processor is invoked to adapt the input parameter to a second format using the retrieved MetaWSDL. The target Web services are dynamically invoked, using the adapted parameter in the second format, and the output result in the first format is adapted to the second format, using the MetaWSDL.
    Type: Grant
    Filed: February 19, 2008
    Date of Patent: December 4, 2012
    Assignee: International Business Machines Corporation
    Inventors: Liang-Jie Zhang, Tian-Jy Chao, Hung-Yang Chang
  • Patent number: 8326772
    Abstract: A method and structure for pricing a good or service to a customer includes a calculator that executes a pricing model that includes a dimension of a utility of the good or service to the customer.
    Type: Grant
    Filed: June 15, 2007
    Date of Patent: December 4, 2012
    Assignee: International Business Machines Corporation
    Inventors: Mary E. Helander, Clarence L. Wardell, III, Laura Wynter
  • Patent number: 8324939
    Abstract: A differential logic circuit includes: a differential logic unit which receives a plurality of logic signals, performs a logic operation, and outputs a result of the logic operation from a pair of differential signal output terminals thereof; and a current source circuit which supplies current to the differential logic unit and which controls a magnitude of the current. The differential logic circuit further includes: a load circuit connected to the differential signal output terminals; and a load control circuit which is connected to the load circuit and controls a load of the load circuit such that a direct-current output voltage of the pair of differential signal output terminals is constant.
    Type: Grant
    Filed: January 26, 2011
    Date of Patent: December 4, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Jianqin Wang
  • Patent number: 8321182
    Abstract: A system and method is disclosed that utilizes a Voronoi diagram to position and/or control perforated ventilation tiles in rooms of equipment requiring cooling air. The Voronoi sites used for constructing the Voronoi diagram are the air inlets of the equipment, and the Voronoi edges of the computed Voronoi diagram are used as the locations for placing (or controlling) perforated tiles.
    Type: Grant
    Filed: March 3, 2010
    Date of Patent: November 27, 2012
    Assignee: International Business Machines Corporation
    Inventors: Jonathan Lenchner, Ravi Krishna Kosaraju
  • Patent number: 8318597
    Abstract: The manufacturing method includes: forming a seed film on a semiconductor chip; forming a photoresist having an opening above an electrode of the semiconductor chip on the seed film; forming a first Au bump on the seed film in the opening by electrolytic plating with a current density of 1.5 A/dm2 or above; grinding a surface of the first Au bump; stripping the photoresist; and removing the seed film by dry-etching.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: November 27, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Shigeharu Okaji
  • Patent number: 8320028
    Abstract: According to an aspect of the present invention, there is provided an optical scanning apparatus including a light source, an optical unit, a first controller and a second controller. The light source emits a predetermined number of laser beams, the laser beams to be arranged in a sub-scanning direction on a recording medium. The optical unit simultaneously scans the laser beams in parallel on the recording medium. The first controller changes a dot size of the laser beams in a main scanning direction. The second controller changes the predetermined number.
    Type: Grant
    Filed: August 21, 2007
    Date of Patent: November 27, 2012
    Assignee: Ricoh Company, Ltd.
    Inventors: Junshin Sakamoto, Takeshi Mochizuki
  • Patent number: 8319767
    Abstract: A driver includes a plurality of amplifier circuits which outputs a plurality of gradation voltages to a display portion according to a control signal, a control circuit which outputs the control signal, and a delay portion which sequentially supplies the control signal to amplifier circuits in a first amplifier circuit group, and which sequentially supplies a delayed control signal to amplifier circuits in a second amplifier circuit group other than the first amplifier circuit group, the delayed control signals obtained by delaying the control signal by a certain delay time.
    Type: Grant
    Filed: January 7, 2010
    Date of Patent: November 27, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Hitoshi Hiratsuka
  • Patent number: 8316881
    Abstract: According to an aspect of the present invention, there is provided a fuel tank check valve including: a main tubular body attached on a fuel filler pipe; a valve element; a first tube that is disposed between the main tubular body and the fuel filler pipe and that has a first locking portion to engage with the fuel filler pipe; an annular seal member; and a second tube that is disposed to sandwich the annular seal member with the first tube and that has a second locking portion to engage with the main tubular body, wherein the fuel filler pipe is disposed on an inner circumferential surface of the first tube, wherein the first locking portion projects in an inside diameter direction, and wherein the first locking portion engages with an engagement hole in the fuel filler pipe from an outside.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: November 27, 2012
    Assignee: Piolax Inc.
    Inventor: Kosei Yamaguchi
  • Patent number: 8319768
    Abstract: A data line driving circuit for a liquid crystal display device comprising: a plurality of first data lines applied with a positive potential, a plurality of second data lines applied with a negative potential, comparison units that compare with a reference voltage at least one of a potential at a first common line connected to the plurality of first data lines and a potential at a second common line connected to the plurality of second data lines, and switches that are controlled so that the first data lines and the second data lines are set to a connection state or an interruption state according to a comparison result by the comparison units.
    Type: Grant
    Filed: September 14, 2009
    Date of Patent: November 27, 2012
    Assignee: RENESAS Electronics Corporation
    Inventor: Junya Yokota
  • Patent number: 8320155
    Abstract: A memory device including memory cells each have two transistors and one storage element connected in series in this order between a corresponding one of bit lines and a constant voltage. The two transistors respectively have gate electrodes respectively connected to a corresponding one of first word lines and a corresponding one of second word lines. A memory array includes mats each having the memory cells disposed at all intersections between the bit lines and the first word lines, sense amplifiers each input with a corresponding pair of the bit lines in the same mat as a bit line pair, and first and second word drivers adapted to activate the first and second word lines, respectively.
    Type: Grant
    Filed: June 14, 2010
    Date of Patent: November 27, 2012
    Assignee: Elpida Memory, Inc.
    Inventors: Ryota Suzuki, Kazuteru Ishizuka
  • Patent number: 8313425
    Abstract: An image of a test chart having a test pattern is taken with an electronic endoscope. A DSP of a processing device generates a test pattern image from image signals input from the electronic endoscope. An image compositor composites the test pattern image and a test mask image having a predetermined reference pattern and generates a test mask composite image. An inspector visually measures positional and rotational displacement amounts of the test pattern with respect to the reference pattern in the test mask composite image displayed on a monitor, and inputs measurement results as displacement amount information to the processing device. The displacement amount information is stored in an EEPROM of the electronic endoscope. The processing device calibrates an endoscope image of a body cavity based on the displacement amount information input from the electronic endoscope.
    Type: Grant
    Filed: August 19, 2009
    Date of Patent: November 20, 2012
    Assignee: Fujifilm Corporation
    Inventor: Kenichi Shidara
  • Patent number: 8313244
    Abstract: In a wheel bearing assembly, the length of an annular protrusion in an axis direction, or the oscillation angle through which the center axis of a calk jig is oscillatingly turned relative to the center axis of a constant-velocity joint outer ring is restricted so that the annular protrusion and the calk jig do not interfere with each other when the constant-velocity joint outer ring is calk-fixed to the calk fixation portion of the wheel hub by radially outwardly bending a tubular protrusion formed on an end surface of the center shaft portion through the oscillating turn of the calk jig after the center shaft portion of the constant-velocity joint outer ring has been fitted to the hollow hole of the wheel hub.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: November 20, 2012
    Assignee: JTEKT Corporation
    Inventors: Tsuyoshi Kamikawa, Kentaro Shirakami
  • Patent number: 8314460
    Abstract: A semiconductor apparatus according to the present invention includes a first semiconductor layer of a first conductive type, a low concentration base region of a second conductive type formed on the first semiconductor layer, a gate electrode formed in a trench with insulating film on an inner surface of the trench that is formed to reach the first semiconductor layer from a surface of the low concentration base region, a source region of the first conductive type formed, contacting the insulating film, on a surface of the low concentration base region, a first high concentration base region, a second high concentration base region provided below and separated from the first concentration base region, and a third high concentration base region of the second conductive type included inside the low concentration base region, provided below and separated from the second high concentration base region.
    Type: Grant
    Filed: September 14, 2009
    Date of Patent: November 20, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Kinya Ohtani, Kenya Kobayashi
  • Patent number: 8315331
    Abstract: A transmission method for transmitting transmission data via a single line, includes: transmitting, as the transmission data, data that has one rising or falling transition of the amplitude of the data in each clock cycle of a clock and that carries a 2- or greater-bit value, making use of the phase from the edge of the clock to the transition in amplitude of the data.
    Type: Grant
    Filed: February 13, 2009
    Date of Patent: November 20, 2012
    Assignees: NEC Corporation, Elpida Memory, Inc.
    Inventors: Hideaki Saito, Hiroaki Ikeda
  • Patent number: 8315882
    Abstract: A system and method configured that may allow performing a human-computer verification including crediting a verified task from a first user to a second user. In additional embodiments, may allow the user to perform a computer operation that require human-computer verification based upon an amount of credits that the user has been provided.
    Type: Grant
    Filed: April 14, 2008
    Date of Patent: November 20, 2012
    Assignee: International Business Machines Corporation
    Inventors: Rajaraman Hariharan, Karthik Subbian, Laura Wynter, Ramakrishnan Kannan
  • Patent number: 8316072
    Abstract: A method (and structure) of executing a matrix operation, includes, for a matrix A, separating the matrix A into blocks, each block having a size p-by-q. The blocks of size p-by-q are then stored in a cache or memory in at least one of the two following ways. The elements in at least one of the blocks is stored in a format in which elements of the block occupy a location different from an original location in the block, and/or the blocks of size p-by-q are stored in a format in which at least one block occupies a position different relative to its original position in the matrix A.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: November 20, 2012
    Assignee: International Business Machines Corporation
    Inventors: Fred Gehrung Gustavson, John A. Gunnels, James C. Sexton
  • Patent number: D670921
    Type: Grant
    Filed: June 14, 2012
    Date of Patent: November 20, 2012
    Inventors: Dag Göranson, Örjan Göranson
  • Patent number: D670922
    Type: Grant
    Filed: June 14, 2012
    Date of Patent: November 20, 2012
    Inventors: Dag Göranson, Örjan Göranson