Abstract: There is disclosed herein an apparatus for use in automated testing of elements in data processing systems such as the central processing unit. The system is comprised of a microprocessor with associated firmware, RAM and peripheral communications devices. There are two communication interface ports for receiving commands and instructions from local and remote computer terminals or from data processing units programmed to cause the testing apparatus to perform predetermined sequences of tests. There is also a port for connection to a portable maintenance panel which can be held in the hand of a field engineer for controlling the testing apparatus. The system is designed to replace prior art maintenance panels used for debugging computer hardware.

Abstract: A solderable conductor pattern is formed on a ceramic substrate. The material of the conductor pattern is made by dispersing gold and certain inorganic binders in an inert liquid vehicle composition. Limited variations in the ranges of the amounts of the material in the composition particularly the range in the amount of copper oxide in the binder produce good adhesion of the pattern to fired substrates and simultaneously provide strong solder joints between leads of electronic devices soldered with a lead-indium solder to pads of a pattern of such material after the pattern has been fired on a substrate without the necessity for physically or chemically cleaning the pads. The binders of the material comprise certain amounts of the crystalline materials, copper in the form of its oxides CuO or Cu.sub.2 O, cadmium in the form of CdO, lead in the form of PbF.sub.2, and the balance being a glass which also contains lead and some cadmium.

Abstract: A one's complement adder for adding two binary numbers A.sub.i, B.sub.i in the one's complement system is constructed from a conventional adder circuit by connecting the generate output signal G produced by the adder to the carry-in terminal of the adder. The value of the generate signal is independent of the signal applied to the carry-in terminal which prevents the adder from exhibiting sequential or indeterminate behavior.

Abstract: A switching regulator circuit for utilization with power supplies supplying a high DC output current including a plurality of control rectifiers and inductive reactors with sequential gating of the rectifiers at regular intervals for providing overlapped output current pulses from the reactors. An output circuit receives the rippled current comprised of the overlapped output current pulses for reducing the ripple therein. The output circuit includes a choke in series with the output which induces phase shift between the rippled current and the output current. A sensing winding associated with the choke eliminates the phase shift voltage for forming a feedback signal as an input to a control circuit. The control circuit utilizes the feedback signal to control the rate at which the rectifiers are gated sequentially.

Abstract: A solderable gold conductor composition is formed by dispersing gold and certain inorganic binders in an inert liquid vehicle composition which can be used to produce conductor patterns which patterns adhere to fired ceramic substrates and to which can be soldered leads of electronic components.A method of soldering a copper lead to a lead pad on a substrate. A conductor pattern including at least one lead pad is printed on the substrate using a gold thick film paste composition. The gold composition is composed of finely divided gold particles and finely divided inorganic binder particles dispersed in an inert liquid vehicle, containing by weight 98-99 percent gold particles and complementally 2-1 percent of inorganic binder particles. The binder consists essentially by total weight of gold and binder of 0.6-0.2 percent copper, 0.2 percent lead, 0.2 percent cadmium and the balance being glass.

Abstract: An apparatus for calibrating a test unit adapted to characterize CML integrated circuits. The apparatus is adapted to deskew the time delays of each pin of the fixture which receives the CML circuit under test with respect to a certain predetermined pin and preselected pin thereof. The preselected pin and a predetermined pin are shorted and the time delay between the generation of a shaped pulse and its connection through the preselected pin to the predetermined pin and to a test unit is determined by said test unit. The time delays are then utilized to remove any time delays caused by the test apparatus itself so that the CML circuit under test can be accurately characterized.

Abstract: A testing apparatus for CML integrated circuits having a power splitter connected at its input to a pulse generator, and at one output to a test unit and at its other output to the CML circuit through a matrix. The output waveform of the CML circuit is provided through the matrix to the test unit.

Abstract: A facade for enclosing data processing apparatus or similar equipment. The facade is designed to be a free-standing unit, enclosing completely a multiple-component data processing assemblage. However, the facade can also be utilized in conjunction with external structural members, such as existing walls, to enclose the assemblage. The facade is easily assembled and disassembled by available field personnel, but has sufficient structural integrity to provide protection for the enclosed equipment assemblage and to prevent casual entry into the interior. In addition, the facade has sufficient apertures to permit disapation of heat generated by the high circuit element density utilized in the modern data processing apparatus. The facade is arranged to permit easy access by the maintenance personnel to the interior of the facade.

Abstract: In an information handling system in which a cyclic code is utilized to both detect and correct errors and a cyclical redundancy code is used for supplementary detection of errors, the cyclical redundancy code (CRC) polynomial is chosen to be a factor of the generator polynomial, g(x), of the error detection and correction (EDAC) code. In this way, the same check bits in the code word used for error detection and correction may be further utilized for a CRC check to supplement the error detection capabilities of the system. The risk of miscorrection of data is reduced to de minimus levels by the partitioning of data and count fields in the course of the development of the error detection and correction codes. Practice of the teachings herein disclosed provides a more efficient error detection and correction system with greatly reduced risk of miscorrection. An embodiment of the invention is disclosed following the methodology taught herein.

Abstract: An improved apparatus for cutting a moving web of paper comprising a cutting blade mounted on a rotary shaft at an angle to the axis of the shaft and a stationary cutting bar cooperating with the cutting blade to cut the web into paper of predetermined lengths. The apparatus is particularly suitable for cutting paper into predetermined lengths at high speeds as it is discharged from the printing system of a high-speed computer.