Patents Represented by Attorney Paul L. Hickman
  • Patent number: 4810664
    Abstract: A method for producing buried oxide layers in selected portions of a semiconductor substrate including the steps of applying a patterned mask made from a high-density material over a semiconductor substrate and selectively forming buried oxide layers by oxygen ion implantation. The high-density material of the mask is preferably tungsten, but can also be made from other suitable materials such as silicon nitride. A MOS transistor is made by the process of the present invention by applying the high-density mask material over the gate of the transistor, and forming buried oxide layers by ion implantation beneath only the source region and drain region of the transistor. The completed MOS transistor has the characteristics of reduced drain and source capacitance, reduced leakage, and faster response, but does not suffer from the floating-body effect of MOS transistors made by SOI processes.
    Type: Grant
    Filed: August 14, 1986
    Date of Patent: March 7, 1989
    Assignee: Hewlett-Packard Company
    Inventors: Theodore I. Kamins, Jean-Pierre Colinge, Paul J. Marcoux, Lynn M. Roylance, John L. Moll
  • Patent number: 4805149
    Abstract: A digital memory characterized by a plurality of memory cells arranged into a matrix having rows and columns; a row activation circuit for concurrently activating all of the rows of the matrix; and column activation means for concurrently applying either a reset signal or a preset signal to the columns of the matrix. The column activation circuit can include a plurality of digital switches coupled to reset and preset lines associated with each column of the matrix; and reset/preset logic which control the digital switches to selectively couple the reset and preset lines to a constant current source. A complementary, multi-emitter flip-flop memory cell is formed on a semiconductor substrate and includes "riser" portions.
    Type: Grant
    Filed: August 28, 1986
    Date of Patent: February 14, 1989
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Aloysius Tam, Thomas S. Wong, David Wang, David Naren
  • Patent number: 4783696
    Abstract: A color input image apparatus characterized by a support assembly, a sensor assembly, a beam forming assembly located between the support assembly and the sensor assembly, and a projector assembly located between the beam forming assembly and the sensor assembly. Apertures of the beam forming assembly and the projection assembly subtend substantially the same beam angle to minimize the deleterious effects of stray light. The beam forming assembly produces red, green, and blue component beams by transmissive filtering of light emanating from a portion of the color image. The beam forming assembly is positioned in the more position-tolerant object space of the apparatus, and matched apertures are used throughout to minimize the effects of stray light. Embodiments of the assembly can input an image from either color transparencies or from opaque color originals.
    Type: Grant
    Filed: December 5, 1986
    Date of Patent: November 8, 1988
    Assignee: Hewlett-Packard Company
    Inventors: Hans D. Neumann, Anatoly Rabinovich
  • Patent number: 4782381
    Abstract: A chip carrier for carrying integrated circuit chips is provided. Instead of placing individual circuit components either in the chips or next to them, the components are placed in or near the substrate of the chip carrier. This frees up expensive real-estate for logic chips at the chip level presently occupied by the components. The substrate of the carrier acts as a large heat sink to dissipate power generated by the components.
    Type: Grant
    Filed: June 12, 1987
    Date of Patent: November 1, 1988
    Assignee: Hewlett-Packard Company
    Inventors: Richard C. Ruby, Clinton Chao
  • Patent number: 4761549
    Abstract: Disclosed is a circuit to amplify a signal generated by the varying conductance of a photoconductor and to bias the photoconductance for optimum performance. A transistor means, with base input being proportional to the photoconductor's conductance and output being 180.degree. out of phase with the input is coupled to an operational amplifier where said output is further amplified. Part of this inverted amplified output is then used to bias the photoconductor, immediately offsetting a changed voltage across the photoconductor and keeping voltage across the photoconductor constant.
    Type: Grant
    Filed: November 21, 1986
    Date of Patent: August 2, 1988
    Assignee: Hewlett-Packard Company
    Inventors: Loyal D. Mealer, III, Richard F. Lacey
  • Patent number: 4758747
    Abstract: A programmable array logic device including a programmable logic array, at least one register pair, a multiplexer coupled to the register pair so that they can share a common I/O pin, and an observability buffer for controlling the multiplexer. A dual clock buffer is provided so that registers within the register pair can be clocked singly when in a preload mode or together when in a logic or verification mode. When in the logic mode, either the output of a buried state register or an output register is observed at the I/O pin under the control of a product term generated by the logic array. When in the preload mode the register to be preloaded is selected by an externally provided preload select signal. In the verification mode, which typically follows a programming mode, individually selected product terms within the logic array can be observed by clocking them into the register pairs.
    Type: Grant
    Filed: May 30, 1986
    Date of Patent: July 19, 1988
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Michele Young, Kapil Shankar
  • Patent number: 4758982
    Abstract: A quasi content addressable memory circuit including a CAM section, a RAM section, and a comparator. A first part of an incoming comparand is applied to the CAM section, while a second part of the incoming comparand is applied to the comparator. If there is a favorable comparison within the CAM section with the first part of the comparand, the CAM section develops a pointer which addresses the RAM. The output of the RAM is then compared to the second part of the comparand and, if a favorable comparison is made, a match flag is developed. Also disclosed are circuits for handling multiple responses by the CAM section, and a practical comparator RAM which combines the functions of the comparator and the RAM of the quasi content addressable memory circuit.
    Type: Grant
    Filed: January 8, 1986
    Date of Patent: July 19, 1988
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Simon M. Price
  • Patent number: 4746793
    Abstract: A photodiode assembly including a photodiode array having a linear arrangement of photodiodes, and a mask associated with the photodiode array to shade one or more selected photodiodes from incoming light of a particular frequency. The mask includes a frame provided with an elongated slot, and at least one bridge formed across the slot for shading the selected photodiode. The bridge portion is sufficiently wide to fully cover the selected photodiode and to partially cover the two adjacent photodiodes. An aperture is provided through the bridge in alignment with the selected photodiode to allow a portion of the incident light to impinge upon the selected photodiode.
    Type: Grant
    Filed: September 10, 1986
    Date of Patent: May 24, 1988
    Assignee: Hewlett-Packard Company
    Inventor: George W. Hopkins, II
  • Patent number: 4746624
    Abstract: A MOSFET structure characterized by a lightly doped tip region located between the channel and drain, and a buried region located below the tip region and shifted laterally towards the drain. The buried region, which is doped to a level intermediate between that of the tip region and the drain, causes the channel current to deflect downwardly from the field oxide, through the lightly doped tip region, and into the buried region. The gradual electric field gradient produced by the structure and the deflection of the channel current away from the thin oxide greatly reduces the device's sensitivity to the hot electron effect. The method of the invention includes forming the lightly doped tip region, forming a first oxide spacer, forming the buried region, widening the oxide spacer, and finally forming the drain region.
    Type: Grant
    Filed: October 31, 1986
    Date of Patent: May 24, 1988
    Assignee: Hewlett-Packard Company
    Inventors: Kit M. Cham, Paul V. Voorde
  • Patent number: 4746068
    Abstract: A nebulizer assembly particularly well adapted as a liquid chromatograph/mass spectrometer interface including a pair of nebulizer plates, a base, and a cap for tightly holding the nebulizer plates against the base. A first nebulizer plate has a centrally located outlet orifice and a radially extending groove, and the second plate has a centrally located gas inlet orifice and a radially displaced liquid inlet orifice. The gas inlet orifice aligns with the outlet orifice and an aperture provided in the cap, and the liquid inlet orifice aligns with a section of the groove provided in the first nebulizer plate. When the gas inlet orifice is coupled to a pressurized gas source and the liquid inlet orifice is coupled to a pressurized liquid source, uniform droplets having a diameter of approximately 10 microns can be formed from an outlet orifice twice that diameter.
    Type: Grant
    Filed: October 29, 1986
    Date of Patent: May 24, 1988
    Assignee: Hewlett-Packard Company
    Inventors: Paul C. Goodley, Harvey D. Loucks, Jr.
  • Patent number: 4746630
    Abstract: A method for producing field oxide in a silicon substrate by forming a thin oxide layer over the surface of the substrate, forming a thin nitride layer over the thin oxide layer, forming a thick oxide over the thin nitride layer, forming a thick nitride layer over the thick oxide layer; patterning all four of the layers to espose the surface of the substrate where the field oxide is to be formed; and growing the field oxide. Preferably, before the field oxide is grown, trenches are formed into the substrate so that the upper surfaces of the field oxide are substantially planar with the upper surfaces of the substrate. The thin oxide layer minimizes bird beak formation, and eases the removal of the oxide/nitride/oxide/nitride layers. The resultant structure is both planar and bird's beak-free, and is therefore well suited to producing VLSI components having dimensions less than 0.5 microns.
    Type: Grant
    Filed: September 17, 1986
    Date of Patent: May 24, 1988
    Assignee: Hewlett-Packard Company
    Inventors: Chi-Hung Hui, Paul V. Voorde, John L. Moll
  • Patent number: 4727237
    Abstract: A splicing apparatus includes a chamber which serves as a locus of functional convergence for a fiber holder, a laser and a viewing system. This arrangement permits several procedural steps, including a splicing operation and a hermetic coating operation to be performed using a single thermal laser heat source and without significantly disturbing the fibers between operations. The apparatus and the method practiced yield a splice which is comparable in optical, mechanical and physical properties to the original cable. Thus, for example, hermetically sealed optical fiber cables suitable for oil-well logging can be manufactured by splicing together the more limited cable lengths available using drawing techniques alone.
    Type: Grant
    Filed: May 4, 1987
    Date of Patent: February 23, 1988
    Assignee: Hewlett-Packard Company
    Inventor: Christopher A. Schantz
  • Patent number: 4707693
    Abstract: A method and an apparatus for communications systems provide priority to packets entering a communications node from a network to enable transmission of these packets in an orderly and efficient fashion. By defining a through-traffic preemptive priority mode, local packets are held in abeyance until packets which are already on the network and detected at the communications node have been routed through the node. Then the local packets are allowed to be transmitted from the node. And by defining a through-traffic priority mode, the local packet once started is completely transmitted before the network packets entering the communications node are allowed to continue through the system.
    Type: Grant
    Filed: June 13, 1984
    Date of Patent: November 17, 1987
    Assignee: Hewlett-Packard Company
    Inventor: Steven R. Hessel
  • Patent number: 4705729
    Abstract: In the fabrication of integrated circuits, a polymethyl methacrylate film containing a selected dye and exhibiting a strong dependence on light intensity is photobleached to provide an optical mask to pattern an underlying photoresist layer. While the film is photobleached, the underlying photoresist layer is made to be substantially unaffected by the photobleaching process. When the optical mask is realized, it is used to mask the light-sensitive photoresist layer when the photoresist layer is exposed to light. However, the photobleached layer, which is also sensitive to light, is now in turn made to be substantially unaffected by the exposure process. In this manner, the integrity of the optical mask resolution is maintained at its optimum, and densely integrated circuits can be processed and fabricated.
    Type: Grant
    Filed: November 19, 1984
    Date of Patent: November 10, 1987
    Assignee: Hewlett-Packard Company
    Inventor: James R. Sheats
  • Patent number: 4675613
    Abstract: A circuit in a synchronous detector system is provided to minimize and compensate for the errors induced by phase modulation and additive noise in the system. In one embodiment a first-order correction of such errors is achieved by equipping the synchronous detector system with a constant loop filter noise bandwidth and an RMS detector. A resolution filter passing the detected system signal to the RMS detector for correction is made to have a noise bandwidth identical to the loop filter noise bandwidth.
    Type: Grant
    Filed: July 11, 1986
    Date of Patent: June 23, 1987
    Assignee: Hewlett-Packard Company
    Inventors: Andrew H. Naegeli, Stuart L. Carp
  • Patent number: 4647847
    Abstract: A method is provided to eliminate harmonic skip problems in a down-conversion system. The method makes use of the relationship between the frequency of the intermediate frequency signal and the harmonic number of the local oscillator signal with respect to the frequency of the frequency of the source signal. By monitoring and measuring corresponding changes in the intermediate frequency signal caused by predetermined changes in the frequency of the local oscillator signal, a determination of the proper local oscillator signal and the proper harmonic can be made using a processor. The proper frequency and harmonic can then be maintained by periodically checking the relationship between variables.
    Type: Grant
    Filed: January 9, 1984
    Date of Patent: March 3, 1987
    Assignee: Hewlett-Packard Company
    Inventor: Mark D. Roos
  • Patent number: 4627009
    Abstract: A computerized stage assembly for a Scanning Electron Microscope including a support frame, a tilt frame pivotally coupled to the support frame, an X carriage engaged with the tilt frame for movement in an X direction, a Y carriage engaged with the X carriage for movement in a Y direction, and a pedestal carried by the Y carriage and capable of rotation around an axis substantially normal to both the X and Y directions. The tilt frame, X and Y carriages, and pedestal are moved by computer controlled step motors. The tilting and rotating of a specimen secured to the pedestal is non-eucentric, i.e. the axis of rotation or tilt is not necessarily through the point of inspection on the specimen. A method is disclosed for automatically returning an inspection point to the viewing field of the microscope after a non-eucentric rotation or tilt.
    Type: Grant
    Filed: May 24, 1983
    Date of Patent: December 2, 1986
    Assignee: Nanometrics Inc.
    Inventors: Duane C. Holmes, Guillermo L. Toro-Lira
  • Patent number: 4607744
    Abstract: An apparatus for removing integrated circuit chips from a flexible carrier characterized by a base, a separator plate including a separator edge coupled to the base, a take-up drum rotatably attached to the base and adapted to draw the flexible carrier past the separator edge, a tensioning mechanism for providing a tensioning force on the flexible carrier, and a conveyor for transporting separated chips away from the separating edge. The take-up drum and conveyor mechanism are simultaneously operated by rotating a knob.
    Type: Grant
    Filed: September 10, 1984
    Date of Patent: August 26, 1986
    Inventor: Chong-Il Pak
  • Patent number: 4606576
    Abstract: A tray for a high chair characterized by a base receptacle which attaches to the arms of the high chair, and a lattice member which is supported by the walls of the base receptacle. The lattice member, which is provided with indicia of educational and entertainment value, permits spilled food and drink to collect within the base receptacle rather than upon the eating surface. The lattice may also be optionally provided with a fixed and a removable feeding bowl.
    Type: Grant
    Filed: May 10, 1985
    Date of Patent: August 19, 1986
    Inventor: Richard O. Jones
  • Patent number: D285212
    Type: Grant
    Filed: January 31, 1984
    Date of Patent: August 19, 1986
    Inventor: Hugh M. Lee