Patents Represented by Law Firm Pomps, Smith, Lande & Rose
  • Patent number: 5410451
    Abstract: A thin dielectric substrate bearing a plurality of conductive leads has a hole circumscribed by the substrate in which is positioned a die having pads that are bonded to ends of leads carried by the substrate and projecting into the hole for contact with the die pads. The leads include free outer ends that project laterally outwardly and downwardly away from the plane of the substrate for connection to contact pads on a circuit board. The free leads are isolated from pressure applied to the chip on tape assembly after it has been connected to a circuit board by means of a thin self-supporting thermally conductive heat spreader that contacts the side of the die opposite its pads and includes fixed standoff and/or alignment pins that extend through alignment holes in the thin substrate and are in physical contact with a surface of the printed circuit board.
    Type: Grant
    Filed: December 20, 1993
    Date of Patent: April 25, 1995
    Assignee: LSI Logic Corporation
    Inventors: Emily Hawthorne, John McCormick