Abstract: A secure messaging system (900) generates a secure financial transaction message. A wireless selective call signaling system controller (102) receives the secure financial transaction message as a selective call message request including a destination identifier. A selective call message processor (1104) encapsulates the secure financial transaction message in a selective call message that includes a selective call address corresponding with the destination identifier. A selective call transmission service (904) conveys the selective call message to a financial messaging unit (906) that receives the selective call message, and in response to correlating the selective call address with a selective call address corresponding with the financial messaging unit (906), recovers the secure financial transaction message to effect a financial transaction.

Abstract: A system and apparatus for permitting a user of a selective call receiver (31) to receive a certain number of personal messages and information service updates without paying a fee for such services in return for reading advertisements wirelessly transmitted to the selective call receiver. The user is allowed to read the advertisements at any time prior to receiving the personal messages and information service updates. The certain number is proportional to the number of advertisements read. The certain number can be increased by the user responding to questions within advertisements using reverse channel messaging capabilities of a selective call transceiver (32), or by using a conventional telephone (22).

Abstract: A method and apparatus in a selective call communication system is used for transmitting a message of a message type selected from non-maildrop and maildrop (504), wherein the message of maildrop type includes one of a plurality of categories of information. The controller (112) of the system is used for identifying the one of the plurality of categories of information to a user. The controller (112) transmits the message with an identifier (412, 414) for identifying one of a plurality of icons corresponding to the one of the plurality of categories of information. A selective call receiver (122) receives and decodes the message and the identifier (412, 414). The display (324) of the selective call receiver (122) is used for displaying the one of the plurality of icons, in response to receiving the identifier (412, 414).

Abstract: A portable 2-way secure financial messaging unit (906) includes a receiver (804), a selective call decoder (1004), a financial transaction processor (1014), a main processor (1006), and a transmitter (1034). A received secure financial transaction message is decoded by the selective call decoder (1004) and either passed directly to a financial transaction processor (1014) in the secure financial messaging unit or to a smart card to prevent unauthorized access to information contained in the secure financial transaction message. The portable 2-way secure financial messaging unit (906) may originate as well as receive financial transactions.

Abstract: A piezoelectric active-mode incrementor switch system (100) includes two ratchet wheels (118, 124) that are rotationally mounted on a drive shaft (112) having a knob (102). The ratchet wheels (118, 128) form a slipping clutch with their respective drive wheels (116, 128) which are rigidly mounted to the drive shaft and mechanically loaded with spring (120). The ratchet wheels (118, 124) are mounted inversely to each other on the drive shaft (112) and make contact with their respective cantilever beams (114, 136) which each have a piezoelectric film. In operation, the switch (100) functions by mechanically stimulating the piezoelectric beams. When the knob (102) is rotated in one direction, only one of the beams (114, 136) is displaced causing a generation of an electrical charge that acts as a signal. The other beam (114 or 136) is prevented from moving and therefore its beam does not produce a signal.

Abstract: A serial modem (14) having a phase-locked loop (22), a central processing unit (20), a serial buffer (26) and a universal asynchronous receiver transmitter (UART) (28), wherein the serial buffer (26) and the UART (28) are connected to a host device (10) via an asynchronous serial interface (32). The central processing unit (20) enters a sleep mode when data is not being received. A start bit is received at a predetermined baud rate via the asynchronous serial interface (32). An interrupt is activated to start a wake-up transition at the central processing unit (20) upon receipt of the start bit. A series of bits following the start bit is sampled and stored in the serial buffer (26) until the central processing unit (20) is enabled. After the central processing unit (20) is enabled, a remainder of the series of bits are sampled and stored at the UART (28).

Abstract: A ring inhibiting charging and discharging circuit (100) for use with an amplification circuit (102) that drives a load (108) is responsive to an input (104) and is capable of generating an output (106) corresponding to the input (104). The ring inhibiting charging and discharging circuit (100) includes a charge element (120) that is responsive to the output (112) from the amplification circuit (102). The charge element (120) is capable of charging the load when the input voltage is greater than a preselected multiple of the output voltage. A discharge circuit (130) is responsive to the output (106) from the amplification circuit (102) and includes a feedback circuit (132) and a staging circuit (134). The feedback circuit (132) asserts a difference signal when the output voltage is less than the preselected multiple of the input voltage.

Abstract: A frequency generation device (100) comprises a cascade of two phase-locked loops (104 and 108). The first PLL (104) is a frequency synthesizer while the second PLL, or offset loop (108), comprises a phase detector (208 or 306), loop filter (210 or 310), VCO (212 or 312) and a divider with near-unity modulus (204 or 308). In the case of a negative offset design, the near-unity divider (204) is placed in the offset loop feedback path. In a positive offset design, the near-unity divider (308) is placed in the path between the synthesizer VCO and the offset loop phase detector. Unlike existing art, there is no offset signal input to the second or offset loop (108).

Abstract: A vehicle locating system (200) includes a beacon (108) carried by a vehicle, a tracking control station (106) for generating a beacon activation signal (110) which enables the beacon (108) to broadcast a vehicle identification signal (112), and one or more mobile communication devices (116, 118) which include a first receiver (516) utilized to receive a location signal (122) identifying a geographic location of a mobile communication device, and a transceiver (406) utilized to provide communication between said mobile communication device and a communication system controller. The one or more mobile communication devices (116, 118) further include a second receiver (502) utilized to receive the vehicle identification signal (112) broadcast by the beacon (108), and a vehicle tracking controller (520), responsive to the vehicle identification signal (112) which is received, for controlling a transmission of the vehicle identification signal (112) and the location signal (122).

Abstract: A phase detector circuit (100) operating at a high frequency includes a steering circuit (112) operating on frequency-divided versions of the phase detector signals. The phase detector (100) implements steering by adding dividers (108, 110) at both input ports to the steering circuit (112). This achieves the desired effect of reducing the operating frequency of the input signals to the steering circuit (112) to make operation possible at high frequencies of operation. The phase detector (100) also allows the steer circuit (112) to be turned off in steady state operation, this is accomplished by coupling only the steer outputs of the steering circuit (12) to the tuning line. The phase/frequency detect outputs are not coupled to the tuning line.

Abstract: A technique used in a subscriber unit (800) allows reception of personal messages transmitted by a home radio communication system (102,104) and content messages transmitted by a content radio communication system (106). The home and content radio communication systems (102,104, 106) share coverage areas. In the technique, at least one Block Information Word (BIW) of a frame is received on a home channel of the home radio communication system. The at least one BIW identifies a roaming pattern for the subscriber unit to use for periodically switching to a roaming channel of the content radio communication system. The subscriber unit dwells on the home channel for as many frames as have been defined by the roaming pattern, and dwells on the roaming channel for as many frames as have been defined by the roaming pattern.

Abstract: A selective call receiver (500) includes a radio receiver (501) and a processor (508). The radio receiver includes an antenna (502), a combination circuit (204), a bandpass filter (208), mixers (212, 214), analog-to-digital converters (222, 224), digital mixers (234, 236), a second combination circuit (242), and a digital-to-analog converter (246). The combination circuit receives an analog signal from the antenna and combines the same with an analog feedback signal generated by the digital-to-analog converter. The bandpass filter filters the output of the combination circuit and supplies its output to the mixers which down-convert the signal to baseband signals. These signals are modified by the analog-to-digital converters to digital signals which are up-converted by the digital mixers. The outputs of the digital mixers are combined by the second combination circuit to a digital output that is modified by the digital-to-analog converter to the analog feedback signal.

Abstract: A transceiver device (50) acting as a master (2) among a plurality of communication devices (1 and 12) potentially acting as slaves to the master (2). The transceiver device (50) includes a transmitter (68), a receiver (54) coupled to the transmitter (68), and a processor (58) coupled to the transmitter (68) and the receiver (54). The processor (58) is programmed to poll the slaves at a first interval and then receive a communication request while polling from a first slave of the plurality of communication devices to communicate with at least a second slave of the plurality of communication devices. The master (2) then designates communication parameters for communication between the first slave and at least the second slave and then polls at a re-polling interval the first slave and at least the second slave to confirm the termination of communication between the first slave and at least the second slave.

Abstract: A method (200) of decoding a multi-level synchronous protocol having a first portion encoded as M/2-level signals and a subsequent portion encoded as M/2-level signal or M-level signals, wherein the M/2-level signals have expected larger than normal variation of deviations includes steps of decoding (202) the first portion using a biased mode which uses M correlators shifted (204) to adequately cover the frequency range of the expected larger than normal variation of deviations and determining (206) from decoding of the first portion whether the subsequent portion is the M/2-level or M-level signal. If a M/2-level signal is found, continue decoding (210) in the biased mode. If it's the M-level signal, then decoding continues in standard mode (214), which uses M correlators that are spaced in frequency to match M spectral deviations within a predetermined frequency range.

Abstract: A controller circuit (100) includes an aliasing circuit (261) for efficiently transferring a set of peripheral data words between a microprocessor (130) and a serial peripheral device (140) that has a first in and first out (FIFO) register (220). The aliasing circuit aliases sequential addresses within a predetermined range of addresses that are generated by the microprocessor during a load multiple or store multiple command, wherein each of the sequential addresses is associated with one peripheral data word of the set of peripheral data words. The serial peripheral device comprises the FIFO register and a data bus register (210) for transferring each peripheral data word between the FIFO register and the microprocessor. A central processing unit (CPU) (125) of the microprocessor uses a CPU word that is not necessarily the same length as the peripheral data word.

Abstract: A programmable versatile digital signal processing system architecture (FIG. 5) allows the implementation of functions for transmitting and receiving a variety of narrow and wide-band communication signaling schemes. The flexibility of the architecture (FIG. 5) makes it possible to receive and transmit many different spectral communication signals in real time by implementing signal processing functions such as filtering, spreading, de-spreading, rake filtering, and equalization under the direction of program instructions (FIGS. 13, 14, 15, and 16).

Abstract: A technique is used by a squelch circuit (200) that generates a fast squelch. The technique involves generating a noise signal (211) from a demodulated signal (105), generating a squelch check request (405) of one of two types, performing a release (410) of a reset control (107) in response to the squelch check request, generating an integrated noise signal (106) having essentially no decay rate from the noise signal starting at the release of the reset control, generating a result of a comparison (815, 860) of the integrated noise signal to one of two values corresponding to the one of two types of squelch check requests at an expiration of a predetermined delay started at the release of the reset control, and controlling a muting (845, 870) of a speaker (128) in response to the comparison.

Abstract: A dual channel receiver (100) includes a front end bandpass filter (120) that has a front end bandwidth, a first mixer (130), a second mixer (135), and two essentially identical receiver back ends (190, 195). The front end bandpass filter splits a received signal into a first signal (121) and a second signal (122) of essentially equal signal strengths and provides out of band isolation between first and second signal outputs (123, 124). The first mixer is coupled to the first signal and to a high side injection signal (131), and generates a first mixer output signal (132). The second mixer is coupled to the second signal and to a low side injection signal (136), and generates a second mixer output signal (137). Each of the two essentially identical receiver back ends is coupled to one of the first and second mixer output signals.

Abstract: A voltage comparator (10) includes a differential amplifier (12), a switched latch (32), and a switch (26). The voltage comparator (10) receives a first input signal (18) and a second input signal (20), and produces a first output (38) and a second output (40) by comparing the first and second input signals. A reset input (30) disables and enables the voltage comparator (10).

Abstract: A communication system includes a radio communication system (102) for communicating scheduled messages to SCRs (Selective Call Radios) (122). The radio communication system is programmed to transmit to a SCR a first radio signal including an advertisement schedule detailing multiple times of arrival for a plurality of advertisement messages (402). Subsequently, a second radio signal including an advertisement message is transmitted to the SCR at a first arrival time (404). The SCR is programmed to receive the first radio signal, and store the advertisement schedule (406, 408). At or near the first arrival time, the SCR determines a likelihood that it can decode the advertisement message properly (410, 412). When the likelihood of decoding the advertisement message properly is below a predetermined expectation, the SCR disregards the second radio signal, and schedules itself to receive the advertisement message at a second arrival time defined by the advertisement schedule (416, 418).