Abstract: An oscillator circuit for use in a pulsed radar transmitter includes a reference oscillator of one frequency of, a voltage controlled oscillator controlled to transmit a radio frequency at a different frequency, and a switch for connecting the two oscillators together to inject lock the voltage controlled oscillator to the frequency of the reference oscillator when no transmitting is occurring.

Abstract: A radio frequency pulse generator for use in a pulsed radar transmitter includes a reference oscillator of one radio frequency, a second oscillator producing a different second radio frequency which differs from a multiple M of the first frequency by a given amount and a third oscillator which is injection locked by the second oscillator to produce a subharmonic frequency of the second frequency and, when not transmitting, is injection locked by the first oscillator to thereby produce its frequency.

Abstract: A charge-coupled device array, comprised of elements arranged in one or more columns, and a moving lens positioned between the array and object to be imaged on the array are incorporated in an imaging system such as an aerial reconnaissance camera. The lens is moved relative to the column(s) of the array at the same speed that signals in the array corresponding to what is imaged thereon translate along the elements thereof such that a given point of the object is imaged on each element of a column.

Abstract: A radar, such as a ranging radar, includes a non-scanning antenna which directs a beam of microwave energy toward and receives a return beam from a microwave reflector. A microwave reflector is mounted to a movable platform. As the platform moves, the microwave beam is scanned along a desired object. In one application, the heighth of a non-flowing material in different parts of a container is measured.

Abstract: An astable multivibrator includes a first transistor a single capacitor arranged in a time constant circuit, coupled to the emitter of the transistor and a potential divider circuit coupled to the base of the transistor to apply a selectable portion of a bias supply thereto. A circuit including another transistor of polarity opposite to that of the first transistor responds to the first transistor in its conductive or non-conductive state for determining the portion of potential applied to the first transistor such as to drive the transistor into greater conduction when it is conducting and further from conduction when it is non-conducting. The threshold levels of the transistors track the voltage supply, which may be varied, such that the frequency and duty factor of the multivibrator are invariant with changes in voltage supply value.

Abstract: An exclusive-OR circuit includes a first pair of field effect transistors (FETs), series coupled to a transferred electron logic device (TELD) and a second pair of FETs, arranged as an inhibit circuit. The second pair of FETs is either coupled in series with the first pair of FETs and TELD or in a parallel-serial relationship therewith in accordance with different embodiments of the invention. When a signal of a given polarity and a signal indicative of that signal are applied respectively to only one gate of each pair of FETs, the TELD produces an output signal. When a signal of a given polarity and a signal indicative of that signal are applied respectively to both gates of each pair of FETs, the second pair of FETs inhibits the TELD from producing an output signal.

Abstract: A frequency translating circuit such as an intermediate frequency circuit comprises a wide band transformer having a two-terminal secondary and first and second frequency passing filters coupled respectively to one and the other of the secondary terminals. Each of the filters is arranged to pass a different subband of frequencies within the wide band of frequencies passed by the transformer and to act as substantially a short circuit to the other frequency subband.

Abstract: A positive temperature coefficient resistance element such as a sensistor and a negative coefficient resistance element such as a thermistor are arranged in a potential divider network, the output terminal of which produces a potential which is a function of temperature. The potential is applied as a bias potential to the control electrode of an amplifier circuit subject to variations in gain as a function of both control electrode voltage and temperature to reduce the gain, as a function of temperature, of the amplifier.

Abstract: An analog-to-digital converter of the type using a plurality of voltage comparators, each, in response to an applied reference voltage and an analog voltage to be digitized, producing one of two logic signals depending on which of the applied voltages is the greater includes apparatus for altering the reference voltages on some but not all the comparators as a function of time in response to a control signal.In one embodiment, each of the altered reference voltages is limited to some preselected differential relative to that applied to one of the comparators which does not have its reference voltage altered as a function of time.In another embodiment, that one comparator has its reference voltage altered as a function of ratio of the time it produces one of the two logic signals relative to the other.

Abstract: First and second field effect transistors (FETs) each have a gallium arsenide substrate with an N-type active region that carries first and second electrodes in ohmic contact therewith and a gate electrode. The FETs are mounted in a flip-chip carrier that connects the first electrodes to ground. The FETs are biased to cause a current to flow from the first to second electrodes, whereby the first and second electrodes serve as drains and sources, respectively, of the FETs. The gate of the first FET is connected to a resonator. Additionally, a matching network connects the source of the first FET to the gate of the second FET. The matching network and the biasing of the first FET cause the gate input impedance thereof to be of a negative value that compensates for losses in the resonator. A load connected to the source of the second FET and the bias voltage cause the second FET to have a gate input impedance of a negative value that causes oscillation.

Abstract: A field effect transistor (FET) is comprised of a plurality of unit transistors having a common gallium arsenide substrate with an N-type active region. Each unit transistor is comprised of a unit gate, a unit drain and a unit source. The FET is mounted in a flip-chip carrier that connects all of the unit sources together to form a first electrode of the FET. Additionally, the first electrode is connected to ground by the carrier. All of the unit drains are connected together on the substrate to form a second electrode of the FET. The FET is reverse biased to cause a current to flow from the first electrode to the second electrode, whereby the first and second electrodes are a drain and a source, respectively, of the FET.

Abstract: A transferred electron logic input device (TELD) is cascaded with a field effect transistor output device (FET) to provide a threshold gate having switching times compatible with gigabit rate logic and having the capability to drive low impedance loads.

Abstract: The interval between arrival of two time displaced signals is measured with a resolution less than 0.5 nanoseconds by electronic vernier techniques utilizing transferred electron logic device circuits. The first arriving signal triggers a first clock generator of pulse period T.sub.C, the pulses from which are counted by a first counter and a second counter. The second arriving signal triggers a second clock pulse generator having a pulse period T.sub.V, the first pulse therefrom disabling the first counter at a count of M. As T.sub.V <T.sub.C coincidence of the pulses from the two clock pulse generators will eventually occur causing disabling of the second counter at a count of N. Time interval .DELTA.T is computed from the formula: .DELTA.T=(N-1)T.sub.C -(N-M)T.sub.V.

Abstract: In a coordinate converter in which more than one input address corresponds to one output address (related to a specific location on a display screen) and in which input addresses can occur in either of two sequences, an apparatus is disclosed for changing the output addresses by a preselected amount only when the input addresses are received in one of the sequences. In the absence of apparatus for changing the output addresses, the image on the display screen shifts depending on the sequence in which the input addresses occur.

Abstract: Two input signals, each being at either of two different amplitudes, are coupled to respective Schottky-barrier gates of one transferred electron logic device (TELD) of relatively low transit-time frequency and coupled via a delay means to respective Schottky-barrier gates of another TELD of relatively high transit-time frequency. When the two input signals are at different amplitudes, the TELD connected via the delay means becomes biased to domain formation, thereby causing an output signal having a first value to be produced. When both input signals are at one of the amplitudes, the other TELD becomes biased to domain formation, thereby causing an output signal having a second value to be produced. When both input signals are of the other of the amplitudes, neither TELD is biased to domain formation, thereby causing an output signal having a third value to be produced.

Abstract: A pulse train generator operating at subnanosecond periods includes a transferred-electron device (TED) in series with an open circuited resonant transmission line. The transmission line sustains domain formation in the TED. A filter coupled to the TED may be utilized to produce pulses at a subharmonic of the TED transit time frequency, determined by the length of the transmission line.

Abstract: A doppler radar of the type normally used to measure relative speed between a transmitter and a reflector is mounted so that its antenna is directed toward the surface to be measured. The radar is coupled to a means for de-emphasizing the doppler shift frequencies of the return signal associated with the speed of the vehicle and emphasizing the lower frequency components of the back scattered signal. The energy contained in these components provides an indication of the roughness of the surface which is in relative motion to the radar.

Abstract: A circuit is receptive of two time-spaced input signals at two respective input terminals, where either terminal may receive the first arriving input signal, for producing at first and second output terminals, signals indicative respectively of the time of arrival of the first and second input signals.

Abstract: A continuous wave frequency modulated signal is radiated from a range rate measuring system and returned by a target, the range rate of which, relative to the measuring system, is to be determined. The radiated signal and return signal are mixed to produce a beat frequency signal which is converted to a square wave signal marking passage of the beat frequency signal above and below its average value. A detector produces signals indicative of the presence and absence of transitions of the square wave signal at the turnaround points of the modulation waveform. The range rate of the target is directly related to the rate of the presence and absence of such signals.

Abstract: Apparatus is responsive to an alternating signal which exceeds a first level, V.sub.L, and within a given time, t, exceeds a greater second level, V.sub.H, by causing a signal manifestation pulse to issue. The apparatus is responsive to a signal which does not exceed V.sub.H within time t after exceeding V.sub.L causing disablement of the circuit.