Abstract: A method is provided for forming thin diffusion barriers in a semiconductor device (10). In one embodiment of the invention, a metal precursor gas is introduced to a surface of a dielectric layer. A predetermined amount of heat is then applied to the metal precursor gas and the dielectric layer. The heat causes the metal precursor gas to react with the dielectric layer, thereby forming a uniform, relatively thin diffusion barrier on the surface of the dielectric layer. In another embodiment of the invention, a metal precursor gas is introduced to a surface of a metal conductor. A predetermined amount of heat can then be applied to the metal precursor gas and the metal conductor, which creates a reaction between the gas and the conductor, and thereby produces a thin diffusion barrier on the surface of the metal conductor.

Abstract: An automated assembly line is controlled by a computer system. The assembly line is comprised of a plurality of machines which are each segmented into its basic unit operations providing work stations. The work stations are then controlled by the computer system and operated asynchronously with respect to the other work stations of the assembly line.

Abstract: A TAP linking module (21, 51) permits plural TAPs (TAPs 1-4) to be controlled and accessed from a test bus (13) via a single TAP interface (20).

Abstract: An electric motor (12) has multiple phase inputs (22, 24, 26). Each phase input can be coupled to a supply voltage (VM) by a high side driver transistor (40, 46, 52), or can be coupled to ground by a low side driver transistor (42, 48 54). A control circuit (30) turns each of the high and low side driver transistors on and off according to a predetermined sequence. As each of the low side driver transistors is turned off, another low side driver transistor is turned on in a manner so that a current through the low side driver transistor which is being turned off decreases at a linear rate, and so that a current through the low side driver transistor which is being turned on simultaneously increases at the same linear rate.

Abstract: A glass surface with a low reflectance opaque aperture coating (12). In one example the coating has two layers, in another the coating has three layers. In a third example the coating includes a filter layer structure(36). The coating can be deposited onto the glass or an antireflective coating (14). A process is included in which the opaque coating is formed. The process includes depositing the coating on an antireflective coating, then patterning and etching the opaque coating to define a clear aperture area.

Abstract: An echo cancellation scheme for DMT MDSL digital subscriber loop telecommunications data transfer is disclosed. The echoed data stream frame is aligned with the incoming data stream frame. The time domain equalizer trims the lengths of both the DSL channel and echo channel within the length of the cyclic prefix, so that the time domain convolution for synthesizing the echo is accomplished within the FFT process, enabling the echo to be subtracted in the frequency domain.

Abstract: An improved mold system (20) is provided. The mold system (20) includes a mold (30) having at least one mold cavity (28). A pot (22) is connected to each of the mold cavities (28) through a runner system (24). A bellows container (50) containing a molding material (60) is disposed with the pot (22). A plunger (31) applies a compressive load to the molding material (60) contained with the bellows container (50) to force the molding material (60) through the runner system (24) into the mold cavities (28).

Abstract: A control apparatus for controlling a three phase load apparatus. The control apparatus includes a voltage source inverter having a first pair of transistors, a second pair of transistors, and a third pair of transistors. Each such pair of transistors is connected serially between the terminals of a voltage source. The activation of a first transistor in each such pair of such transistors is effected by the application thereto of a first activation voltage, a second activation voltage and a third activation voltage, respectively, causing a first phase voltage, a second phase voltage and a third phase voltage, to be applied to a respective one of the three parts of the three-phase load apparatus. The selection and duration of activation of such first transistors during each of a continuing series of equal time periods T.sub.p is symmetrical about the mid-point of each of the time periods, and is represented by six non-zero vectors and two zero vectors.

Abstract: An input architecture for supply a plurality of signals to a plurality of circuit blocks located in an interior of an integrated circuit device. A plurality of unbuffered signal lines are each connected between a bondpad area and all of a plurality of input buffers. The input buffers are located adjacent to and connected to the plurality of circuit blocks instead of being located at the periphey of the integrated circuit adjacent the bondpad area.

Abstract: A structure and method incorporating a CVD TiN barrier layer 230 over the aluminum plug 220 in order to prevent the high plug resistance caused by the blanket metal film stack 240, 250, and 260 deposition process. Unlike physical vapor deposited (PVD) TiN, CVD TiN 230 does not react with the aluminum 220 during annealing. CVD TiN has also been shown to be a better diffusion barrier for aluminum than PVD TiN. In addition, CVD TiN will disrupt any unfavorable grain boundary propagation through the aluminum plug which may act as a source of electromigration failure. Therefore, the CVD TiN 230 can increase the electromigration resistance, without increasing the contact/via resistance.

Abstract: This is a device and method of forming such, wherein the device has an amorphous "TEFLON" (TFE AF) layer. The device comprising: a substrate; a TFE AF 44 layer on top of the substrate; and a semiconductor layer 42 on top of the TFE AF 44 layer. The device may be an electronic or optoelectronic device. The semiconductor layer may be a metal or other substance.

Abstract: A method of forming a crystalline silicon well over a perovskite barrier layer, preferably for use in formation of a resonant tunneling diode. A silicon substrate (1) is provided of predetermined crystallographic orientation. A layer of crystallographic perovskite material (5) is formed over the silicon substrate and substantially matched to the lattice constant of the silicon substrate. A layer of crystallographic silicon (7) is formed over the perovskite layer substantially matched to the lattice constant of the perovskite layer. The perovskite layer is formed by the steps of placing the silicon substrate in a chamber and then evaporating a layer of barium strontium oxide (3) thereon with a thickness of from about three to about six Angstroms and then evaporating a layer of calcium strontium titanate (5) thereon having a thickness of from about six to about 25 Angstroms thereon in the case of a tunneling diode.

Abstract: A data processing apparatus (71) includes a data processor bus (103), the rotation register (208) and a register selection circuit. The rotation register (208) is embodied by a plurality of data registers (200) each having a plurality of equal bit groups. The number of bits within each bit group of each data register preferably equals the number N of data registers. The register selection circuit permits normal register reads and writes via the data processor bus. The register selection circuit permits special rotational data accesses. In a rotation read mode the register selection circuit selects noncontiguous bits from a predetermined position within each sections for each of the data registers for read access. In a rotation write mode the register selection circuit selects noncontiguous bits from a predetermined position within each sections for each of the data registers for write access. The data registers (200) are connected together in a loop (208).

Abstract: A keyboard (10) is disclosed including a flexible display membrane (36) overlying a plurality of pressure-responsive switches (28). The display membrane (36) can be electrically addressed to display location indicia (48) indicating the position of an underlying switch (46), and functional indicia (50) indication the function of the key (46). Informational text (58) can also be displayed on the flexible display (36) indicating the choice of switches to effect a desired function. An interactive exchange of information between the keyboard user and a processing system (14) can be achieved to accomplish a desired function. Graphical information can be input to the processing system (14) by an array (90) of pressure-responsive elements (91). Graphics input by the array (90) can be reproduced on an overlying portion (96) of the flexible display membrane (36).

Abstract: An alignment apparatus is provided for ensuring proper positioning of a wire bonding capillary during installation of the wire bonding capillary onto the horn of a wire bonding machine. The apparatus ensures that the capillary is in a correct position relative to its longitudinal axis and is also in a desired rotational position with respect to the horn. The apparatus includes a first arm and a second arm which are movable toward each other to engage an outer surface of the horn thereby gripping the horn between the first and second arms. The apparatus also includes a support for holding the capillary. When the apparatus is properly positioned on the horn the support holds the capillary in a predetermined position in which the capillary is properly aligned with respect to the horn. A locking mechanism of the horn may then,be used to lock the capillary onto the horn.

Abstract: As assembly of normally open pressure responsive electric switches (10a-10e) is provided using a single lead frame (8) for forming respective discontinuous annuli (12) to serve as contact surfaces for pressure responsive discs (42) and a center contact (14) for each respective discontinuous annulus. The lead frame is overmolded with electrically insulative plastic and the circuit paths are electrically separated from one another by severing selected interconnecting runners (40). Each switching station has a disc (42) sealed by a flexible layer (47) and an O-ring (48). A separate lead (26) can be provided for adding switches of an opposite logic, i.e., normally closed, and a thermistor (38) can be included, if desired. The normally closed switches can be modular or the switches (100, 200) can have contacts formed from the lead frame (89).

Abstract: A system of vehicle identification with a first interrogator that uses a Lower SideBand (LSB) receiver to receive a modulated signal from a vehicle transponder and a second interrogator that uses an Upper SideBand (USB) receiver to receive another modulated signal. The two interrogators are adjacent to each other at a toll plaza, and operate at different carrier frequencies to force a signal frequency bandgap between communication signals in adjacent vehicle lanes.

Abstract: An active integrated circuit socket includes plural pin sockets receiving corresponding pins of an integrated circuit and plural socket pins making electrical contact with a printed circuit board. At least one active electronic component requiring electrical power for operation connects a pin sockets to a corresponding socket pin. The active electronic component may be a single ended input to differential output driver, a differential input to single ended output driver, a single ended to differential input/output transceiver or a voltage level shifter. These active components may include passive termination resistors. The single ended to differential transceiver may further include an enable input determining the direction of data transmission. This invention may be employed as an electronic system upgrade product including at least two active integrated circuit sockets connected via a flexible sheet including a plurality of electrical conductors connecting differential signal lines.

Abstract: A grating (461) coupling the output of a semiconductor laser (410) in a semiconductor waveguide to a dielectric waveguide (451) having a core (458) which may be efficiently butt-coupled to the core of an optical fiber (470); the laser and semiconductor waveguide, coupling grating, and dielectric waveguide are integrated on a single substrate. Further, multiple lasers (410, 420, 430, 440) with differing lasing frequencies may be integrated and their outputs grating coupled into a single dielectric waveguide (450) for wavelength division multiplexing.

Abstract: A stacked film assembly for use as wiring in a semiconductor device having a bottom film (CVD-W film) 33 and a top film (Al alloy film) 12, where the surface roughness (Ra) of the bottom film is less than 100 .ANG. and the crystal orientation of the top film formed on this surface is controlled, a CVD method for the making thereof, and a semiconductor device in which the stacked film assembly is employed. Even when there is no lattice matching of the bottom film and the top film, crystal orientation of the top film can be sufficiently controlled to provide a targeted face ((111) face with aluminum film), and in particular it will be possible to readily form a stacked film assembly having a satisfactory barrier function as well as sufficient EM resistance and with good film formation.