Abstract: An improved low-dropout ("LDO") voltage regulator incorporates a transient response boost circuit which is added to the slew-rate limited node at the control terminal of the LDO voltage regulator output transistor and provides improved transient response performance to the application of various load current step stimuli while requiring no standby or quiescent current during zero output current load conditions. The transient boost circuit supplies current to the slew-rate limited node only upon demand and may be constructed as either a localized positive feedback loop or a number of switching devices which conduct current only during slew-rate conditions.

Abstract: A method of providing a MOSFET having improved gate oxide diffusion barrier properties, which comprises providing a partially fabricated MOSFET having an exposed gate oxide surface. During MOSFET fabrication, the surface of the exposed gate oxide is converted to an oxynitride by applying one or both of ions or free radicals of nitrogen to the exposed gate oxide surface. Fabrication of the MOSFET is then completed in standard manner.

Abstract: A method for forming a dual-gate transistor includes the step of forming a gate oxide layer (18) over two transistor regions provided by a P-tank (12) and an N-tank (14). This is followed by depositing a layer of in-situ doped poly (20) and then masking off a portion of the poly layer (20) overlying the P-tank (12). This is then followed by diffusion of P-type impurities into the portion of the poly layer (20) overlying the N-tank (14) associated with the P-channel transistor. This is a process required for forming a DRAM memory. Utilizing the same oxide mask (22), a threshold implant is formed into the N-type (14).

Abstract: A method of removing photoresist material from a semiconductor wafer is disclosed. The method includes rinsing the semiconductor wafer in an organic solvent selected to dissolve the photoresist material. The method next rinses the semiconductor wafer in a light alcohol such as isopropyl alcohol. The method next subjects the semiconductor wafer to an alcohol vapor dry operation. An oxygen plasma ashing operation is then used to oxidize organic material on the semiconductor wafer. This is followed by another rinse. This post ash rinse includes only the light alcohol without the organic solvent. The post ash rinse may include dipping the semiconductor wafers into one or two isopropyl alcohol tanks. Finally is another alcohol vapor dry operation.

Abstract: A reference circuit including a current generation circuit having a first bipolar transistor and a second bipolar transistor connected as a bipolar current mirror and being coupled by way of their emitters and collectors between a voltage source and ground. A MOS circuit is also provided functioning to minimize the voltage difference between the collector of the first bipolar transistor and the second bipolar transistor. In this way, by stabilizing the differences between the voltages at the collector of the first bipolar transistor and at the collector of the second bipolar transistor, the aforementioned problems, i.e., the variations in the output voltage and/or current of the bandgap reference circuit in response to variations in the voltage source, are greatly reduced.

Abstract: A lead frame (10) is connected over an integrated circuit (40) by adhesives (42) and (44). Each lead conductor (16) and (18) of the lead frame (10) has the identical geometric area in order to provide identical capacitances. A metal shield may be provided on adhesives (42) and (44) to provide noise shielding for the integrated circuit (40).

Abstract: A method of preventing adhesion of contacting surfaces of micro-mechanical devices (10). Two materials are selected that are incompatible in the sense that they have at least low solid solubility and preferably, an inability to alloy. One of these materials is used as the first contacting surface (11), and the other as the second contacting surface (17).

Abstract: An electron emitter plate (110) for an FED image display has an extraction (gate) electrode (22) spaced by a dielectric insulating spacer (125) from a cathode electrode including a conductive mesh (18). Arrays (12) of microtips (14) are located in mesh spacings (16), within apertures (26) formed in clusters (23) in extraction electrode (22). Microtips (14) are deposited through the apertures (26). Apertures (26) are arranged in regular, periodic arrays (23, 23', 123, 123') defining lattices having occupied apertured positions and internal unapertured vacancy positions (150, 150'). The insulating spacer (125) is etched to undercut electrode (22) to connect apertured lattice positions, forming a common cavity (141) for microtips (14) within each mesh spacing (16), and leaving central posts (143) at the unapertured vacancies (150, 150'). The etch-out reduces the dielectric constant factor of gate-to-cathode capacitance in the finished structure.

Abstract: A digital video system including a light source and a spatial light modulator system. Varying intensities of light to achieve gray shades either with a monochrome system or within each color can be accomplished in several ways. The intensity of the light source itself can be modulated to provide variation, the spatial light modulator elements can have their states in which light is directed to a surface to form a pixel modulated, or both.