Abstract: An electrically addressable, integrated, monolithic, micromirror device (10) is formed by the utilization of sputtering techniques, including various metal and oxide layers, photoresists, liquid and plasma etching, plasma stripping and related techniques and materials. The device (10) includes a selectively electrostatically deflectable mass or mirror (12) of supported by one or more beams (18) formed by sputtering and selective etching. The beams (18) are improved by being constituted of an impurity laden titanium-tungsten layer (52) with an impurity such as nitrogen, which causes the beams to have lattice constant different from TiW. The improved beams (18) exhibit increased strength, and decreased relaxation and creep.

Abstract: A temperature compensated photovoltaic module (20) comprised of a series of solar cells (22) having a thermally activated switch (24) connected in parallel with several of the cells (22). The photovoltaic module (20) is adapted to charge conventional batteries having a temperature coefficient (TC) differing from the temperature coefficient (TC) of the module (20). The calibration temperatures of the switches (24) are chosen whereby the colder the ambient temperature for the module (20), the more switches that are on and form a closed circuit to short the associated solar cells (22). By shorting some of the solar cells (22) as the ambient temperature decreases, the battery being charged by the module (20) is not excessively overcharged at lower temperatures. PV module (20) is an integrated solution that is reliable and inexpensive.

Abstract: A communication system for identifying, locating, tracking and communicating for other purposes with large numbers of tags in a time and energy efficient manner. The tags are associated with items located in a communication region that is interrogated by an interrogator on a one-to-many basis using broadcast commands, on a one-to-one basis using directed commands or on a combination basis using both methods. Identification occurs through organized transmission and reception of signals between the tags and the interrogator. A batch collection protocol uses a combined one-to-many and one-to-one communication system that effectively resolves communication contentions. The batch collection protocol employs a plurality of collection periods which communicate with large or unknown numbers of portable tags.

Abstract: The spatial light modulator (30) of the DMD type having associated memory cells (10) with a single bit line memory read back architecture (54). The memory cells (10) include a charge equalization switch (50) comprising a transistor connected across the bit lines (16,18) of the memory cell (10). This charge equalization transistor (50) is momentarily turned on (T.sub.3) to balance residual charge on the memory cell bit lines (16,18), after a write cycle (T.sub.2) but before the read cycle (T.sub.4). When the memory cell contents are subsequently read (T.sub.4), the memory cell contents will not change state. A single amplifier (54) is connected to one bit line for reading the memory cell contents. The single bit line (18) memory read back architecture provides a more efficient circuit layout to the spacing constraints required with DMDs, consumes less power than designs with a differential amplifier, and additionally, provides yield improvements.

Abstract: A spatial light modulator (SLM) (20) having a pixel array (21) and a memory cell array (21a). Drivers (23c, 24b, 26, 27, 28) for the memory cell inputs permit pixels (10) of the SLM (20) to be addressed at a higher voltage than the voltage used for peripheral control circuitry (22, 23, 24). Each driver (23c, 24b, 26, 27, 28) has appropriate logic for providing an input signal to the memory cell array (21a) and a voltage translator (60) for changing the voltage level of that signal.

Abstract: A digital micro-mirror device (20) for imaging applications, having an array (21) of mirror elements for forming the image, and having data loading circuitry (22, 23) for loading data for addressing the mirror elements. The data loading circuitry (22, 23) has a row of shift registers (23), which receive data and pass the data to latches (22). Each output of the shift registers (23) is connected to a number of latches (22). For loading a row of data, the row is divided into portions, and the shift registers (23) receive the row of data in sequential portions. It delivers each portion to a different set of latches, each set comprised of a latch from each shift register output. Each set of latches holds its portion of the row of data on bit-lines while the remaining portions of the row are input to the shift registers (23) and passed to other sets of latches (22).

Abstract: A motion adaptive method for vertically scaling an image. The image data is analyzed to obtain a motion magnitude value for each pixel (31). The pixel data is then processed with two scaling processes (35, 36), performed in parallel. One scaling process is better suited for low motion images and the other is better suited for high motion images. The motion magnitude value is used to select between or combine (38) the pixel data outputs of the two scaling processes (35, 36).

Abstract: A monolithic DMD spatial light modulator (20) including a storage cell array (24) of charge storage elements (30). Each charge storage cell (30) is formed using robust MOS processes, and comprises a pair of capacitors (32) having a polysilicon electrode fabricated over a substrate, and separated by a thin oxide dielectric. Each capacitor (32) is shielded by several light impermeable metal shields (37, 64, 66, 68, 72, 74, 80, 82, 88) to prevent discharging due to light incident to SLM (20). The substrate electrode (38) is encompassed by an n+ doped region (42) providing a source of minority carriers to an inversion region under the polysilicon electrode (50).

Abstract: A spatial light modulator (10) of the DMD type having an array of memory cells (16) controlling an array of pixels (12). The memory cell array (16) has several integral, interleaved spare rows of memory cells MR (R1), MR (R2), and MR (R3), which can be selectively utilized to replace a defective row of primary memory cells. A fused row address mapping logic circuit (40) includes a network of fuses (F0-F12) and controls the implementation of memory cells, as well as the mapping of address signals to the memory cells as a function of inputs (R0-R11) received from a row decoder circuit (20). This circuit (40) is transparent to the row address decoder circuit (20). The present invention is suitable for large spatial light modulators compatible with high definition television (HDTV). High yield devices can be obtained with the present invention.

Abstract: A spatial light modulator (SLM) device (30) having a pixel array (31) and an associated memory cell array (36). Each memory cell (10a) receives pixel data from a single bit-line that carries pixel data down columns of the memory cell array (36). Each memory cell (10a) has two latches (21, 25). A first latch (21) receives data from the bit-line. A second latch (25) receives data transferred from the first latch (21) in response to a transfer signal, and is in electrical communication with at least one address electrode (14) of each pixel (10) of the pixel array (31).

Abstract: A method of processing a semiconductor wafer (12) to form micromechanical devices. Extended scribe lines (20) are provided from centrally located integrated circuit scribe lines (16) to provide a saw street that extends to the perimeter of the wafer. Micromechanical devices (14), including those of the DMD type, can be fabricated without a layer of protective oxide while reducing the generation of conductive particles during the wafer saw process which could otherwise degrade the operation of the micromechanical devices having movable elements. The extended scribe lines (20) are fabricated at the same time that the conventional scribe lines (16) are formed about the integrated circuits (14).

Abstract: A spatial light modulator (40,70,80,90,130) operable in the analog mode for light beam steering or scanning applications. A deflectable mirror (42, 72) and which may be hexagonal (92, 132) is supported by a torsion hinge (44,86,94) ends along a torsion axis. A plurality of flexure hinges (48,82,106) are provided to support the ends of the mirror (42,72,92,132) and provide a restoration force. The combination of the torsion hinges and the flexure hinges realizes a deflectable pixel that is operable in the linear range for a large range of address voltages. The flexure hinges also maintain a flat undeflected state when no address voltage is applied, and prevent the pixel from collapsing. The pixel may be reinforced, such as about its perimeter (74) to ensure mirror flatness and prevent warping, even during extreme deflections of the mirror. The pixel is electrostatically deflected by applying an address voltage to an underlying address electrode (60,96,98).

Abstract: Methods are disclosed by which the effects of a defective electromechanical pixel 20 having a beam 30 and a hinge 32,34 are mitigated. These methods may damage the hinge 32,34 or the beam 30 and comprise the step of applying a voltage sufficient to damage the hinge 32,34 or beam 30 of said electromechanical pixel 20 by mechanical overstress, thermal overstress, electrochemical reaction, or thermally induced chemical reaction. Other methods are also disclosed.

Abstract: A large integrated circuit (10) of modular design, each module (12,14,16) having a circuit section (22,24,34) and a separate dedicated testing pad section (20). Each circuit module (12,14,16) can be individually functionally tested as an independent circuit with conventional prober equipment for defects. Each testing pad section (20) facilitates controlling the entire integrated circuit (10) so that the respective module circuit section (12,14,16) can be tested. Control circuitry (26) comprised of pass gates is provided to isolate the testing pad sections (20) from the operational portion (22,24,34) of the integrated circuit (10) when not under test. The present invention is ideally suited for large spatial light modulators, memory devices and other large sophisticated integrated circuits.

Abstract: A communication system for identifying, locating, tracking and communicating for other purposes with large numbers of tags in a time and energy efficient manner. The tags are associated with items located in a communication region that is interrogated by an interrogator on a one-to-many basis using broadcast commands, on a one-to-one basis using directed commands or on a combination basis using both methods. Identification occurs through organized transmission and reception of signals between the tags and the interrogator. A batch collection protocol uses a combined one-to-many and one-to-one communication system that effectively resolves communication contentions. The batch collection protocol employs a plurality of collection periods which communicate with large or unknown numbers of portable tags.

Abstract: A spatial light modulator (40, 70, 80) operable in the analog mode for light beam steering or scanning applications. A deflectable mirror (42, 72) is supported by a torsion hinge (44) along a torsion axis. A plurality of flexure hinges (48) are provided to support the corners of the mirror (42, 72) and provide a restoration force. The combination of the torsion hinges and the flexure hinges realizes a deflectable pixel that is operable in the linear range for a large range of address voltages. The flexure hinges also maintain a flat undeflected state when no address voltage is applied, and prevent the pixel from collapsing. The pixel may be reinforced, such as about its perimeter (74) to ensure mirror flatness and prevent warping, even during extreme deflections of the mirror. The pixel is electrostatically deflected by applying an address voltage to an underlying address electrode (60).

Abstract: A method of immobilizing both (i) a semiconductor wafer (16) during the sawing thereof to form individual chips (18) and (ii) the resulting chips (18) as and after sawing of the wafer (16) is completed. A negative pressure is applied to the wafer (16) through a wafer carrier (12) to immobilize the wafer and individual chips. The negative pressure is applied to the wafer via ports (30) in alignment with the location of each chip (18) to be formed. A grid (40) or negative pressure is used to restrain the chips as they are subsequently transported following sawing.

Abstract: A method and apparatus for forming semiconductor particles (42) for solar cells using an optical furnace (30). Uniform mass piles (26) of powered semiconductor feedstock are almost instantaneously optically fused to define high purity semiconductor particles without oxidation. The high intensity optical energy is directed and focused to the semiconductor feedstock piles (26) advanced by a conveyer medium (16) thereunder. The semiconductor feedstock piles (26) are at least partially melted and fused to form a single semiconductor particle (42) which can be later separated from a refractory layer (18) by a separator (50), preferably comprised of silica. The apparatus (10) and process is automated, providing a high throughput to produce uniform mass, high quality spheres for realizing high efficiency solar cells. The apparatus is energy efficient, whereby process parameters can be easily and quickly established.

Abstract: A digital micro-mirror device (20) for imaging applications, having an array (21) of mirror elements for forming the image and data loading circuitry (22, 23, 24) for loading data for addressing the mirror elements. The data loading circuitry (22, 23, 24) has a row of shift registers (24), which receive one row of data at a time, which they deliver to latches (23). The latches (23) hold the data on bit-lines, which run down columns of the array (21). The row to be loaded is selected with a row decoder (25). A block load circuit (22), comprised of a shift register (35) and logic gates (33) divides each row of memory cells into blocks (31) and ensures that each block of a row of memory cells is sequentially loaded.

Abstract: A Spatial Light Modulator (10) having control circuitry (40,42,44,46) which insures that shorts (70,72) between some of the circuitry will result in "off" state defects. Sets of pixel elements (11) share a memory cell (12), each pixel element (11) in a set being switched to an on or off state by a reset line (13) that is separate from that of the other pixel elements (11) in that set. A pair of address electrode etches (44,46) are separated from each other and straddle a pair of data carrying etches (40,42). A zero is loaded to the data etches (40,42) when not loading memory cell (12) such that a short between the address electrode etches and the data etches will result in an "off" state pixel defect upon a reset pulse.