Patents Represented by Attorney, Agent or Law Firm Robert Groover
  • Patent number: 6029119
    Abstract: The invention is a method and apparatus for the thermal management of computers. The method features determining a temperature of a predetermined location in the computer, reading indirect inputs of the computer, determining desired states of cooling options based on the temperature and the indirect inputs, and placing the cooling options in their desired states. To determine the desired states of the cooling options, an index is formed based on the indirect inputs; and the index indicates to which of a plurality of tables of desired states of the cooling options to refer. Alternatively, the desired states of the cooling options are determined by adjusting the value of the temperature input based on the indirect inputs; the desired states of the cooling options also are dependent on the adjusted value of the measured temperature.
    Type: Grant
    Filed: January 16, 1996
    Date of Patent: February 22, 2000
    Assignee: Compaq Computer Corporation
    Inventor: Lee W. Atkinson
  • Patent number: 6026946
    Abstract: A parking meter contains both optical detection elements, to detect the presence and the diameter of inserted coins, and conventional coils which are inductively coupled to a passing coin and which load a RF oscillator. The optical detection information is used to control the sampling of the frequency of the oscillators which are loaded by the metal in the falling coins. This provides a synergistic way to combine optical detection with electromagnetic detection to achieve compact recognition templates which readily perform difficult discrimination. Addition of a temperature compensation algorithm makes the resulting system extraordinarily insensitive to temperature-dependent variation in the permeability of a falling coin.
    Type: Grant
    Filed: March 9, 1998
    Date of Patent: February 22, 2000
    Assignee: POM, Inc.
    Inventor: Richard E. McCarty, Jr.
  • Patent number: 6026491
    Abstract: A password-phrasing security mechanism utilizing personalized challenge phrasing to prompt the user into remembering a pre-defined personalized coded phrase to gain access to a secured system.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: February 15, 2000
    Assignee: Compaq Computer Corporation
    Inventor: Paul Hiles
  • Patent number: 6025853
    Abstract: A graphics processing chip which uses a deep pipeline of multiple asynchronous units to achieve a high net throughput in 3D rendering. Preferably reads and writes to a local buffer are provided by separate stages of the pipeline. Preferably some of the individual units include parallel paths internally. Preferably some of the individual units are connected to look ahead by more than one stage, to keep the pipeline filled while minimizing the use of expensive deep FIFOs.
    Type: Grant
    Filed: March 24, 1995
    Date of Patent: February 15, 2000
    Assignee: 3DLabs Inc. Ltd.
    Inventor: David Robert Baldwin
  • Patent number: 6023402
    Abstract: A control circuit for the regulation of fan speed control in a computer power supply with software controlled shutdown and automatic restart for over-temperature protection. The control circuit overrides the control inputs when the temperature inputs indicate a temperature above a specific level.
    Type: Grant
    Filed: February 11, 1998
    Date of Patent: February 8, 2000
    Assignee: Compact Computer Corporation
    Inventor: George A. Kaminski
  • Patent number: 6020722
    Abstract: A method for charging nickel metal hydride and comparable batteries, in which the applied voltage is clamped to a temperature-dependent and current-dependent value which is greater than the constant voltage during most of the charging cycle, but less than any voltage at which gassing can occur.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: February 1, 2000
    Assignee: Compaq Computer Corporation
    Inventor: Joseph F. Freiman
  • Patent number: 6018229
    Abstract: A sealed rechargeable lithium-ion battery pack which includes a switching voltage regulator. The regulator uses the normal cutoff transistors as the switching devices, and also includes a discrete inductor in the battery pack. The regulator is operated with programmable voltage and current parameters, under control of a microcontroller which is also inside the sealed battery pack enclosure.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: January 25, 2000
    Assignee: Compaq Computer Corporation
    Inventors: Nathan Mitchell, Joseph F. Freiman, Thomas Sawyers
  • Patent number: 6009524
    Abstract: An improved system and method for FLASH BIOS upgrades which is particularly useful in network hubs. Each hub or node which is equipped with a FLASH memory is also equipped with a validation system, which ensures that a received FLASH upgrade is authorized and uncorrupted. Each set of instructions to be flashed is marked both with a vendor authorization digital signature and also a system administrator authorization digital signature, and BOTH digital signatures must be recognized by the validation system before the FLASH memory will be upgraded. Because digital signatures are used for security purposes, flash upgrades can be performed from any location on the network, and are not limited to an administrative node.
    Type: Grant
    Filed: August 29, 1997
    Date of Patent: December 28, 1999
    Assignee: Compact Computer Corp
    Inventors: Sompong P. Olarig, Michael F. Angelo
  • Patent number: 6008630
    Abstract: A snubber circuit with two switches which are switched together. The two switches form a pair of active networks with complementary diode locations, and a capacitor is connected to provide a path for transient current through both diodes. The two switches are preferably switched simultaneously to minimize conduction losses. When Switches S1 and S2 are turned off, the voltage through across capacitor Cs is nearly zero. Turning off S1 and S2 causes current flowing through S1 and S2 to be diverted through D1, Cs, and D2. Therefore, the voltage across S1 and S2 is a very low value and consequently, the turn-off losses are low. Alternatively, at the time when S1 and S2 are turned on, the peak current through S1 and S2 is equal to the boost inductor current. Therefore switching losses are minimized and the converter can operate at higher frequencies.
    Type: Grant
    Filed: July 2, 1998
    Date of Patent: December 28, 1999
    Assignee: Compact Computer Corporation
    Inventor: Atluri Rama Prasad
  • Patent number: 6005368
    Abstract: A portable computer and docking station combination, comprising first and second batteries and first and second battery charging circuit portions, with automatic sequencing of charging between the batteries. The system includes means for charging a first battery based on an amount of current flowing into the computer circuitry, and means for charging a second battery based on an amount of current flowing into the first battery and into the computer circuitry.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: December 21, 1999
    Assignee: Digital Equipment Corporation
    Inventor: Robert C. Frame
  • Patent number: 5991883
    Abstract: A system and process for power conservation in a portable computer system. When the application or hardware in use allows for reduced video performance, the refresh rate of the video graphics controller is reduced to a level which allows practical use of the display but consumes much less power than a normal mode.
    Type: Grant
    Filed: July 23, 1996
    Date of Patent: November 23, 1999
    Assignee: Compaq Computer Corporation
    Inventor: Lee Atkinson
  • Patent number: 5978913
    Abstract: A fast boot computer which has three user-selectable modes of performing POST operations. The user can select full POST or quick POST be performed, as in conventional computers. However, he can also select an intermediate mode, wherein the full POST is performed if and only if a given number of days (as programmed by the user) have elapsed since the last full POST operation. This permits users to set their own trade-off between fast boot operation and maximum reliability.
    Type: Grant
    Filed: March 5, 1998
    Date of Patent: November 2, 1999
    Assignee: Compaq Computer Corporation
    Inventors: Paul J. Broyles, Mark A. Piwonka, Cuong V. Nguyen
  • Patent number: 5966017
    Abstract: Systems, methods, and probe devices for electronic monitoring and characterization using single-ended coupling of a load-pulled oscillator to a system under test.
    Type: Grant
    Filed: May 5, 1998
    Date of Patent: October 12, 1999
    Assignee: Phase Dynamics Inc
    Inventors: Bentley N. Scott, Samuel R. Shortes
  • Patent number: 5945806
    Abstract: A battery pack which contains an integral bidirectional up/down voltage converter, so that the voltage of the battery does not have to match the voltage of the system power lines at all. Thus a single battery pack can be used in different systems which have different power bus voltages.
    Type: Grant
    Filed: August 29, 1997
    Date of Patent: August 31, 1999
    Assignee: Compaq Computer Corporation
    Inventor: Richard A. Faulk
  • Patent number: 5929606
    Abstract: A universal battery pack which contains an integral DC-DC switching power converter, with an asymmetric ripple-suppression topology which suppresses ripple at the power output terminals during discharging.
    Type: Grant
    Filed: August 29, 1997
    Date of Patent: July 27, 1999
    Assignee: Compaq Computer Corporation
    Inventor: Richard A. Faulk
  • Patent number: 5917305
    Abstract: A standardized and universal application-specific language for operation of any battery type where measured values of voltage, current, temperature, and/or power are used to control battery operation to optimize battery life, and prevent damage to the battery and the system in which it resides.
    Type: Grant
    Filed: December 11, 1997
    Date of Patent: June 29, 1999
    Assignee: Compaq Computer Corporation
    Inventor: Richard A. Faulk
  • Patent number: 5911947
    Abstract: A method for fan-folding lithium-ion-polymer battery cells, wherein gaps are left in the active material at fold locations of the metallic backing conductor. This avoids fatigue at the fold locations when the active materials expand and contract during charge and discharge.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: June 15, 1999
    Assignee: Compaq Computer Corporation
    Inventor: Nathan Mitchell
  • Patent number: 5909210
    Abstract: A method of determining an object's position and associated apparatus provides positional information in a form that may be conveniently communicated to a computer to calculate the object's position. In a preferred embodiment, representatively incorporated in a computer keyboard, a method of determining an object's position includes forming an optical grid of reflected beacons and detecting an obstruction of the reflected beacons. The preferred embodiment apparatus utilizes a single light source and a single light sensor to detect an object's position in two dimensions.
    Type: Grant
    Filed: March 20, 1997
    Date of Patent: June 1, 1999
    Assignee: Compaq Computer Corporation
    Inventors: Richard M. Knox, John R. Masters, Kevin F. Clancy
  • Patent number: 5907197
    Abstract: A portable computer system which includes a modified C-7 power cord socket, which can receive either an AC power cord with a standard C-7 connector or a DC power cord with a modified C-7 connector. (However, the modified C-7 connector cannot be inserted into a standard C-7 socket.) Microswitches in the modified power cord socket detect the presence of the DC connector, and automatically adjust the power conversion circuit accordingly.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: May 25, 1999
    Assignee: Compaq Computer Corporation
    Inventor: Richard A. Faulk
  • Patent number: RE36311
    Abstract: A description is given of two versions of an integrated structure in the emitter switching configuration comprising a high-voltage bipolar power transistor and a low-voltage MOS power transistor. In the vertical MOS version, the emitter region of the bipolar transistor is completely buried, partly in a first N- epitaxial layer and partly in a second N- epitaxial layer; the MOS is located above the emitter region. The bipolar is thus a completely buried active structure. In the horizontal MOS version, in a N- epitaxial layer there are two P+ regions, the first, which constitutes the base of the bipolar transistor, receives the N+ emitter region of the same transistor; the second receives two N+ regions which constitute the MOS source and drain regions, respectively; the front of the chip is provided with metal plating to ensure the connection between the MOS drain and the bipolar emitter contacts.
    Type: Grant
    Filed: June 2, 1994
    Date of Patent: September 21, 1999
    Assignee: SGS-Thomson Microelectronics, S.r.l.
    Inventors: Ferruccio Frisina, Giuseppe Ferla