Patents Represented by Attorney Robert J. Haase
  • Patent number: 4021838
    Abstract: A power bus element for use in large scale integrated circuits is described. Each bus element consists, for example, of a chip of silicon having two levels of metallization thereon, one acting as an earth (or ground) return plane and the other providing power voltages. Dependent contacts on the chip make selective contact with metallization over the surface of the semiconductor wafer on which the chip is mounted. A power distribution line consists of a number of such bus elements linked together.
    Type: Grant
    Filed: October 20, 1975
    Date of Patent: May 3, 1977
    Assignee: International Business Machines Corporation
    Inventor: William Arthur Warwick
  • Patent number: 4015203
    Abstract: An inductively coupled oscillator method for inducing eddy currents in a semiconductor PN junction wafer while irradiating said wafer with pulsed light of selected intensity. The oscillator loading due to the pulsed light modulated eddy current losses is monitored and displayed on an oscilloscope in the form of a decay time plot of voltage amplitude, the plot being a function of the pulsed light intensity and the recombination rate of light-induced electrons and holes on each side of the junctions. The leakage characteristics of the junctions which are desired to be measured are one of the factors determining said rate. Leakage characteristic is made the predominant factor by setting the intensity of the pulsed light to a value which produces a nearly straight line decay time plot on the oscilloscope display. The slope of the line then is a measure of the leakage characteristic.
    Type: Grant
    Filed: December 31, 1975
    Date of Patent: March 29, 1977
    Assignee: International Business Machines Corporation
    Inventor: Roger Leonard Verkuil
  • Patent number: 4005469
    Abstract: A clamped epi-base NPN transistor with very short saturation time constant is obtained by ion implantation in the P-type base region to convert a portion thereof to N.sup.- conductivity type contiguous to the collector reach-through region. The converted region is contacted by an extended metal electrode which also contacts the base region. The metal electrode establishes ohmic contact to the base region and Schottky diode contact to the converted region and to the collector region connected thereto.
    Type: Grant
    Filed: June 20, 1975
    Date of Patent: January 25, 1977
    Assignee: International Business Machines Corporation
    Inventors: Augustine Wei-Chun Chang, Vincent Joseph Lucarini
  • Patent number: 4004044
    Abstract: A lift-off method for use in depositing thin films in the fabrication of integrated circuits which avoids edge tearing of the films. The method involves depositing an organic polymeric first masking material on a substrate, and forming on said material a layer of a polydimethylsiloxane resin material. The material, in turn, is covered by a second masking layer, preferably an organic polymeric resist material into which openings are placed in a selected pattern utilizing lithographic techniques. Then, conforming openings are placed in the underlying polydimethylsiloxane resin material and the openings are extended through the underlying resist material by successive reactive sputter etching steps to expose the substrate surface in the aforesaid selected pattern. The thin film to be deposited is then applied over the resulting structure; it is, thereby, deposited on the substrate in said openings.
    Type: Grant
    Filed: May 9, 1975
    Date of Patent: January 18, 1977
    Assignee: International Business Machines Corporation
    Inventors: Jack R. Franco, Janos Havas, Lewis J. Rompala
  • Patent number: 3983544
    Abstract: A split random access memory array is integrated with a read only storage array and shares the same sense and bit decode circuitry. Each bit line of the integrated array is provided with an isolation switch between the random access and read only portions. The switch conducts when reading the read only portion but does not conduct (isolates) when writing or reading the random access portion. The isolation switch also permits the initialization of the shared differential sensing latch and facilitates the rapid writing and reading of the random access portion by removing the bit line loading due to the read only portion on such occasions.
    Type: Grant
    Filed: August 25, 1975
    Date of Patent: September 28, 1976
    Assignee: International Business Machines Corporation
    Inventors: Richard Thomas Dennison, Leo Boyes Freeman, Helen Janet Kelly, Peter Tsung-Shih Liu
  • Patent number: 3970487
    Abstract: A method for manufacturing a power transistor having a highly doped emitter zone and a narrow base zone with a flat doping profile.In a long-term diffusion step ensuring the flat doping profile, the base zone is diffused into a lowly doped substrate serving as a collector. In a subsequent etching process, the base zone is etched down to a shell-shaped remainder. A large area, highly doped emitter zone with a steep doping profile and thus a high emitter efficiency is introduced into this shell-shaped remainder in a short-term diffusion step.
    Type: Grant
    Filed: June 16, 1975
    Date of Patent: July 20, 1976
    Assignee: International Business Machines Corporation
    Inventors: Manfred Dahmen, Anneliese Ritzhaupt, Manfred Zurheide
  • Patent number: 3961355
    Abstract: A semiconductor device has a heavily doped semiconductor substrate with a lightly doped epitaxial layer overlying a surface of the substrate and of the same conductivity type as the substrate. Electrically insulating barriers extend from at least the surface of the epitaxial layer into the substrate so as to electrically isolate non-common areas of each surface leakage sensitive device within the epitaxial layer from the non-common areas of adjacent surface leakage sensitive devices.
    Type: Grant
    Filed: November 18, 1974
    Date of Patent: June 1, 1976
    Assignee: International Business Machines Corporation
    Inventors: Shakir A. Abbas, Chi S. Chang, Leo B. Freeman, Jr., Ronald W. Knepper