Abstract: A "diagramming debugger" creates a graphical representation of the sequence of messages sent during operation of an object-oriented program. When one object transmits a message to another object, the diagramming debugger displays representations of the transmitting and receiving objects on a computer screen, each representation comprising a box with labels identifying the represented object. The box representing a sending object includes therewithin a symbol (comprising, for example, one or more characters) identifying the method that sent the message, while the box representing the receiving object includes therewithin a symbol identifying the method invoked by the message. The message is represented by an arrow pointing from the symbol identifying the sending method to the symbol identifying the invoked method.

Abstract: A device for generating a digitizing pulse for sampling an analog video signal includes a phaes-locked-loop (PLL) circuit and a phase offset circuit. The PLL circuit generates a correction pulse required to bring an output signal of digitizing pulses in phase with a reference horizontal sync signal. The phase offset circuit includes a digital memory which stores a digital number representative of a fraction of a pixel pulse that is desired as phase offset of the digitizing pulse. This fraction is converted into an offset current pulse having a duration equal to the duration of a pixel pulse and an amplitude that is the fraction of a maximum amplitude. The offset current is added to the PLL correction current for generating an output signal of digitizing pulses having the desired phase offset relative to the pixel pulses.

Abstract: A first surface of a first metal component of an ink jet print head is bonded to a second surface of a second metal component of the ink jet print head, the first and second surfaces being of materials having the same or similar coefficients of thermal expansion. A layer of filler material is electroplated or otherwise placed on at least one of these surfaces. The filler material has a melting point which is below the melting point of the first and second components, and the total thickness of the filler material on the surfaces together is in the range of from approximately one-sixteenth micron to approximately five microns, with one-eighth micron to two microns being a preferred range. These surfaces are placed together and subjected to heat and pressure to diffusion bond the surfaces without melting the filler material. The diffusion bonding is performed in one approach until no more than approximately one micron of filler material remains between the surfaces.

Abstract: A first surface of a first metal component of an ink jet print head is bonded to a second surface of a second metal component of the ink jet print head, the first and second surfaces being of materials having the same or similar coefficients of thermal expansion. A layer of filler material is electroplated or otherwise placed on at least one of these surfaces. The filler material has a melting point which is below the melting point of the first and second components, and the total thickness of the filler material on the surfaces together is in the range of from approximately one-sixteenth micron to approximately five microns, with one-eighth micron to two microns being a preferred range. These surfaces are placed together and brazed under low pressure. Preferably, the braze pressure is from about one-half psi to no more than about one hundred psi, with about ten psi being most preferred.

Abstract: A stereoscopic graphics display system (10) has a stereoscopic window controller (18) that generates multiple windows (72 and 74) within which multiple images (76 and 78) are formed. The stereoscopic window controller directs the graphics display system to render around each window a border (80 and 82) representing an outline of the window. Each of the borders is rendered with zero binocular disparity to assist an observer to perceive the three-dimensional qualities of steroscopic images. Depth cue contradictions between stacked windows are reduced by rendering with zero binocular disparity the images in occluded windows.

Abstract: The colorimetric parameters of a color sample (42) that is illuminated by a reference light are processed for reproduction by a video monitor (20) or the like. A color filter assembly (40) and associated sensor (28) are used to generate signals indicative of the colorimetric parameters of the illuminated color sample (42). A computer (24) transforms the signals into a form suitable for driving a video monitor (20) to reproduce the color sample (42) on the monitor screen.

Abstract: A sample and hold circuit made entirely of NPN transistors, capacitors and resistors uses double emitter-follower transistors for gating an input signal onto a charging capacitor. A transistor connected in parallel to the first of the emitter-follower transistors is controlled to conduct blow-by current away from the second emitter-follower transistor in the hold state. A step voltage is applied to the charge capacitor in the hold state to prevent turn on of the emitter-follower transistors. The circuit is configured with complementary components so that a differential output signal eliminating the step voltage is provided.

Abstract: A block diagram editor system and method is implemented in a computer workstation that includes a Cathode Ray Tube (CRT) and a mouse, graphics and windowing software, and an external communications interface for test instruments. The computer is programmed for constructing, interconnecting and displaying block diagrams of functional elements on the CRT. From prestored routines for each functional element, the software assembles and executes a program that emulates the functional operations of each element and transfers data from output from each element in turn to an input of a succeeding block, as determined by the block diagram configuration. The block functions include signal generating and analysis functions, and functions for control of various types of test instruments, which can be interactively controlled through the CRT and mouse. The computer converts desired outputs of the instruments into control settings and receives, analyzes and displays data from the instruments.

Abstract: An integrated support structure provides for improved mounting of components such as circuit boards, disk drives, power supplies, and the like. The structure includes an upper frame and a lower frame hinged together and having cooperative elements for capturing components therebetween as the upper frame and lower frame are brought adjacent to one another in parallel relation. A sliding guide and bridge beam clip secure a disk drive to the structure while a hook and spring latch mount a power supply. The frames are suitably formed by structural foam injection molding and the components are secured to the structure without the need for screws. The entire assembly may be inserted in a shell or case for protection thereof. The overall configuration allows rapid assembly for production and rapid disassembly for service.

Abstract: An improved graphics display system includes a picture processor for processing display lists defining graphic designs, the display lists comprising pixel data and/or instructions for generating pixel data. The system further includes a display controller which stores pixel data in a frame buffer memory and controls a display of graphic designs in accordance therewith. When a display list defining a graphic design is changed but the design is not to be displayed, the display list is processed by the picture processor, but the output pixel data generated by the picture processor is routed not to the display controller but to a control processor which stores the generated pixel data in a second memory. When the design is thereafter to be displayed, the control processor generates a secondary display list including the pixel data stored in the second memory to the picture processor.

Abstract: A computer terminal work station having multiple peripheral units simultaneously interconnected into the terminal. A micro processor controller is provided in the terminal and a micro processor slave is provided in each of the peripheral units. Each unit is provided with a bus segment and means to interconnect the bus segments to each other. A single cable extends from the terminal to one of the peripheral units to be connected to the bus segment of that unit, and thereby to the bus segments of all the interconnected units. The units are selectively mechanically interlocked as desired.

Abstract: A circuit board is fabricated from a substrate of dielectric material having at least one run of conductive material adhered to one surface thereof. A second substrate of dielectric material is bonded to the one surface of the first substrate so as to cover the run of conductive material. A hole is formed through the first and second substrates and intercepts the run of conductive material. Conductive material is introduced into the hole and establishes electrically conductive contact with the run of conductive material. The diameter of the hole is at least as great as the width of the run of conductive material where it is intercepted by the hole.

Abstract: A method and apparatus for determining the effective bits of resolution of a digitizer wherein amplitude, frequency, phase angle and offset parameters characterizing a sinewave input signal to the digitizer are estimated from the waveform data sequence produced by the digitizer in response to the input signal. These estimated parameters are used to develop a model of the sinewave signal, and the effective bits of resolution of the digitizer are then determined by the comparing measured magnitudes of the sinewave signal as represented by the waveform data sequence to estimated magnitudes of the input signal being determined from the model.

Abstract: An electronic circuit is tested by applying a sequence of test vectors to the input port of the circuit as a plurality of sub-sequences each including at least one test vector. Serial scan vectors provided at a serial scan port of the circuit are examined after each sub-sequence, and determination is made as to whether a part of the serial scan vector indicates the presence of a defect in the circuit. In the event that a part of the serial scan vector indicates the presence of a defect in the circuit, information that identifies the number of serial scan vectors that have previously been examined and the part of the serial scan vector that indicates the presence of a defect in the circuit is made available for analysis.

Abstract: An object-oriented, distributed data base system separates into a plurality of virtual partitions following communication failure between sites accessing the data base. Each partition accesses a separate copy of an initial data base and independently updates groups of data objects included in the data base to add new versions of data objects to the data base. Each virtual partition maintains a copy of all previous versions of data objects and maintains a change list describing all group updates that it executes. Following restoration of communication between sites, each virtual partition merges the data bases maintained by separate partitions to form a consistent merged data base permitting versions of data objects and collections of data objects created by any one of the separate virtual partitions to be identified and accessed in the merged data base.

Abstract: An apparatus for counting occurrences of a plurality of events characterized by unique event numbers includes a random access memory for storing event count numbers at addresses corresponding to the event numbers. The memory is addressed by an event number as the associated event occurs, and the event count number stored at such address is read and latched to an input of an adder. The adder increments the latched event count number and the incremented event count number is then written back into the memory at the current event number address. A buffer is provided to store the current event number whenever the adder overflows as a result of a count. Several such event numbers may be stored in the buffer for subsequent retrieval by an external controller thereby permitting the controller to determine when an event has been counted a fixed number of times and to increment its own internally stored count at a slower rate than the rate at which data is applied to the prescaler.

Abstract: A method and apparatus for reversibly transforming color, which is selected from a gamut of colors producible by the primaries of a color display device (20), into a perceptually uniform color space. The coordinates of the color space are readily convertible into internationally accepted standards for color measurement. Also provided, is a method for transforming the color space coordinates of a selected color into the corresponding relative primary intensity levels of the display device (20).

Abstract: A memory pointer circuit includes a plurality of counters and a programmable logic array for controlling the counters to generate addresses for an acquisition memory. The programmable logic array directs a lower counter to generate a repeating sequence of addresses to store data before an event occurs, each pass through the sequence causing previously written data to be overwritten until an event has occurred and is stored in memory. The programmable logic array then directs the upper counters to increment and the lower counter to generate a following sequence of addresses to store data after the event occurs. Once the following sequence is complete, the upper counters are again incremented and the repeating sequence of addresses is again generated. The procedure is repeated to store multiple clusters of data and events in the acquisition memory. Once the acquisition memory is full, the stored data and events can be saved or overwritten.

Abstract: The present invention constitutes a differential amplifier system (50) including a main differential amplifier (60) and a compensating differential amplifier (90) which are coupled together in a complementary manner to provide a composite output signal.The amplifiers are of similar construction but have different circuit component values. Each of the amplifiers is of the differential type and includes emitter-coupled transistors (62) and (64) or (92) and (94), a feedback resistor (66) or (96) connected between the emitter leads (78) and (80) or (108) and (110) of these transistors and a pair of constant-current sources (68) and (70) or (98) and (100) separately connected to different ones of the emitter leads of the transistors. The circuit values of the constant-current sources and feedback resistors in the two amplifiers are different and are adjusted to allow the output of the compensating amplifier to cancel primary nonlinearities in the output of the main amplifier.

Abstract: A bipolar-CMOS (Bi-CMOS) digital interface circuit (50) of the present invention provides an interface between a bipolar digital circuit (52) and a CMOS digital circuit (54). The digital interface circuit includes a digital transform circuit (56) that receives a bipolar logic signal generated by the bipolar digital circuit and transforms the signal into an intermediate logic signal whose voltage waveform is positioned symmetrically about a logic threshold generated by a CMOS digital input circuit (58). The CMOS digital input circuit receives the intermediate logic signal and generates a CMOS logic signal that is delivered to the CMOS digital circuit, thereby to interface the CMOS digital circuit with the bipolar digital circuit.