Abstract: Circuitry for selectably connecting the body node of drive transistors of a motor control circuit. In particular, those transistors that are turned off when operating the motor in a unipolar mode have their body nodes switched so as to be connected to a reference voltage, such as ground, during unipolar mode, and to be connected to the transistor source during bipolar mode (i.e., when the transistors are active). The circuitry also is operable to briefly connect the body nodes of the transistors to their source when the opposing drive transistor is commutated, in the unipolar mode. In this way, forward biasing of inherent diodes in the drive transistor is avoided in unipolar mode, except when useful to clamp the inductive kick of the motor coils.

Abstract: Methods of forming, in an integrated circuit, aluminum-silicon contacts with a barrier layer is disclosed. The barrier layer is enhanced by the provision of titanium oxynitride layers adjacent the silicide film formed at the exposed silicon at the bottom of the contact. The titanium oxynitride may be formed by depositing a low density titanium nitride film over a titanium metal layer that is in contact with the silicon in the contact; subsequent exposure to air allows a relatively large amount of oxygen and nitrogen to enter the titanium nitride. A rapid thermal anneal (RTA) both causes silicidation at the contact location and also results in the oxygen and nitrogen being gettered to what was previously the titanium/titanium nitride interface, where the oxygen and nitrogen react with the titanium metal and nitrogen in the atmosphere to form titanium oxynitride. The low density titanium nitride also densifies during the RTA.

Abstract: A circuit for operating a polyphase dc motor that has a plurality of driving coils has circuitry for receiving the back emf of at least one of the driving coils at a time when the at least one of the driving coils is in a floating state prior to the desired commutation sequence. Circuitry is provided for determining an anticipated direction the back emf will cross a reference voltage based upon the desired commutation sequence. And circuitry is also provided for determining if the back emf received by the circuitry for receiving the back emf crosses a reference voltage from other than the anticipated direction.In addition, a method for operating a polyphase dc motor having a plurality of driving coils includes determining the actual instantaneous position of the rotor of the motor by determining when the back emf of at least one coil at a time when the at least one coil is in a floating state prior to the desired commutation sequence crosses a reference voltage from a predetermined direction.

Abstract: A method of producing a velocity volume for a seismic survey volume, based on two-way time seismic data and process velocity data, is disclosed. Two-way time seismic data is loaded into a computer for a plurality of seismic shot lines in the survey region, as are process velocities for common depth points (CDPs) in the survey region. The process velocities correspond to velocities used to perform normal move-out, dip move-out, migration and other imaging processes. The computer can display the two-way time information in cross-section or map views, and can display the velocity functions as a function of two-way time. The human analyst enters interpreted velocities, based on actual data or on visualization of the horizons, into the cross-sectional view of the seismic shot line, and then edits the input velocity data to produce a velocity function, for each CDP of interest, that matches the interpreted values.

Abstract: In a disk drive, the read-write heads of the disk drive should be parked during a power failure. The kinetic energy of the spinning rotor is used to move the head away from the disk's surface. A high voltage is produce from the low voltage spindle motor by using a BEMF voltage to step up the voltage in a voltage supply capacitor to a higher voltage by enabling or disabling a switch connected to a comparator. When the switch is turned on, it shorts the rectified voltage in the stator windings to ground in order provide a current path for a current formed in the coils by the BEMF. When the current reaches a predetermined level, the switch is turned off. The current flows through the voltage supply capacitor so that its voltage is "kicked-up" by the inductance of the windings and by the BEMF still present in the stator windings. This increased voltage is used to park the heads and to brake the motion of the spindle. Two control feedback loops are used to more efficiently enable the voltage conversion.

Abstract: An integrated circuit package of the surface-mountable type within which a battery is mounted is disclosed. Battery leads extend from the side of the package body opposite that which is adjacent the circuit board when mounted, and between which a conventional battery may be placed. Standoffs are located on the package body for supporting the battery above the package body, so that a gap is present therebetween. A housing is attached to the package over the battery, and has standoffs attached to its inner surface so that a gap is also present between the housing and the battery. The gaps may be air gaps or filled with a low thermal conductivity material. The gaps thermally insulate the battery from the package body and housing, so that the circuit may be subjected to solder reflow mounting to a circuit board, while insulating the high temperatures from the battery.

Abstract: A kelvin current sensing circuit in an integrated control circuit that controls the current flowing through the driving coils of a polyphase DC motor. The invention provides for adjusting the voltage to the lower driver transistors of the control circuit by having the kelvin current sensing occur internally within the chip. A ground compatible differential amplifier circuit is used in one embodiment. Each of the lower transistors are connected to the base of respective PNP transistors, the emitters of which being connected together to control one side of the differential amplifier. A control voltage is applied to the other side of the differential amplifier. The output of a comparator, that is connected to the differential amplifier, is used to control the operation of the lower driver transistors. Therefore all of the sensing is done internally in the semiconductor chip. The voltages are taken at the source of each of the lower transistors.

Abstract: An integrated memory circuit having special stress test mode capability, and that is safely controlled by edge transition detection, is disclosed. The memory includes a test mode enable circuit that generates a test mode enable signal responsive to receiving overvoltage signals or other codes at terminals of the memory; the test mode enable signal is presented to the edge transition detection circuitry, so that the edge transition detection pulse that would otherwise initiate a memory operation is not generated during special test mode. This prevents the disastrous possibility that memory functions would be initiated by false edge transition detection signals (such as may occur during ramping of supply voltages to stress levels) during the special test mode. Special tests, such as stress tests and long write cycle disturb tests, may thus be safely performed.

Abstract: A system and method are provided for disabling the edge transition detection circuit during the flash clear cycle, thereby preventing the generation of an edge transition detection pulse. In a preferred embodiment of the invention, the edge transition detection circuit is connected to the flash clear complement circuitry through a logic gate. During the flash clear cycle, flash clear true, FC.sub.T, is pulled high, flash clear complement, FC.sub.c, is pulled low and inverted to drive a portion of the ETD circuitry high, thereby preventing generation of an ETD pulse during the flash clear cycle.

Abstract: A method and circuit are disclosed which can be incorporated into any circuitry which uses fused algorithms to control the circuitry. Specifically, the invention may be incorporated into an integrated circuit device by way of a circuit that controls the coupling of an input signal to an output. Careful placement of a fuse or similarly functioning element in the circuit, permits the output of said circuit to be reliably set to a desired logic state. Specifically, when the fuse element is opened, a portion of the feedback path is disconnected, thereby preventing feedback in the direction of the unwanted logic state. The present invention enables construction of a fuse circuit which latches a desired logic state with stable performance and no layout area or speed degradation.

Abstract: A fuel delivery system in an engine is provided with a fuel flow stabilizing device for instantaneously providing a precise amount of fuel to the engine according to a particular fuel demand. The fuel flow stabilizing device has an accumulator device which stores a reserve amount of fuel under pressure and supplies or accepts excess fuel in response to a change in fuel pressure in the fuel delivery system. The accumulator device allows a simpler fuel pump motor and control system to be used as fuel pump response time requirements are reduced.

Abstract: A circuit and method for detecting when the back emf of a motor coil passes a predetermined level includes circuitry for providing a voltage proportional to the back emf of the motor coil, and circuitry for providing a voltage proportional to a reference potential. A first bias voltage is added to the voltage proportional to the back emf to produce a first added voltage, and a second bias voltage is added to the reference potential when the back emf of the motor coil is expected to change in a predetermined direction to produce a second added voltage. A comparator produces an output change when the first added voltage becomes larger than the second added voltage at the predetermined level.

Abstract: A full wave rectifier includes an amplifier having a minus input, a plus input and an amplifier output; an input resistor connected between a circuit input and the minus input; and a current bridge having an output terminal connected to the circuit output, a first terminal connected to the minus input and a second terminal connected to the amplifier output. The current bridge includes a first current mirror circuit and a second current mirror circuit. The first current mirror circuit includes a first current source and a second current source, a source end of each current source of the first and second current sources being connected to the first terminal, a drain end of the first current source being connected to the second terminal and a drain end of the second current source being connected to the output terminal.

Abstract: An integrated circuit memory is disclosed which has its primary memory array arranged into blocks and which has redundant columns, each of which can replace a column in any one of the blocks. The redundant columns are selected by way of a redundant column decoder, associated with each column. A plurality of redundant sense amplifiers are each associated with selected redundant columns. Each of the redundant column decoders includes a set of address fuses for storing the column address responsive to which its associated redundant column is to be selected, and which are in series with pass gates which are turned on when redundancy is enabled, and turned off otherwise. This arrangement of address fuses and pass gates reduces and balances the loading of the decoder on the address lines, may be implemented with fewer transistors and thus in reduced chip area relative to conventional decoders, and also reduces the propagation delay through the decoder.

Abstract: Circuitry for producing a transition detection signal of adequate and optimized duration is disclosed. A transition detection circuit is associated with each of the input terminals from which transitions are to initiate an operating cycle, such as precharge and equilibration in a memory access cycle. Each transition detection circuit produces, responsive to a logic transition at its associated terminal, a transition detection pulse. Those transition detection circuits which produce only brief transition detection pulses are coupled to a centralized summing circuit. The summing circuit generates the transition detection circuit from the logical combination of the transition detection circuits, and includes a delay circuit to lengthen the brief incoming transition detection pulse to the desired duration. In this way, a single placement of the summing circuit can be used to optimize the transition detection pulse duration for initiation of the operating cycle of the integrated circuit.

Abstract: A clock generator circuit for producing a clock signal while drawing reduced current drain is disclosed. The clock generator circuit includes a crystal oscillator which produces a periodic signal having a relatively small voltage swing, controlled by one or more reference voltages; the reference voltages are preferably produced by a sub-threshold biased voltage reference circuit. The small signal output of the crystal oscillator is applied to the first of a series of frequency divider stages, prior to amplification by a level shift circuit. Each divider stage includes a current switch which switches the current drawn through current divider legs to produce output signals to latches in the divider stage. Each divider stage also includes one or more current source switched latches, each controlled by current sources that are switched by the current switch.

Abstract: An integrated circuit package is disclosed, of the type having a pin-fin heat sink attached to the surface. A flat plate is attached to the ends of the pins of the heat sink, to provide a planar surface area of adequate size to allow a vacuum pickup tool to pick and place the packaged integrated circuit, and to receive marking and symbolization.

Abstract: A wideband current multiplying divider circuit that produces an output current of any ratio to the input current has a first bipolar transistor and a first reference current source connected in series between a supply voltage and ground. A second bipolar transistor and a second reference current source are also connected in series between the supply voltage and around. A summation current source is connected at one side to ground and at the other side to a divided current path. A first resistor is connected in series with the station current source between a base of the first bipolar transistor and ground, and through which an input current can be connected to flow. A second resistor is connected in series with the summation current source between a base of the second bipolar transistor and ground, and through which an output current can be connected to flow.

Abstract: An integrated circuit memory is disclosed which has its primary memory array arranged into blocks and which has redundant columns, each of which can replace a column in any one of the blocks. The redundant columns are selected by way of a redundant column decoder associated with each column, each of which includes a set of address fuses into which an address is programmed, responsive to which its associated redundant column is to be selected. A plurality of redundant sense amplifiers are each associated with selected redundant columns, and are each controlled to begin the sense operation prior to propagation of the address signal through the redundant column decoders and summing circuitry. In the event that the received memory address does not match any of the programmed values in the redundant column decoders associated with a redundant sense amplifier, the sense operation is terminated.

Abstract: A packaged integrated circuit and method of manufacturing the same is disclosed. The semiconductor integrated circuit chip is mounted and bonded to a lead frame in the conventional fashion, and an inner molded body is formed therearound. The leads of the lead frame have inner and outer dambars, with the inner dambars located so as to prevent bleedout of mold compound during the molding of the inner body. Upon removal of the inner dambars, two tie bars become floating and are then formed to extend above the inner molded body so as to make contact to an electrochemical cell that is attached to the inner molded body. An outer body is then molded to surround the inner molded body and the cell, with the outer dambars located so as to prevent bleedout of mold compound. Removal of the outer dambars and formation of the leads into the desired shape completes the assembly of the packaged integrated circuit.