Patents Represented by Attorney Ronald Craig Fish
  • Patent number: 4484311
    Abstract: A circuit for use in controlling a memory cell coupled to a word line W and to first and second bit lines B1 and B2 includes an enabling flip-flop 20 having set terminal S connected to a source of enabling signals and a reset terminal R connected to an OR gate 22; a word line addressing circuit 25 connected to the output of the enabling flip-flop 20 and to the word line W, and having a terminal ADDR for receiving address information; first and second read/write circuits 29 and 30 connected to corresponding first and second bit lines B1 and B2, respectively, each of the read/write circuits 29 and 30 including a control node WRC and an output node SADO; a logic gate 22 having an output coupled to the reset terminal and having input nodes SADO 0 and SADO 1 connected to the corresponding output nodes of the read/write circuits 29 and 30, and an output flip-flop 33 connected the output nodes SADO 0 and SADO 1 of the read/write circuits 29 and 30.
    Type: Grant
    Filed: June 10, 1982
    Date of Patent: November 20, 1984
    Assignee: Fairchild Camera & Instrument Crop.
    Inventor: William H. Herndon
  • Patent number: 4463270
    Abstract: A circuit for detecting a difference in the relative magnitudes of two voltages includes a current sensing circuit connected between the first voltage and ground to thereby cause a first current to flow in the current sensing circuit, an amplifier connected between the second voltage and ground and connected to the current sensing circuit to thereby cause a second current to flow, the second current being equal to the first current when the first voltage is equal to the second voltage, and a variable impedance inverter connected to the first voltage and connected to the amplifier, the variable impedance being controlled by the first voltage, the output of the inverter thereby being related to the difference between the first voltage and the second voltage. The invention is particularly useful for controlling a battery backup power supply in a microprocessor having a volatile memory and for creating precision delay circuits.
    Type: Grant
    Filed: July 24, 1980
    Date of Patent: July 31, 1984
    Assignee: Fairchild Camera & Instrument Corp.
    Inventor: James S. Gordon
  • Patent number: 4449065
    Abstract: A simple six-transistor input buffer for generating and applying binary function test signals to associated circuitry in an integrated circuit package. The buffer recognizes three different voltage levels of an input signal that is applied to a single input test pin and generates three corresponding binary output signals that may be used for testing various functions of the associated circuitry.
    Type: Grant
    Filed: October 2, 1981
    Date of Patent: May 15, 1984
    Assignee: Fairchild Camera & Instrument Corp.
    Inventor: Thomas J. Davies, Jr.
  • Patent number: 4446473
    Abstract: A serpentine charge transfer device is disclosed in which two parallel series of charge transfer wells are disposed adjacent to each other. Channel stops and electrically controllable barriers are suitably introduced into the two series to cause charge to flow in a serpentine fashion along the two series of charge transfer wells. The invention doubles the resolution of linear imaging devices.
    Type: Grant
    Filed: April 30, 1981
    Date of Patent: May 1, 1984
    Assignee: Fairchild Camera & Instrument Corporation
    Inventor: Joan Pendleton
  • Patent number: 4442509
    Abstract: A bit line powered translinear memory cell includes a pair of NPN transistors Q101 and Q102 having cross-coupled bases and collectors. Diode loads D101 and D102 couple the NPN transistors Q101 and Q102 to the bit lines 301 and 302. The emitters of the two transistors Q101 and Q102 are coupled together and to a word line 103. Cell parasitic capacitances C101 and C102 are used to maintain data in nonaddressed memory cells during reading of other cells coupled to the same word line 103.
    Type: Grant
    Filed: October 27, 1981
    Date of Patent: April 10, 1984
    Assignee: Fairchild Camera & Instrument Corporation
    Inventor: William H. Herndon
  • Patent number: 4440804
    Abstract: A process is provided for fabricating self-aligned contacts to the surface of an integrated circuit. The process includes the steps of depositing a layer of silicon dioxide 12 on the surface of a semiconductor structure 10; depositing a layer of polyimide 15 on the surface of the silicon dioxide 12; defining openings 23 in the polyimide material 15 and the silicon dioxide 12 to thereby expose regions of the semiconductor structure 10; and depositing metal 22 across the underlying surface and in the openings 23. In the preferred embodiment metal 22 is substantially the same thickness as silicon dioxide 12, and polyimide material 15 is masked using sequentially deposited layers of silicon dioxide 18 and photoresist 21.
    Type: Grant
    Filed: August 2, 1982
    Date of Patent: April 3, 1984
    Assignee: Fairchild Camera & Instrument Corporation
    Inventor: Alvin Milgram