Patents Represented by Attorney Ronald L. Taylor
  • Patent number: 5266529
    Abstract: A method for trimming thin film resistors. A focused inert ion beam is employed to selectively remove portions of a resistive film deposited on a substrate.
    Type: Grant
    Filed: October 21, 1991
    Date of Patent: November 30, 1993
    Assignee: TRW Inc.
    Inventors: James C. Lau, Maurice Lowery, Kenneth Lui
  • Patent number: 5264806
    Abstract: A bipolar transistor is used as an active feedback inductor to emulate the frequency dependant impedance characteristics of a spiral inductor at microwave frequencies using active techniques. The active feedback is biased by several resistors. By substituting active feedback for a conventional spiral inductor, the chip layout can be reduced by as much as 50%. The bandwidth of the device can be controlled by choosing appropriate tuning resistor values to bias the active feedback inductor when fabricating the chip. By changing the value of these tuning resistors the inductance created can be directly controlled, which in turn affects the frequency response of the device.
    Type: Grant
    Filed: May 26, 1992
    Date of Patent: November 23, 1993
    Assignee: TRW Inc.
    Inventor: Kevin W. Kobayashi
  • Patent number: 5262660
    Abstract: A high power pseudomorphic (PM) AlGaAs/InGaAs high electron mobility transistor (HEMT) (26) with improved gain at 94 GHz. The transistor (26) includes an InGaAs quantum well (32) having a silicon planar doping layer (34) located at the bottom. A donor layer (36) comprises AlGaAs with a silicon planar doping layer (37). The resulting transistor (26) exhibits superior gain and noise characteristics that relatively high power levels when operating at 94 GHz. The transistor (26) is produced using an optimized growth process which involves growing the quantum well at a relatively low temperature and then raising the temperature to grow subsequent layers.
    Type: Grant
    Filed: August 1, 1991
    Date of Patent: November 16, 1993
    Assignee: TRW Inc.
    Inventors: Dwight C. Streit, Kin L. Tan, Po-Hsin Liu
  • Patent number: 5262335
    Abstract: Disclosed is a method for fabricating complementary heterojunction bipolar transistors on a common substrate. The method comprises the steps of depositing a PNP profile by molecular beam epitaxy on an appropriate substrate and then depositing a layer of silicon nitride on the PNP profile just deposited. The substrate is then heated in a vacuum in order to densify the silicon nitride. A mask and resist layer are used to produce the desired PNP profile patterns. The NPN profile is deposited on the area of the substrate etched away as well as on the silicon nitride layer protecting the already deposited PNP layers. The NPN profile is then patterned using a resist and masking process. The polycrystalline NPN area on top of the silicon nitride layer and the remaining silicon nitride layer are etched away forming two adjacent complementary NPN and PNP profiles on a common substrate.
    Type: Grant
    Filed: October 8, 1991
    Date of Patent: November 16, 1993
    Assignee: TRW Inc.
    Inventors: Dwight C. Streit, Aaron K. Oki, Donald K. Umemoto, James R. Velebir, Jr.
  • Patent number: 5262974
    Abstract: A programmable canonic signed digit (CSD) filter is provided which employs programmable CSD multipliers. The filter receives a digital input signal and includes a tapped delay line for providing a delay between the input samples. The filter advantageously employs a plurality of programmable CSD multipliers which receive programmable input filter coefficients and perform multiplication of the coefficient with the delayed input signal. Summation hardware is further included for summing the outputs of the plurality of multipliers to provide the filter output therefrom.
    Type: Grant
    Filed: October 28, 1991
    Date of Patent: November 16, 1993
    Assignee: TRW Inc.
    Inventors: John C. Hausman, Robert R. Harnden, Etan G. Cohen, Harold G. Mills
  • Patent number: 5257301
    Abstract: An improved direct digital frequency multiplier that multiplies input frequencies by a factor equal to the number of comparators in the circuit divided by two. The circuit includes a sensing stage, a ramping stage, a storage stage, a comparison stage and a logic stage. A signal containing the frequency to be multiplied is input to the sensing stage, which determines the frequency of the signal and outputs timing signals to the rest of the circuit. Coinciding with the period of the input signal, ramping voltages are generated, whose peak voltages are sampled and held for a specific time. The linearly ramping voltages are compared with the peak voltages and the comparison stage outputs voltage spikes to the logic stage. The logic stage combines the outputs from the comparison stage, and outputs a square wave signal possessing the appropriate multiplied frequency.
    Type: Grant
    Filed: March 30, 1992
    Date of Patent: October 26, 1993
    Assignee: TRW Inc.
    Inventor: Paul E. Vanderbilt
  • Patent number: 5248979
    Abstract: The present invention discloses a dual function satellite imaging and communication system (10, 40, 50, 60) using a solid state mass data storage device (30) which generates and stores image data at a relatively low data rate and subsequently transmits the data at a significantly higher data rate. The dual function imaging and communication system (10, 40, 50, 60), which may be incorporated as a body mounted payload of an imaging satellite, provides a single antenna or aperture (28, 54, 62) to perform both the imaging and communication functions and simplify the imaging and communication systems of the imaging satellite by eliminating the requirement for a separately gimballed antenna and/or aperture for each system. Further, the present invention is designed to operate in a low duty cycle mode to minimize its power supply requirements.
    Type: Grant
    Filed: November 29, 1991
    Date of Patent: September 28, 1993
    Assignee: TRW Inc.
    Inventors: Gordon R. Orme, Thomas J. Gritzmacher, Timothy A. Yokote
  • Patent number: 5239299
    Abstract: An equalization method is provided for compensating for variations in the characteristics of individual analog-to-digital converters found in a time interleaved analog-to-digital converter circuit. One of a plurality of converters is chosen as a reference converter. Individual characteristics of the remaining converters are compared with the reference converter to provide differential responses therewith. The differential responses are equalized to provide compensation for variations in gain, offset, phase/frequency response, and timing found amongst the plurality of time interleaved converters.
    Type: Grant
    Filed: August 6, 1991
    Date of Patent: August 24, 1993
    Assignee: TRW Inc.
    Inventors: G. Gordon Apple, James G. Harrison
  • Patent number: 5239186
    Abstract: This invention discloses a multiple quantum well infrared detector comprising a series of alternating layers of blocking layers and composite well layers. Each composite well layer is comprised of alternating layers of GaAs and AlGaAs forming a tightly coupled well group. The tightly coupled well group allows more allowed states for an electron released from the valence bands of the gallium arsenide semiconductor material. Consequently, there is a wider band width of detectable infrared radiation by the composite wall structure over the single well of the prior art.
    Type: Grant
    Filed: August 26, 1991
    Date of Patent: August 24, 1993
    Assignee: TRW Inc.
    Inventors: George W. McIver, Dwight C. Streit
  • Patent number: 5237203
    Abstract: A multilayer overlay interconnect for packaging various circuit elements such as integrated-circuit (IC) chips in high-density configurations. The overlay interconnect allows multiple IC chips to be removably mounted and electrically interconnected within a chip package with minimized interconnection lengths between the IC chips, for improved high speed operation of the chips. In addition, the back side of the chips remain accessible for making direct contact with a heat sink and/or a substrate interconnect which provides for good heat dissipation and/or additional electrical contact areas. The multilayer overlay interconnect is either flexible or both flexible and compressible.
    Type: Grant
    Filed: June 5, 1992
    Date of Patent: August 17, 1993
    Assignee: TRW Inc.
    Inventor: Laurence I. Massaron
  • Patent number: 5234348
    Abstract: An RF backplane for interconnecting a plurality of electronic components. The backplane is housed in a rack which is installed in a vehicle such as an airplane. The backplane includes a fixed frame fixedly mounted in the rack and at least one removable frame aligned with and removably attached to the fixed frame. Upon removal of the removable frame and electronic components attached thereto, complete access is afforded to the backplane and various components interconnected thereto without removal of the rack from the vehicle.
    Type: Grant
    Filed: May 21, 1992
    Date of Patent: August 10, 1993
    Assignee: TRW Inc.
    Inventors: Francis X. Konsevich, Jose F. Olivas
  • Patent number: 5235300
    Abstract: A module package for unpackaged millimeter wave or microwave devices allows the device to be dropped into a cavity formed in a housing and then hermetically sealed therein. Employing dielectric probe members which pass through corresponding slots in the housing to electrically interconnect the device within an application circuit allow for effective hermetic sealing and minimize electrical discontinuities and transmission losses.
    Type: Grant
    Filed: March 16, 1992
    Date of Patent: August 10, 1993
    Assignee: TRW Inc.
    Inventors: Steven S. Chan, D. Ian Stones
  • Patent number: 5231361
    Abstract: The present invention resides in a push-push voltage controlled oscillator (VCO) utilizing parallel LC resonant tank circuits for improved phase noise characteristics. The push-push VCO of the present invention includes two voltage controlled oscillators connected in parallel and in phase opposition, with each oscillator including a transistor connected in series with the parallel LC resonant tank circuit. The oscillators operate at the same resonant frequency f.sub.0, but are 180 degrees out of phase. Therefore, the fundamental and odd harmonics of the resonant frequency f.sub.0 cancel each other out and the even harmonics add together to produce an output signal at twice the resonant frequency f.sub.0.
    Type: Grant
    Filed: February 5, 1990
    Date of Patent: July 27, 1993
    Assignee: TRW Inc.
    Inventors: Duncan M. Smith, Barry R. Allen
  • Patent number: 5223672
    Abstract: A hybrid package in which Kovar feedthroughs are friction welded to an aluminum housing. Friction welding produces a very strong weld joint which resists the thermal stresses induced between the aluminum housing and Kovar feedthroughs by the large difference in their coefficients of thermal expansion. Friction welding also produces a very small heat affected zone, while brazing, soldering and other types of welding produce large heat affected zones which can cause annealing problems. The aluminum package is easy to machine, light in weight and provides good heat dissipation for the hybrid microcircuits in the package.
    Type: Grant
    Filed: June 11, 1990
    Date of Patent: June 29, 1993
    Assignee: TRW Inc.
    Inventors: George G. Pinneo, Marijan D. Grgas
  • Patent number: 5218360
    Abstract: Apparatus, and a corresponding method, for generating navigational data to aid a pilot in landing or taxiing an aircraft in poor visibility conditions. Radio-frequency (rf) beacons at predetermined locations around an airport runway or taxiway are separately modulated to render them uniquely identifiable from the aircraft. A fixed array of receiving antennas on the aircraft has multiple, angularly spaced antenna beams that substantially overlap each other in coverage, such that a signal received from one of the beacons will in most cases be received in more than one adjacent receive beam. Signals received in each beam are processed by a fast Fourier transform module to separate signal components from the various beacons; then an interpolation process determines the arrival angles of the signals by comparing the amplitudes received in adjacent receive beams.
    Type: Grant
    Filed: September 17, 1992
    Date of Patent: June 8, 1993
    Assignee: TRW Inc.
    Inventors: Allan C. Goetz, Ronald K. Ching, Lee L. Peterson
  • Patent number: 5217916
    Abstract: A new configurable gate array is defined in a master slice wafer form without borders of the kind currently known between constituent transistor gates, effectively providing a sea of gates over the wafer, interrupted if at all by islands, containing markers or the like; and a resultant application specific integrated circuit formed of such master slice is defined. In the IC, transistor gate cells, which are the same type of cells used for other purposes in the IC, are configured to serve the input and output function. Accordingly, the input and output function may be placed on any location in the IC. As an incident to personalization of the wafer saw lanes are formed of channels that extend over transistor cells and the latter cells are consequently destroyed in slicing the wafer. Means are also disclosed for an improved E-beam lithographic apparatus which permits an IC chip to be placed on an area of a wafer that is occupied by a marker, providing a wiring or macro design that avoids the marker.
    Type: Grant
    Filed: February 4, 1991
    Date of Patent: June 8, 1993
    Assignee: TRW Inc.
    Inventors: James M. Anderson, Andrew R. Coulson, Vincent J. Demaioribus, Henry T. Nicholas
  • Patent number: 5216637
    Abstract: A very large memory structure in which the extent and capacitive loading of global buses are reduced by an arrangement in which global data, address and control buses are connected to column buses through a column disable block for each column of memory modules. The column disable blocks also provide for selection of only a subset of data lines for connection between the global data bus and an associated column data bus. Further, a column disable register in each column disable block permits output from the column data bus to be selectively ignored on the basis of bit position. The column disable registers are uniquely addressable by column, for the selective disablement of column data bus lines. In the described embodiment of the invention, the global buses are triply redundant and the column disable blocks also include voting circuitry for processing of signals from the global buses.
    Type: Grant
    Filed: December 7, 1990
    Date of Patent: June 1, 1993
    Assignee: TRW Inc.
    Inventor: Steven Vaillancourt
  • Patent number: 5204686
    Abstract: An RF radiating system possesses high efficiency and reliability, including built in rain margin capability, in a structure that associates a plurality of solid state RF amplifiers with an antenna in an antenna array. In a specific aspect the system comprises a plurality of sources of RF carrier signals of at least two different frequencies; and radiating means for radiating an RF signal of a given frequency in multiple power levels in a first directionally steerable beam and for alternately or simultaneously radiating at least one additional RF signal of a different frequency in a directionally steerable beam separate from said first beam; said last named means including a plurality of discrete solid state amplifier means for coupling and amplifying signals from said source to said radiating means.
    Type: Grant
    Filed: April 6, 1988
    Date of Patent: April 20, 1993
    Assignee: TRW Inc.
    Inventors: Peter G. Petrelis, William C. Wong
  • Patent number: 5200656
    Abstract: An improved time discriminator system that is incorporated on a only a single gallium arsenide chip. The system includes a sensing stage, a ramping stage, a storage stage, a logic stage, and an output stage. An input signal is input to the sensing stage, which determines the length of successive time periods in the signal, and outputs corresponding control signals. The ramping stage generates dual ramping voltages on alternate periods of the input signal, corresponding to the successive period lengths. Values of the ramping voltages are sampled and held by a storage stage. Voltages held by the storage stage are subtracted from each other and amplified in a logic stage. The output stage resamples the signal coming from the logic stage, and outputs an analog signal that is proportional to the time difference between successive periods of the input signal.
    Type: Grant
    Filed: March 23, 1992
    Date of Patent: April 6, 1993
    Assignee: TRW Inc.
    Inventor: Richard D. Gunther
  • Patent number: 5199050
    Abstract: A technique for producing detection and synchronization signals with respect to a received pseudo-random (PN) signal, with optimum signal-to-noise performance and reduced complexity and cost of hardware. Correlation of the received signal with early and late reference signals is performed in such a way that multiplication hardware is time-shared to produce an early/late sum signal for use in signal detection, and an early/late difference signal for use in synchronization, but without the degradation of performance usually resulting from time-sharing of components. In one basic form of the invention, the received signal is multiplied by one of the local reference signals, and the resulting product is demultiplexed over two alternate paths for computation of the required sum and difference signals.
    Type: Grant
    Filed: April 5, 1991
    Date of Patent: March 30, 1993
    Assignee: TRW Inc.
    Inventor: Stuart T. Linsky