Abstract: In some embodiments an apparatus to hold shower curtains is disclosed. The apparatus includes a shower bar and mounting brackets. The mounting brackets are connected to at least one wall to receive the shower bar. The shower bar may be made of a flexible material that has a rectangular cross section and a rounded upper edge. The rectangular cross section enables the shower curtains to lay flat on the bar. The flexible material may enable the shower bar to be flexed during installation or to absorb contact from an object. Other embodiments are otherwise disclosed herein.

Abstract: An anti-cycling luminaire control system may detect repeated lamp-off conditions and interrupt power to the lamp and provide an indication of lamp cycling after a predetermined number of lamp-off conditions has been detected. The control system also provides a cool-off period after a lamp-off cycling event is detected during which time restarting of the lamp is inhibited. If the lamp does not restart after multiple restart attempts and cool-off periods, the system determines that a fault condition exists, and may provide a fault alert. The system may provide for shut-off or dimming of the lamp during the night after a portion of the night has passed. This delayed turn-off may be varied according to the length of the night. Starting and dimming the lamp at a zero voltage crossing of the line current can reduce stress on luminaire and control system components and reduce maintenance.

Abstract: In general, in one aspect, the disclosure describes an apparatus inluding a representative majority voter gate to analyze bit transitions of a pluraility of bits. The plurailuty of bits are analzed in groups. The representative majority voter gate generates an invert signal based on the analysis. The apparatus further inludes a conditional inverter to apply the invert signal to the pluraility of bits.

Abstract: In general, in one aspect, the disclosure describes a programmable power gating circuit that includes a reference voltage generator to generate a reference voltage and a voltage selector, coupled between a voltage source and active circuitry, to gate application of the voltage source to the active circuitry and provide a certain voltage to the active circuitry when the active circuitry is in a reduced capacity mode. The certain voltage is based on the reference voltage.

Abstract: According to one embodiment an apparatus to monitor the temperature of a transformer is disclosed. The apparatus includes a fiber optic cable having a temperature sensing probe on one end embedded in windings of a transformer. An optical converter transmits light to the probe and receives light from the probe, and converts the light received to an electrical signal. The light received back from the probe is controlled by temperature of the probe. Monitors are used to monitor different parameters of the transformer. A controller generates a simulated winding temperature based on data received from the monitors and converts the electrical signal to a direct winding temperature. The controller analyzes the operation of the transformer by comparing the direct winding temperature to the simulated winding temperature. Other embodiments are disclosed herein.

Abstract: In general, in one aspect, the disclosure describes a switching device that includes a plurality of ports. The ports operate at asymmetric speeds. The apparatus also includes a switching matrix to provide selective connectivity between the ports. The apparatus further includes a plurality of channels to connect the ports to the switching matrix. The number of channels associated with each port is determined by speed of the port.

Abstract: In general, in one aspect, a switching device is described that includes a segmentation unit to receive packets and divide packets having a length greater than a maximum segment length into multiple segments. A plurality of queues associated with a source and a destination stores the segments. A request generator generates requests that include external factors including amount of data contained in the queue and at least some subset of priority and age. A scheduler receives the requests and assigns the requests an internal priority based on the external factors. The scheduler processes the requests for the queues by internal priority in order to generate grants. A framer, responsive to the scheduler, aggregates a plurality of segments for the queues that received a grant to form a frame and to transmit the frame to an associated destination. The frame may contain segments associated with different packets.

Abstract: A multiple-domain processing system includes a multi-dimensional switching fabric to provide intra-domain and inter-domain communication within the system.

Abstract: In general, in one aspect, the disclosure describes an apparatus that includes a transmission module to split a data segment into a plurality of data stripes and transmit each data stripe over an associated data channel. The plurality of data channels are organized into at least one group and each group has an associated parity channel to transmit a parity stripe generated based on the data stripes within the group. The apparatus also includes a reception module to receive the plurality of data stripes and the at least one parity stripe. The apparatus further includes a controller to control the operation of the apparatus.

Abstract: In general, in one aspect, the disclosure describes a memory array including a plurality of memory cells arranged in rows and columns. Each memory cell includes a transistor having a floating body capable of storing a charge. A plurality of word lines and purge lines are interconnected to rows of memory cells. A plurality of bit lines are interconnected to columns of memory cells. Driving signals provided via the word lines, the purge lines, and the bit lines can cooperate to alter the charge of the floating body region in one or more of the memory cells.

Abstract: In general, in one aspect, the disclosure describes an apparatus for calibrating signals. The apparatus includes a unity gain detector to traverse a gain curve of an output buffer circuit to determine unity gain voltages associated with unity gain crossover points on an input voltage ramp. The apparatus further includes a pre-boost circuit to apply the unity gain voltages to at least one input/output buffer within the output buffer circuit.

Abstract: In general, in one aspect, the disclosure describes an apparatus that includes a connector mountable to a circuit board and a bracket attached to the connectors. The connector includes at least one port at least one retractable raised portion formed it at least one side of the connector adjacent to a side having a port opening. The bracket includes a front face for abutting against the side of the connector having the port opening and includes a first opening to provide access to the port. The bracket includes at least one side adjacent the front face that has at least one second opening in alignment with the at least one retractable raised portion so as to enable the retractable raised portion to enter the second opening and secure the bracket to the connector.

Abstract: In general, in one aspect, the disclosure describes an apparatus for shifting a low swing signal. The apparatus includes a first pair of transistors to receive a first input signal and a second input signal and to generate a first output signal that is a shifted version of the first input signal. The apparatus further includes a second pair of transistors to receive the first input signal and the second input signal and to generate a second output signal that is a shifted version of the second input signal.

Abstract: In general, in one aspect, the disclosure describes an apparatus to redistribute airflow throw slots of a chassis that houses boards. The apparatus includes at least one restriction region to limit airflow therethrough. The apparatus further includes an open region to allow airflow to pass therethrough. At least some of the airflow limited by the at least one restriction region will flow through the open region. The apparatus also includes a connection mechanism to connect to a chassis.

Abstract: In general, in one aspect, the disclosure describes a hybrid analog-to-digital converter. The hybrid converter comprises a successive approximation analog-to-digital converter for receiving an analog input signal and generating at least one bit of a digital output signal and a cyclic analog-to-digital converter coupled to the analog input signal and the successive approximation analog-to-digital converter for generating at least one additional bit of the digital output signal.

Abstract: In general, in one aspect, the disclosure describes a phase-locked loop circuit. The circuit includes an oscillator having a first control input and a second control input, wherein the first control input and the second control input act to control output frequency of the oscillator. The circuit further includes a first charge pump and a second charge pump. A first bias generator is coupled to the first control input of the oscillator and can receive electrical input from the first charge pump and the second charge pump. A second bias generator is coupled to the second control input of the oscillator and can receive electrical input from the second charge pump and the first bias generator.

Abstract: In general, in one aspect, the disclosure describes an apparatus for calibrating signals. The apparatus includes a receiver pair to receive a differential signal and a reference signal and to generate at least one comparison signal reflecting where a first signal of the differential signal and a second signal of the differential signal cross each other with respect to the reference signal. The second signal is a negative compliment of the first signal. The apparatus further includes a phase detector to determine a phase error based on the at least one comparison signal. The apparatus also includes an edge delay control driver pair to adjust the differential signal based on the phase error.

Abstract: In general, in one aspect, the disclosure describes an apparatus that includes a latch to connect a board to a chassis. The apparatus further includes a pull lever to control whether said latch is retracted or extended. The latch connects the board to the chassis when it is extended.

Abstract: In general, in one aspect, the disclosure describes an apparatus that includes a plurality of flow controllable queues containing data to be transmitted. The queues are organized by flow. The apparatus also includes a plurality of destinations to receive data from the plurality of queues. The apparatus further includes a controller to continually maintain an aggregate count of data ready for transmission to the destinations and determine next queue to transmit data from based at least partially on the aggregate counts.

Abstract: In general, in one aspect, the disclosure describes an apparatus capable to select a queue. The apparatus includes a queue occupancy device to indicate an occupancy status of the queues, a queue occupancy cache to record an update in occupancy status of a particular queue, a next queue selector to select a queue based on said queue occupancy device and a most recently serviced queue, and a queue identification register to identify a most recently serviced queue.