Patents Represented by Attorney, Agent or Law Firm Samuel G. Campbell, III
  • Patent number: 6414561
    Abstract: A conductive area or layer of a circuit board is aligned with, and spaced from, a portion of a first differential signal conductor pair and connected through a conductive pathway to one of the conductors of a second differential signal conductor pair to provide capacitive coupling for compensating an imbalance arising from non-symmetric pin assignments. By compensating the imbalance, signal quality and/or immunity is improved and noise and/or emission is reduced.
    Type: Grant
    Filed: November 21, 2001
    Date of Patent: July 2, 2002
    Assignee: Cisco Technology, Inc.
    Inventor: Neven Pischl
  • Patent number: 6411131
    Abstract: A receiver is provided which quickly and efficiently recognizes signals by including with the receiver a resolving circuit which is coupled to a signal generation circuit which provides a differential current. The resolving circuit is coupled to a latching circuit. The resolving circuit can operate with supply voltage levels as low as one threshold voltage. Also, the signal setup and hold times are inherently vary small due to the high intrinsic bandwidth of the receiver. Other advantages include reduced power consumption, high speed operation, good rejection of input noise and power supply noise, ability to resolve small (e.g., 1.0 mVolt) voltage differences, reduced capacitive loading, and the ability to function with a variety of types of drivers, including HSTL, DTL and PECL.
    Type: Grant
    Filed: May 21, 1999
    Date of Patent: June 25, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Michael A. Ang, Jonathan E. Starr
  • Patent number: 6407928
    Abstract: A surface mountable and low profile electrical component which can be electrically coupled to the solder side of a PCB, while other electrical components are mounted to a component side of the PCB. The surface mountable electrical component includes a mounting substrate having a diode or LED chip with electrical terminals. The terminals pass through the mounting substrate to be electrically coupled to first and second electrical contacts, which provide an electrical pathway between the terminals and the PCB.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: June 18, 2002
    Assignee: Cisco Technology, Inc.
    Inventors: Dean R. Falkenberg, Edward T. Iwamiya
  • Patent number: 6351770
    Abstract: An automated method and apparatus for classifying a customer service activation request (SAR) according to whether repeatable, schedulable, or scaleable elements are present. When the request has no repeating elements, a traditional SAR is forwarded and serviced by the network management system according to provisions well-known in the art. In the more complex case, however, a SAR comprises elements that are both repeatable and schedulable and is thus classified as a service activation module (SAM). An automated process first determines the starting quality of service (QoS) level at the beginning of the service life cycle requested by the customer. The process next determines the life cycle ending time as well as the trigger times at which elements repeat or are reinitiated. In some embodiments of the present invention, the SAM is examined for resource availability. If one or more resources are not available during the service life cycle, the process generates a report.
    Type: Grant
    Filed: November 24, 1999
    Date of Patent: February 26, 2002
    Assignee: Cisco Technology, Inc.
    Inventors: Yu-Hsien Li, Sai V. Ramamoorthy
  • Patent number: 6341370
    Abstract: The present invention integrates data prefetching into a modulo scheduling technique to provide for the generation of assembly code having improved performance. Modulo scheduling can produce optimal steady state code for many important cases by sufficiently separating defining instructions (producers) from using instructions (consumers), thereby avoiding machine stall cycles and simultaneously maximizing processor utilization. Integrating data prefetching within modulo scheduling yields high performance assembly code by prefetching data from memory while at the same time using modulo scheduling to efficiently schedule the remaining operations. The invention integrates data prefetching into modulo scheduling by postponing prefetch insertion until after modulo scheduling is complete. Actual insertion of the prefetch instructions occurs in a postpass after the generation of appropriate prologue-kernel-epilogue code.
    Type: Grant
    Filed: April 24, 1998
    Date of Patent: January 22, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Partha Pal Tirumalai, Rajagopalan Mahadevan
  • Patent number: 6337678
    Abstract: A set of haptic elements (haptels) are arranged in a grid. Each haptel is a haptic feedback device with linear motion and a touchable surface substantially perpendicular to the direction of motion. In a preferred embodiment, each haptel has a position sensor which measures the vertical position of the surface within its range of travel, a linear actuator which provides a controllable vertical bi-directional feedback force, and a touch location sensor on the touchable surface. All haptels have their sensors and effectors interfaced to a control processor. The touch location sensor readings are processed and sent to a computer, which returns the type of haptic response to use for each touch in progress. The control processor reads the position sensors, derives velocity, acceleration, net force and applied force measurements, and computes the desired force response for each haptel. The haptels are coordinated such that force feedback for a single touch is distributed across all haptels involved.
    Type: Grant
    Filed: July 21, 1999
    Date of Patent: January 8, 2002
    Assignee: Tactiva Incorporated
    Inventor: Daniel E. Fish
  • Patent number: 6272465
    Abstract: A monolithic integrated circuit for providing enhanced audio performance in personal computers. The monolithic circuit includes a wavetable synthesizer; a full function stereo coding and decoding circuit including analog-to-digital and digital-to-analog conversion; data compression, and mixing and muxing of analog signals; a local memory control module for interfacing with external memory; a game-MIDI port module; a system bus interface; and a control module for compatibility and circuit control functions.
    Type: Grant
    Filed: September 22, 1997
    Date of Patent: August 7, 2001
    Assignee: Legerity, Inc.
    Inventors: Larry D. Hewitt, Jeffrey M. Blumenthal, Geoffrey E. Brehmer, Glen W. Brown, Carlin Dru Cabler, Ryan Feemster, David Guercio, Dale E. Gulick, Michael Hogan, Alfredo R. Linz, David Norris, Paul G. Schnizlein, Martin P. Soques, Michael E. Spak, David N. Suggs, Alan T. Torok