Abstract: A memory component having multiple delayed timing signals. Control information specifying a write operation and write data corresponding to the write operation are each received via a separate external signal path. A timing signal is received indicating that the write data is valid write data. Signals corresponding to multiple delayed versions of the timing signal are output for use in determining a propagation delay time between the control information and the write data.

Abstract: A handheld computer is provided having a variable length and exposable surface component. The component is operable at a designated length of the handheld computer. A housing of the handheld computer may be adjusted to that the component is exposed or enclosed. When exposed, an application associated with the component may be launched by a processor of the handheld computer.

Abstract: A method is provided for playing back media from a network. The method includes receiving a search criteria from a network enabled device. The method further includes accessing a database comprising a plurality of network addresses, where the database associates each address with one or more classes of information. The addresses in the database each access a media network resource. The method further includes selecting at least one address in the database using the search criteria, and signaling the selected address to the network enabled device. The method also includes controlling the network enabled device so as to automatically access and play back the media resource of the selected address.

Abstract: A method of testing a semiconductor device having a pipelined architecture. Operation of a first pipeline stage of the semiconductor is disabled during a first pipelined operation to establish test data at an input of a second pipeline stage of the semiconductor device. A second pipelined operation is executed to enable the second pipeline stage to generate an intermediate result using the test data. A final result of the second pipelined operation is evaluated to determine whether the second pipeline stage produced a correct intermediate result.

Abstract: Techniques to make e-mail correspondent-centric rather than message-centric, and reduce junk e-mail. Tabulates, maintains, and updates useful information about the user's chosen correspondents, and the history and status of each correspondence series. Filters incoming messages from an unrecognized sender, asking user whether to add sender to correspondent list, and if so prompts user for needed information. Eliminates the need to search for e-mail addresses. Facilitates viewing sequential messages to and from a correspondent. Provides an effective tool to eliminate junk-mail by making it simpler and more practical to screen messages or change one's e-mail address. When user changes his e-mail address, automates notification of user's chosen correspondents, and in some cases can automatically update such correspondents' e-mail address lists. Eliminates need to manually create and maintain mailboxes or folders. Allows automated organization of e-mail by correspondent.

Abstract: An analog video receiver implemented in an integrated circuit device. The analog video receiver includes an amplifier to amplify an analog video signal having a desired carrier frequency, and a mixing circuit to mix the amplified analog video signal with a complex sinusoid having a frequency substantially equal to the carrier frequency.

Abstract: In one embodiment, a pulsed signaling multiplexer is described that comprises a first AC-coupled transmitter and a second AC-coupled transmitter. The first AC-coupled transmitter includes a first driver having a first input to receive first data and a first output. A first AC-coupling element couples the first output to a common output node. The second AC-coupled transmitter includes a second driver having a second input to receive second data, and a second output. A second AC-coupling element couples the second output to the same first common output node.

Abstract: A method of testing a dynamic random access memory (DRAM) device that has N rows of storage cells and that requires, in at least one operating mode, at least N refresh commands to be received from an external source within a specified time interval. The rows of storage cells are tested in a first retention test to identify rows that fail to retain data over the specified time interval. The rows that fail to retain data over the specified time interval are tested in a second retention test to identify rows that retain data over an abbreviated time interval, the abbreviated time interval being shorter than the specified time interval.

Abstract: An improved architecture for a network search engine (NSE) is disclosed herein as including an interface manager, one or more levels of a splitting engine, an array of data processing units (DPUs), and a cascade block. A method for using the improved NSE architecture to form an efficient pointer entry database is also provided. As described herein, the improved NSE architecture simultaneously provides high speed, search throughput, update rate and capacity, coupled with low power and fixed latency searches for all search key widths.

Abstract: In a receive circuit within an integrated circuit device, a binary input signal is sampled in response to transitions of a sampling clock signal to generate a set of data samples. The binary input signal is additionally compared with first and second threshold levels to generate respective first and second edge samples. The phase of the sampling clock signal is adjusted based, at least in part, on the first edge sample if the set of data samples matches a first data pattern and based, at least in part, on the second edge sample if the set of data samples matches a second data pattern.

Abstract: A portable device is provided that carries account data. The account data may include a security code having a value that is time-varying. The value of the security code may be programmatically varied based on at least one of an algorithm or event. Authorization and use of the account may be sought from an authorization agent using the account data provided on the portable device.

Abstract: A method, apparatus, and storage medium product are provided for forming a forwarding database, and for using the formed database to more efficiently and quickly route packets of data across a computer network. The forwarding database is arranged into multiple sub-databases. Each sub-database is pointed to by a pointer within a pointer table. When performing a longest-match search of incoming addresses, a longest prefix matching algorithm can be used to find the longest match among specialized “spear prefixes” stored in the pointer table. After the longest spear prefixes are found, the pointer table will direct the next search within a sub-database pointed to by that spear prefix. Another longest-match search can be performed for database prefixes (or simply “prefixes”) within the sub-database selected by the pointer. Only the sub-database of interest will, therefore, be searched and all other sub-databases are not accessed.

Abstract: A high-speed signaling system with adaptive transmit pre-emphasis. A transmit circuit has a plurality of output drivers to output a first signal onto a signal path. A receive circuit is coupled to receive the first signal via the signal path and configured to generate an indication of whether the first signal exceeds a threshold level. A first threshold control circuit is coupled to receive the indication from the receive circuit and configured to adjust the threshold level according to whether the first signal exceeds the threshold level. A drive strength control circuit is coupled to receive the indication from the receive circuit and configured to adjust a drive strength of at least one output driver of the plurality of output drivers according to whether the first signal exceeds the threshold level.

Abstract: The fabrication of the wafer may be analyzed starting from when the wafer is in a partially fabricated state. The value of a specified performance parameter may be determined at a plurality of locations on an active area of a die of the wafer. The specified performance parameter is known to be indicative of a particular fabrication process in the fabrication. Evaluation information may then be obtained based on a variance of the value of the performance parameter of the plurality of locations. This may be done without affecting a usability of a chip that is created from the die. The evaluation information may be used to evaluate how one or more processes that include the particular fabrication process that was indicated by the performance parameter value was performed.

Abstract: A low power content addressable memory (CAM) device. The CAM device receives an N-bit comparand value and, in response, activates less than N compare lines within the CAM device to compare each of the N bits of the comparand value with contents of CAM cells coupled to the N compare lines.

Abstract: An apparatus and method of transposing one or more bits in input data relative to other bits of the input data to form a compound for searching in a content addressable memory. The comparand may have one or more bits rearranged from their order appearing in the input data such that one or more bits from a first segment of the input data are replaced with, or substituted by, one or more bits from a second segment of the input data.

Abstract: A circuit for adjusting the phase of a clock signal. A first sampling circuit generates a sequence of data samples in response to transitions of the clock signal, each of the data samples having either a first state or a second state according to whether an incoming signal exceeds a first threshold. An second sampling circuit generates an error sample in response to one of the transitions of the clock signal, the error sample having either the first state or the second state according to whether the incoming signal exceeds a second threshold. A phase adjust circuit adjusts the phase of the clock signal if the sequence of data samples matches a predetermined pattern and based, at least in part, on whether the error sample has the first state or the second state.