Abstract: Software modules which are not part of a database systems source code is provided for interactively maintaining the semantics of concept hierarchies when concept properties and concept interrelationships are modified. These separate modules include command and rules modules. Each of the commands in the command module are linked to the appropriate rules in the rules module. The rules module is bifurcated into a check section and an action section. If the command does not violate any applicable rule in the rules section, the action section implements the command. If the command violates one or more applicable rules, the action section suggests alternate action. If no suitable action can be found, the action section implements reverse commands to return the database to its unaltered state.

Abstract: The objective of the instant invention is to define a computer user interface display system that presents hierarchical data in an enhanced tree presentation control that blends the ease-of-use character of the familiar "tree presentation control" with a technique for navigating more complex lattice data structures, while at the same time providing more node information by displaying configured lattice-node labels along with the node's name. Thus a primary objective of this invention is to facilitate building, maintaining and using a multiple inheritance taxonomy such as a product catalog data base by means of a multi-navigation path browsing system, which is made possible through the capability of this system's multiple inheritance capability; with indicators in the tree view to indicate ancestors such as immediate parents and further removed ancestors.

Abstract: This invention involves an electronic catalog system which employs the knowledge and experience of a "Sales Agent", which is provided to a computer data base, and used with an inference engine to assist and guide actual customers to products that they will most likely be interested in purchasing. This system is employs hypothetical questions and answers, based on the sales agents experience with generic customers, as well as criteria and constraints provided by both the Sales Agent and the electronic catalog content.

Abstract: This invention relates to an electronic commerce software catalog system and a method of use. This electronic catalog system is specifically designed to provide the electronic shoppers with a customer-centric, virtual shopping experience by first facilitating the creation of customer-personas and their catalog-content affinities by a "Sales Representative", secondly facilitating the persona-association based configuration of a "Customer-Actor", by the actual "Shopper". Thirdly, the shopper selects an "on-the-desktop" computer directed "Sales-Advisor", that generates advice on catalog navigation, product applications and product function that is tuned to the proxy customer's configured personality and specific needs.

Abstract: A method and means are provided for dynamically assigning security parameters to hypertext markup language (HTML) pages of an information provider on the worldwide web, whereby only one set of HTML pages need be stored and maintained for retrieval by client computers using differing security protocols. A security injection profile is provided for storing security parameters for each respective security protocol. When a browser enabled with a particular security protocol requests one of the HTML pages in the secure set, the page is accessed from web server storage, security parameters of the particular protocol are accessed and injected into the accessed page, and the page is sent to the requesting browser.

Abstract: A method and system for preventing routing maelstrom loops of automatically routed electronic mail which is operational with intelligent agents and computer-processor hardware components, and includes a software based solution comprising a processor readable code of instructions. The code of instructions generally comprise a routine for tagging processed e-mail message with a system generated special identifying tag revealing each source subscriber, a routine for ascertaining whether a received message intended for automatic routing contains any special tag and a corresponding routine for deciding whether any of the special tags contain the current source subscriber's identification before exercising any routing rules against the message. If the subscriber's ID is listed in the particular e-mail being routed, then the system of the invention determines that a complete loop has been made and terminates further transmission since the next target subscriber has already received the message.

Abstract: This invention uses a rule based system which is configurable at run time(1) to decide whether suitable preconditions exist for proposed modifications to a data base, (2) if not, optionally attempt to bring about such preconditions, and (3) prevent the proposed modifications if preconditions remain unmet.

Abstract: This electronic catalog searching system first, calculates attribute relevance (e.g., strongly-relevant, weakly-relevant, and irrelevant) for each node in a hierarchy (e.g., abstraction hierarchy, decompositional hierarchy) based on assignment constraints made at the nodes representing real-world concrete entities and then combines attribute relevance with a forward-checking parametric search to implement a hierarchical exploration scheme that can be enabled over a multitude of hierarchies residing on a base of concrete entities.

Abstract: The present invention dissipates the heat generated by high powered VLSI chips to a heat sink in a very efficient manner, providing a thermal resistance heretofore not possible in heat conduction module cold plate type systems. A finned internal thermal device having a flat bottom contacts the chips, while corresponding fins in a finned cooling hat mounted to a cold plate form gaps into which the fins of the finned internal thermal devices are slidably mounted. A preferred double cantilever spring between the finned internal thermal devices and fins of the finned cooling hat and a compliant thermally conductive interface such as synthetic oil between the chips and flat base of the finned internal devices provide efficient, non-rigid interfaces throughout the system, while assuring good thermal contact between the system components.

Abstract: An integrated circuit chip packaging structure, preferably having a semiconductor base substrate, i.e., silicon or gallium arsenide, alternating insulation and conductive layers on the base structure, at least two conductive layers being patterned into thin film wiring (i.e., thin film copper of approximately 5 microns), semiconductor integrated circuit chips connected to the upper-most patterned conductive layer, and means to connected the packaging structure to the next level of packaging (i.e., board or card).The thin film wiring layers typically each having coplanar ground, power and signal lines, with at least one power or ground line existing between coplanar signal lines to minimize cross talk. To facilitate efficient power distribution, lines of specific power levels of the patterned planes are connected to lines of the same power level on other patterned planes to form three dimensional power planes.

Abstract: Disclosed is a method of forming solder terminals for a pinless module, preferably for a pinless metallized ceramic module. The method is comprised of the following steps: forming a substrate having a pattern of conductors formed onto its top surface and preformed via-holes extending from the top to bottom surface; applying a droplet of flux at at least one of said preformed via-hole openings of the bottom surface of said substrate to fill said via-holes with flux by capillarity and form a glob of flux at the bottom openings; applying a solder preform, i.e.

Abstract: A self-contained method and structure for partitioning, testing and diagnosing a multi-chip packaging structure. The method comprises the steps of electronically inhibiting all chips in the multi-chip package except for the chip or chips under test, creating a signature of the chip or chips under test by generating and applying random patterns to the chip or chips under test (referred to as the unit under test) and comparing the signature obtained to a "good machine" simulation signature. The structure comprises means for accomplishing the above method steps. A preferred structure comprises an semiconductor substrate having redundant self test circuitry built in and chips having ECIPT circuitry mounted on the semiconductor substrate. Either all or a portion of the self test circuitry, including the required multiplexers, etc., may be incorporated into the semiconductor substrate. ECIPT circuitry may also be built into the substrate below each chip site.

Abstract: A high speed, high performance integrated circuit packaging structure that may be used for emulating wafer scale integration structures. The preferred embodiment comprises an interposer having a base substrate having alternating insulation and conductive layers thereon, wherein a plurality of the conductive layers are wiring means which are adapted for maintaining an extremely low noise level in the package. The low noise level and low resistance and capacitance of the wiring means allows a plurality of discrete semiconductor segments to be mounted on and interconnected by the integrated circuit package with a significantly reduced number of drivers and receivers than required by Rent's Rule. Each integrated circuit structure of the present invention emulates a large chip or wafer scale integration structure in performance without having to yield the large chip or wafer, and without redundancy schemes.

Abstract: Engineering changes in the wiring between semiconductor device chips supported on the same substrate are made using minimum substrate real estate and without the use of engineering change pads or discrete wires by the use of easily modified chip interposers. The interposers are inserted between respective chips and the substrate. The interposers comprise conductive vias and multiple internal wiring planes which are selectively connected to the vias.

Abstract: An integrated (silicon based) packaging/wiring structure provides for VLSI chips 4 to be placed within openings of somewhat larger size in a semiconductor interconnection wafer (IW, 2) supported by a carrier 1. The interconnection wafer 2 includes multilevel (ML) wiring planes and incorporated circuit components integrated in a less demanding technology as compared to the VLSI chips 4. Silicon contact chips 5 with conductive surface layers 22, 23 placed over the chip/IW plane provide for the required interconnections by means of needle-like structures 24 inserted in corresponding via holes. The needles are better suited to withstand shear strain than are conventional C-4 (Controlled Collapse Chip Connection) joints. Consequently a much higher number of chip pads can be provided. Power supply is effected via rather large-dimensioned conductive planes, e.g.

Abstract: A ceramic card assembly which provides high density three dimensional semiconductor device packaging and overcomes the power distribution and thermal management problems that have impaired prior ceramic cards. The ceramic card assembly combines ceramic cards with flexible power distribution structures which provide low inductance and low resistance power distribution, making ceramic cards available for high performance VLSI systems. Each ceramic card assembly comprises a ceramic card having a plurality of chip sites and power contacts thereon, and at least one flexible power distribution structure having alternating insulation (i.e. polyimide) layers and conductor (i.e., copper) layers, the flexible power distribution structures are mounted adjacent to the ceramic cards so that conductive layers of the ceramic cards are selectively exposed to the power contacts. The ceramic card assemblies are preferably combined into a field replaceable unit that includes cold plates between ceramic cards.

Abstract: A multilayered ceramic (MLC) substrate having embedded and exposed conductors suitable for mounting and interconnecting a plurality of electronic devices exterior thereof. The horizontal planar conductors comprise substantially a plurality of solid, non-porous, homogeneous metal patterns, whereas the vertical interplanar connection conductors are substantially porous metal conductors that are formed by methods such as screening. The process to form the MLC substrate involves forming a pattern of solid, nonporous conductors to a backing sheet having a release layer, then transferring the pattern to a ceramic green sheet. Zero X-Y shrinkage sintering processes allow the MLC substrate and solid metal conductors to be densified without distortion of the solid metal patterns or the ceramic.

Abstract: There is described a process for making a high performance NPN bipolar transistor functioning in a current switch logic circuit. A bipolar transistor is formed within an isolated region of a monocrystalline silicon body wherein the transistor includes an N+ subcollector, an N+ collector reach-through which connects the subcollector to a major surface of the silicon body, a P base region above the subcollector and adjacent to the reach-through region, an N+ emitter region within the base region and extending from the major surface. The base region includes an intrinsic base region located below the emitter region and an extrinsic region located extending from the major surface and adjacent to the emitter region. The extrinsic base preferrably completely surrounds or rings the emitter region. A mask is formed above the major surface and the mask has openings therein only in the areas above major portions of the extrinsic base regions.

Abstract: Silicon crystals with high and controlled predictable carbon content can be grown by controlling oxygen introduced into the pulling chamber during the melting in standard Czochralski silicon crystal pullers.Carbon concentration profile of grown crystals can be deduced from the carbon monoxide [CO] concentration real time monitoring, through its integral taken during the whole pulling duration. This process is reproducible, and the carbon content in the silicon is consistent. Means to practice this method are also disclosed.