Patents Represented by Attorney W. James Brady, III
  • Patent number: 7230481
    Abstract: An amplifier system can include a biasing amplifier that provides a first amplified signal to a DC blocking element that is connected with a load based on a first control signal. A power amplifier provides a second amplified signal for driving the load based on a second control signal. A control system controls the biasing amplifier to charge the DC blocking element so as to mitigate a voltage drop across the load (e.g., to substantially eliminate audible artifacts) when the power amplifier is activated to provide the second amplified signal.
    Type: Grant
    Filed: May 5, 2005
    Date of Patent: June 12, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Thomas Holm Hansen, Kim Nordtorp Madsen, Claus Niels Neesgaard
  • Patent number: 7224153
    Abstract: A power regulator has an output for regulated power that is connected to supply power to a load. The load can have various electrical characteristics, including requiring a rapid transient response. The transient response amplitude for the power regulator is decreased by adding capacitance at the output, but that slows the response time of the power regulator by lowering the crossover frequency and the phase margin at the crossover frequency. An adjustable gain element imbedded in the feedback network provides an input to permit a builder or user of the power regulator to vary the effective value of impedance elements in the feedback network. The builder or user selectively connects an impedance to the input of the adjustable gain element to thereby adjust the frequency characteristics of the feedback network to thereby adjust output characteristics of the power regulator to compensate for the effects of capacitance added to the power regulator output.
    Type: Grant
    Filed: April 26, 2005
    Date of Patent: May 29, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Charles Allen DeVries, Jr., Joseph Gerard Renauer, Michael G. Amaro
  • Patent number: 7221190
    Abstract: A system and method is provided for extending the range of a common mode voltage of a differential comparator. In one embodiment, a differential comparator comprises an input stage with a negative voltage reference node, a first differential input coupled to a first differential pair transistor and operative to receive a first input signal, and a second differential input coupled to a second differential pair transistor and operative to receive a second input signal. The first input signal and the second input signal form a differential input signal. The differential comparator further comprises a common mode sensing circuit interconnected between the first differential input, the second differential input, and the negative voltage reference node. The common mode sensing circuit is operative to sense a common mode voltage of the differential input signal and set a voltage potential at the negative voltage reference node substantially equal to the sensed common mode voltage.
    Type: Grant
    Filed: March 14, 2005
    Date of Patent: May 22, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Anthony Sepehr Partow, Ricky Dale Jordanger
  • Patent number: 7221498
    Abstract: Methods and apparatus for selectively updating memory cells of a memory cell array are provided. The memory cells of each row of the memory cell array are provided with a plurality of wordlines. Memory cells of the row are activated and updated by separated wordlines. In an application of display systems using memory cell arrays for controlling the pixels of the display system and pulse-width-modulation (PWM) technique for displaying grayscales, the pixels can be modulated by different PWM waveforms. The perceived dynamic-false-contouring artifacts are reduced thereby. In another application, the provision of multiple wordlines enables precise measurements of voltages maintained by memory cells of the memory cell array.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: May 22, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Peter W. Richards, Andrew Huibers
  • Patent number: 7215458
    Abstract: A method and apparatus for operating spatial light modulator have been disclosed herein. The spatial light modulator comprises an array of micromirror devices, each of which further comprises a reflective deflectable mirror plate attached to a deformable hinge, and an addressing electrode for addressing and deflecting the mirror plate.
    Type: Grant
    Filed: November 5, 2004
    Date of Patent: May 8, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Peter Richards, Satyadev Patel, Andrew G. Huibers, Michel Combes
  • Patent number: 7216247
    Abstract: The disclosed invention provides methods and systems for writing and reading data in systems using multiple FIFO buffer elements. For each buffer element, a determination is made of when the rising edge of the read clock occurs during the second half of the write clock cycle. Responsive to this determination, the data written into the FIFO buffer element is shifted in order to reduce skew.
    Type: Grant
    Filed: August 5, 2004
    Date of Patent: May 8, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Keerthinarayan P. Heragu, Patrick Bosshart
  • Patent number: 7212059
    Abstract: The circuit is to provide a type of level shift circuit that operates correctly even when the input timings of voltages from multiple power sources are different. Level shift circuit 10 that outputs the output signal of the high voltage source as a response to the input signal of the low voltage source has the following attribute: When feeding of the low voltage source is delayed with respect to feeding of the high voltage source, on the basis of the high voltage source, power-on-reset circuit 20 generates power-on-reset signal PWR. During the period before the input signal of the low voltage source is fed as a response to power-on-reset PWR, latch circuit 30 initializes the level shift circuit, and holds its output OUT at the low level.
    Type: Grant
    Filed: April 12, 2005
    Date of Patent: May 1, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Yasushi Kubota, Masahiro Sato, Hiroshi Watanabe
  • Patent number: 7212359
    Abstract: A method and a color rendering filter for compensating for deficiency in illumination light from a light source in display systems are provided. The color rendering filter has a color that is determined based upon the spectrum, sensitivity of viewer's eyes over the visible light range, and a pre-determined waveband threshold.
    Type: Grant
    Filed: July 26, 2004
    Date of Patent: May 1, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Peter Richards, Andrew Huibers, Michel Combes
  • Patent number: 7212931
    Abstract: An energy consumption meter having a variable phase error compensator. While the variable phase error compensator may provide fixed phase error compensation for fixed phase error(s), it may also provide variable compensation for varying phase error(s) introduced by one or more parameters. Varying phase error(s) may be introduced, for example, by fluctuations in the frequency of an alternating current supply. Such varying phase errors may be corrected by monitoring one or more sources of varying phase error(s), calculating one or more appropriate corrections, and correcting one or more sampled parameters involved in determining energy consumption. This avoids erroneous energy consumption metering due to varying phase errors.
    Type: Grant
    Filed: July 27, 2004
    Date of Patent: May 1, 2007
    Assignee: Texas Instruments Deutschland GmbH
    Inventor: Lutz Bierl
  • Patent number: 7208993
    Abstract: A high-speed front-multiplexed multi-channel LVDS-compatible repeater circuit that limits input leakage current levels in the event one or more input voltages of the circuit exceeds the supply voltage. The LVDS repeater includes a multiplexor having a plurality of differential inputs and at least one differential output. The multiplexor includes a plurality of transmission gates to allow any one of the differential inputs to be routed to any differential output. Each transmission gate includes a first PMOS transistor and an NMOS transistor. The multiplexor further includes first Schottky diodes coupled between Vcc and the back-gate nodes of the first PMOS transistors, and second PMOS transistors coupled as shunts between the gate nodes of the first PMOS transistors and the source nodes of the NMOS transistors.
    Type: Grant
    Filed: March 11, 2003
    Date of Patent: April 24, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Hector Torres, Mark W. Morgan, Julie Hwang
  • Patent number: 7208388
    Abstract: A method of making integrated circuit thin film resistor includes forming a first dielectric layer (18B) over a substrate and providing a structure to reduce variation of head resistivity thereof by forming a dummy fill layer (9A) on the first dielectric layer, and forming a second dielectric layer (18D) over the first dummy fill layer. A thin film resistor (2) is formed on the second dielectric layer (18D). A first inter-level dielectric layer (21A) is formed on the thin film resistor and the second dielectric layer. A first metal layer (22A) is formed on the first inter-level dielectric layer and electrically contacts a portion of the thin film resistor. Preferably, the first dummy fill layer is formed as a repetitive pattern of sections such that the repetitive pattern is symmetrically aligned with respect to multiple edges of the thin-film resistor (2).
    Type: Grant
    Filed: April 8, 2005
    Date of Patent: April 24, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Eric W. Beach, Philipp Steinmann
  • Patent number: 7209060
    Abstract: Providing a substantially constant reference voltage to a component from a reference buffer connected by a path. The load that would be offered to the reference buffer in desired durations is estimated, and a dummy load is added to the path such that the aggregate load on the path is approximately constant. In case of the stages of an ADC, the sub-code generated by each stage during a sampling phase is used to estimate the load that would be offered, and the dummy load is added in the hold phase to keep the reference voltage constant in the hold phase, as desired.
    Type: Grant
    Filed: July 28, 2005
    Date of Patent: April 24, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Abhaya Kumar, Visvesvaraya A Pentakota
  • Patent number: 7205833
    Abstract: An improved method and circuit for reduced settling time in an amplifier are provided. The amplifier comprises a composite amplifier circuit including a first amplifier configured with a second amplifier comprising an integrator circuit. The reduced settling time is facilitated through implementation of a faster path configured between an inverting input terminal of the second amplifier and an output terminal of the first amplifier for current needed by an integrator resistor due to any signal appearing at said inverting input terminal for said high-speed amplifier. The faster path can be realized through the addition of a compensation capacitor between the output terminal of the composite amplifier circuit and the inverting input terminal of the second amplifier. The compensation capacitor can comprise various values depending on any given number of design criteria.
    Type: Grant
    Filed: December 15, 2003
    Date of Patent: April 17, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Rodney T. Burt, Joy Y. Zhang
  • Patent number: 7206155
    Abstract: A write driver circuit (38) uses a matching resistors (R0, R1) to match the impedance of the head (32) disposed between output nodes (OUTP, OUTN). Control circuitry (Q4, Q5, Q6, Q7, R2, R4, R6 and R7) maintains the voltage at reference voltage nodes (VREFP, REFN) at essentially the same voltage as its corresponding output node. The matching resistor is disposed between the reference voltage node and the output node along with a driver (40a, 40b), which may be implemented as an AB driver. Since the voltage between the reference node and the output node is generally zero, very little current is shunted by the matching resistors, and thus, there is very little power wasted by the matching resistors. In the preferred embodiment, the output transistors of the AB drivers are driven by switched current sources (Q28 and Q29) to provide enhanced current to the bases of the output transistors on an as needed basis.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: April 17, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Jeremy Kuehlwein, Raymond E. Barnett
  • Patent number: 7205736
    Abstract: Methods and systems for driving a motor are disclosed. A center tap voltage and a desired center tap voltage are used to generate a voltage feedback. A power amplifier receives a reference current and the voltage feedback. The power amplifier provides a phase current to a phase of a motor. The phase current is substantially centered about the desired center tap voltage as a consequence of the voltage feedback. Thus, high-side to low-side or state to state current variations are reduced thereby reducing the occurrence of problems such as torque ripple and back EMF.
    Type: Grant
    Filed: April 2, 2003
    Date of Patent: April 17, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Jonathan R. Knight, Akihiko Miyanohara
  • Patent number: 7205749
    Abstract: A PFC circuit modulating a power line using pulse width modulation (PWM) to drive a power MOSFET and series inductor across the power line. Since many modern electronic systems include a power factor correction circuit (PFC) that already includes a series inductor and power MOSFET, a PLC is incorporated into a controller to inject a PLC transmit signal into a control loop for the PFC circuit. This can be done using either an analog PFC controller, such as the UCC28517, the UCC2819A, or a digital PFC controller such as based on a TMS320C24xx DSP.
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: April 17, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Mark David Hagen, Robert E. Jansen
  • Patent number: 7206030
    Abstract: Disclosed are methods and systems for automatic gain control (AGC) in circuits. The disclosed methods and systems provide accurate and rapidly converging automatic gain control suited for video applications. According to disclosed preferred embodiments of the invention, a signal amplitude controlling method is responsive to gain underflow or overflow. A new fine gain control value is extrapolated and a new coarse gain control value is determined. The new fine gain and new coarse gain control values are applied to the signal to produce an output signal within a pre-selected output amplitude range.
    Type: Grant
    Filed: January 20, 2004
    Date of Patent: April 17, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: James Edward Nave
  • Patent number: 7202533
    Abstract: An integrated circuit structure includes a first dielectric layer disposed on a semiconductor layer, a first thin film resistor disposed on the first dielectric layer, a second dielectric layer disposed on the first dielectric layer and the first thin film resistor, and a second thin film resistor disposed on the second dielectric layer. A first layer of interconnect conductors is disposed on the second dielectric layer and includes a first interconnect conductor contacting a first contact area of the first thin film resistor, a second interconnect conductor contacting a second contact area of the first thin film resistor, and a third interconnect conductor electrically contacting a first contact area of the second thin film resistor. A third dielectric layer is disposed on the second dielectric layer. A second layer of interconnect conductors is disposed on the third dielectric layer including a fourth interconnect conductor for contacting the second interconnect conductor.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: April 10, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Eric W. Beach, Vladimir F. Drobny, Derek W. Robinson
  • Patent number: 7199563
    Abstract: The object of this invention is to improve efficiency in the step-up/down mode and eliminate ringing in the output voltage when switching between the step-up mode and the step-up/down mode. This DC-DC converter has a local feedback control pre-processing circuit 12 arranged between voltage input terminal IN and one of the terminals of choke coil 10 or node Nx as well as an output feedback control booster circuit 14 arranged between the other terminal of choke coil 10 and the voltage output terminal OUT. Pre-processing circuit 12 has switching elements 16 and 18 and control circuit 20 that turns on/off switching elements 16 and 18 in a complementary manner. Control circuit 20 has error amplifier 22, reference voltage generating circuit 24, PWM comparator 26, inverter 28, and low-pass filter (LPF) 30.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: April 3, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Katsuya Ikezawa
  • Patent number: 7198982
    Abstract: A method for forming a MEMS device is disclosed, where a final release step is performed just prior to a wafer bonding step to protect the MEMS device from contamination, physical contact, or other deleterious external events. Without additional changes to the MEMS structure between release and wafer bonding and singulation, except for an optional stiction treatment, the MEMS device is best protected and overall process flow is improved. The method is applicable to the production of any MEMS device and is particularly beneficial in the making of fragile micromirrors.
    Type: Grant
    Filed: March 29, 2005
    Date of Patent: April 3, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Satyadev R. Patel, Andrew G. Huibers, Steve S. Chiang