Patents Assigned to AG Communication Systems Corporation
  • Patent number: 5191514
    Abstract: The card guide with hook/card lock as disclosed is designed to prevent a printed circuit board (PCB) from being disengaged without first moving the mechanical card locking hook an adequate distance. When the mechanical card locking hook is flexed to disengage a PCB, the card lock will move only enough to allow the PCB to be disengaged and removed. The card guide has a built in fixed stop to prevent the extended card lock from deforming or breaking during disengagement of a PCB.
    Type: Grant
    Filed: December 9, 1991
    Date of Patent: March 2, 1993
    Assignee: AG Communication Systems Corporation
    Inventors: Zbigniew Kabat, Arcangel N. Capulong
  • Patent number: 5175532
    Abstract: A drill collar position verifier for use with a drill bit having a drilling depth control collar positioned coaxially thereon. The drill bit is inserted in a cylindrical opening in a plastic block to a depth determined by the position of the collar. Three optical beam sources are positioned at three different predetermined depths in the plastic block. Each optical beam source projects an optical beam across the cylindrical opening and onto a corresponding optical beam detector, unless the drill bit breaks such optical beam projections. The optical beam detectors are connected to logic circuitry which is further connected to LED indicators. If the drill bit protrudes far enough through the plastic block to break the first but not the second and third optical beams, an LED is lit to indicate that the collar is positioned too close to the tip of the drill bit.
    Type: Grant
    Filed: November 23, 1990
    Date of Patent: December 29, 1992
    Assignee: AG Communication Systems Corporation
    Inventors: Thomas G. Wojciechowski, John B. Portzer
  • Patent number: 5175764
    Abstract: An enhanced high voltage line interface circuit for a digital switching system over which a connection is established between a digital switching system and a subscriber instrument via a subscriber loop. The high voltage line interface circuit includes in combination circuits that provide power to the subscriber loop and convert received analog voice signals transmitted from the subscriber instrument into differential voltage voice signals for subsequent conversion to digital data for use by the digital switching system. Additionally, differential voltage voice signals from the digital switching system are converted to analog voice signals for transmission along the subscriber loop to the subscriber instrument. The high voltage line interface circuit further includes circuits that detect and monitor the subscriber loop status and develop digital logic output signals that are used to report the status of the loop to a digital switching system controller.
    Type: Grant
    Filed: October 18, 1990
    Date of Patent: December 29, 1992
    Assignee: AG Communication Systems Corporation
    Inventors: Lalit O. Patel, Michael Warner, Absar Naseer
  • Patent number: 5166937
    Abstract: An arrangement is disclosed that is added to digital circuit device for providing a way of easily verifying that the device's input and output circuits are operating and connected properly. The arrangement implements a test mode in which a simple exercising sequence is placed on any single input of a defined sequential group of device pins. A resultant output can be observed on the next occurring output and all subsequent outputs of the defined sequential group.
    Type: Grant
    Filed: December 26, 1990
    Date of Patent: November 24, 1992
    Assignee: AG Communication System Corporation
    Inventor: John F. Blecha, Jr.
  • Patent number: 5163219
    Abstract: A tool for separating a printed wiring card under test from an extender card operated in response to insertion of a portion of the tool into a space between the extender card and the card under test and rotation of the tool, facilitating the complete separation of the card under test from the extender card.
    Type: Grant
    Filed: September 27, 1991
    Date of Patent: November 17, 1992
    Assignee: AG Communication Systems Corporation
    Inventors: Orest B. Akulow, James C. Budzynski, Andrew J. Karkowski
  • Patent number: 5163090
    Abstract: An over-current verifier circuit used in a Subscriber Line Interface Circuit (SLIC) for validating an over-current condition on a subscriber loop comprising a first counter connected to the SLIC disposed to receive an oversense signal from the SLIC. The first counter begins counting when the oversense signal is received and produces an output signal when the oversense signal is still active after the counter finishes, denoting a dc over-current in the subscriber loop. A timer circuit connected to the SLIC also receives the oversense signal. The timer is arranged to begin counting when the oversense signal is received. A second counter further receives the oversense signal and is advanced by one count on the high to low transition of the oversense signal. The second counter produces an output signal when three counter advances are produced before the timer times out, denoting an ac over-current condition.
    Type: Grant
    Filed: October 18, 1990
    Date of Patent: November 10, 1992
    Assignee: AG Communication Systems Corporation
    Inventors: Chris Pawlowski, Michael Warner
  • Patent number: 5155733
    Abstract: An arrangement is disclosed that is added to digital circuit device for providing a way of easily verifying that the device's input and output circuits are operating and connected properly. The arrangement implements a test mode in which a simple exercising sequence is placed on any single input of a defined sequential group of device pins. A resultant output can be observed on the next occurring output and all subsequent outputs of the defined sequential group.
    Type: Grant
    Filed: December 26, 1990
    Date of Patent: October 13, 1992
    Assignee: AG Communication Systems Corporation
    Inventor: John F. Blecha, Jr.
  • Patent number: 5154631
    Abstract: A substrate mounting device for installing an electrical substrate to a carrier substrate. The substrate mounting device includes a plurality of tabs extending from the perimeter edges of the electrical substrate. First and second substrate guides are mounted to the carrier substrate and each include a lower shelf and a channel extending longitudinally along a substrate guide inner side, from an open end to a top guide. The channel is further defined by a top surface and a plurality of drop guides which in turn form a plurality of slots. Also included are a plurality of flaps formed by molded spring back hinges to facilitate insertion from an upward direction. The electrical substrate is installed by manually placing the electrical substrate onto the flapped areas and then depressing in a downward and forward direction, causing the flaps to move in a downward direction allowing the electrical substrate to encounter top guides which act to urge the electrical substrate downward toward the carrier substrate.
    Type: Grant
    Filed: December 30, 1991
    Date of Patent: October 13, 1992
    Assignee: AG Communication Systems Corporation
    Inventor: Thomas D. Belanger, Jr.
  • Patent number: 5145400
    Abstract: A substrate connector guide for installing and electrically connecting an electrical substrate to a carrier substrate. The substrate connector guide includes guide rails mounted on the perimeter edge of the carrier substrate and electrical connectors mounted transversely between the guide rails. First and second substrate guides mounted to the carrier substrate. Each include a channel extending longitudinally along a substrate guide inner side, from an open end. A retention guide assists in maintaining the electrical substrate in proper position after insertion into the carrier substrate guide rails. Electrical connectors are also mounted and electrically connected to the electrical substrate. The electrical substrate is installed by manually inserting the electrical substrate into respective substrate guide open ends and pushing the electrical substrate along the channels. The electrical substrate rests on the carrier substrate and aligns the electrical susbstrate connectors to carrier electrical connectors.
    Type: Grant
    Filed: December 30, 1991
    Date of Patent: September 8, 1992
    Assignee: AG Communication Systems Corporation
    Inventor: Thomas D. Belanger, Jr.
  • Patent number: 5140616
    Abstract: In order to accomplish the object of the present invention there is provided a network independent clocking (NIC) circuit which allows a local synchronous master to exchange data with a local data adpater. The NIC circuit includes a phase measuring block for continually generating a local phase difference indicator, where the local phase difference indicator indicates a phase relation between the local data adapter and the local synchronous master. The local phase difference indicator is transmitted to a remote data adapter. Back locally, a phase difference indicator is received from a remote data adapter. A baud clock is generated and used to transfer data from the data adapter to the synchronous master, the baud clock generator uses the phase difference indicator to recreate the phase difference between the remote data adaper and the remote synchronous master.
    Type: Grant
    Filed: November 19, 1990
    Date of Patent: August 18, 1992
    Assignee: AG Communication Systems Corporation
    Inventor: Robert E. Renner
  • Patent number: 5133256
    Abstract: A printer plate locating device used in the alignment of printer plates with respect to a screen or stencil holder of a screen printing machine. The present invention is particularly useful when used in a multi-station printing machine where the printing machine sequentially moves the printer plates into a printing station to affect the printing or image transfer. The present invention consists of two securely connected rigid plates and a system of actuators. The mounting plate 1 acts as a support or structural member for the rest of the apparatus. The alignment plate, being smaller in size than the mounting plate, provides edges against which the substrate locating devices of the printer plate make contact. In operation, the present invention is fastened to the screen holder in place of a screen or stencil on the first station of the machine.
    Type: Grant
    Filed: March 11, 1991
    Date of Patent: July 28, 1992
    Assignee: AG Communication Systems Corporation
    Inventor: William R. Keaton
  • Patent number: 5122347
    Abstract: An ultraviolet exposure unit for exposing both sides of a printed circuit board to ultraviolet light to cause ultraviolet sensitive materials which have been applied to said printed circuit board to cure. A vertically positioned curing chamber and a printed circuit board carrier system provide vertical orientation and simultaneous application of ultraviolet light to both sides of the printed circuit board when such ultraviolet materials are applied to both sides of the printed circuit board.
    Type: Grant
    Filed: December 31, 1990
    Date of Patent: June 16, 1992
    Assignee: AG Communication Systems Corporation
    Inventors: Gary E. Hayden, Thomas G. Wojciechowski, Jeffrey F. Kotz, Juzer Mohammed
  • Patent number: 5120909
    Abstract: A circuit for detecting and verifying a presence of a terminating device for a high speed data transmission line. The circuit contains a first cable detector which generates a first signal if a first cable is present. A second cable detector generates a second signal if a second cable is present. The terminating device is contained in a plurality of resistor packs, each of the which contains an extra resistor. A terminating device detector senses the extra resistor presence, thereby detecting the presence of the resistor packs. The terminating device detector generates an ALL-EQUIPPED signal and a NON-EQUIPPED signal, the ALL-EQUIPPED signal is generated when all of the plurality of resistor packs are present, the NON-EQUIPPED signal is generated when all of the plurality of resistor packs are absent. Finally, a verifier circuit receives the first signal, the second signal, the ALL-EQUIPPED signal and the NON-EQUIPPED signal.
    Type: Grant
    Filed: April 26, 1991
    Date of Patent: June 9, 1992
    Assignee: AG Communication Systems Corporation
    Inventors: David A. Kutz, Tod R. Earhart
  • Patent number: 5119365
    Abstract: An improved bi-directional buffer line amplifier is disclosed that provides a high performance analog interface between a Digital Network Interface Circuit (DNIC) and a transmission line. The buffer line amplifier includes a transmit amplifier network including an input connected to a DNIC transmit signal output. The input is arranged to receive transmit signals from the DNIC. A transmit output is connected to a matching network via a selectable gain amplifying circuit. The selectable gain amplifying circuit applies the transmit signals to the matching network in a first or a second gain level. In the first gain level the gain amplifying circuit is removed from the transmit amplifier network and the transmit amplifier network operates as a unity gain amplifier. This allows the buffer line amplifier to work efficiently with transmission line loop lengths from zero to a nominal distance.
    Type: Grant
    Filed: December 14, 1990
    Date of Patent: June 2, 1992
    Assignee: AG Communication Systems Corporation
    Inventors: Michael Warner, Don H. Scrutchfield
  • Patent number: 5093917
    Abstract: A method for passing data parameters between a calling program and a called subroutine in a command analysis table of a computer stored data base system is disclosed. The method uses special operating codes written in the native language of the command analysis table, that allow the calling program to put pertinent information about the calling parameters into a temporary storage area. The called program or subroutine, uses a second op-code to collect the stored parameters in the temporary storage area. The pulled parameters are then used to initialize local variables and to load parameter values used by the called subroutine, into associated local registers. Information previously stored in the local registers is saved, and returned to the local registers when the subroutine finishes. Pertinent information for returning back to the calling program is also saved.
    Type: Grant
    Filed: January 17, 1990
    Date of Patent: March 3, 1992
    Assignee: AG Communication Systems Corporation
    Inventors: Brian D. Campbell, Todd L. Chesney, David R. Glick, Dane S. Iverson, Elizabeth A. Koval, Richard L. Miskowski, Kent A. Parkison, Gregory E. Wilson
  • Patent number: 5086371
    Abstract: A printed circuit board handle is disclosed for use with a printed circuit board. The printed circuit board handle includes a flange that extends for the length of the handle and is mounted to the printed circuit board. Two ribs protrude from the side of the flange that is adjacent to the printed circuit board and extend for the length of the handle. The ribs contact the printed circuit board in such a manner as to separate the body of the flange from the printed circuit board and thereby prevent the capillary action that causes entrapment of flux between the flange and the printed circuit board, during the wave soldering process.
    Type: Grant
    Filed: January 7, 1991
    Date of Patent: February 4, 1992
    Assignee: AG Communication Systems Corporation
    Inventors: James J. Grammas, James M. Maronn, James R. Weston
  • Patent number: 5078063
    Abstract: An assembly for holding a squeegee blade provides a levelness control of the squeegee blade and a pressure control on the squeegee blade. The assembly includes a wedge having a length approximately equal to that of the squeegee blade. The wedge also has a right triangle shape along its longitudinal axis. The wedge is positioned between an upper stationary body and the squeegee blade. There is also a pressure adjustment for moving the wedge in either direction along its longitudinal axis, such that the motion of the wedge produces pressure on the squeegee blade; thus, providing the pressure control. The leveling control is accomplished by a micrometer attached to a rigid plate. The micrometer being rotatable along its longitudinal axis. A gear, which is attached to the upper stationary body, is rotatable about a pivot point on the ridged plate by the rotation of the micrometer.
    Type: Grant
    Filed: December 19, 1990
    Date of Patent: January 7, 1992
    Assignee: AG Communication Systems Corporation
    Inventors: Scott W. Johansen, Dirk D. McCoy
  • Patent number: 5077891
    Abstract: A first method repairs the conductor traces of a printed circuit board assembly and includes the steps of first locating and isolating a break in an existing conductor trace. After the brake is isolated, an extrusion of a conductive resin material is applied, utilizing an extrusion delivery system. The conductive resin is then cured, hardening the conductive resin. A second method reworks the conductor traces of the printed circuit board assembly. This method severs an existing conductor path between existing electrical elements on the printed circuit board assembly and builds a conductor path to form a new connection. The method includes the steps of severing the conductor trace extending between the leads of a first and a second electrical element. Next, utilizing an extrusion delivery system, a conductive resin is extruded onto the printed circuit board assembly between the lead of the first electrical element and the lead of a third electrical element.
    Type: Grant
    Filed: April 30, 1990
    Date of Patent: January 7, 1992
    Assignee: AG Communication Systems Corporation
    Inventors: George S. Lychyk, Juzer Mohammed
  • Patent number: 5058141
    Abstract: A single circuit for detecting a synchronization pattern in a serial data stream. Subsequent to detecting the synchronization pattern, the single circuit generates the control signals for converting the serial data to a parallel format and loading the parallel data into a first-in-first-out (FIFO) memory. The single circuit includes a controller arranged to receive the serial data stream. A counter is connected to the controller. When the counter is detecting the synchronization pattern and the synchronization pattern is being received, the counter is incremented. Absent the synchronization pattern being received, the counter is reset to a predetermined starting point. Subsequent to detecting the synchronization pattern, the counter generates a load signal. The single circuit further includes a pulse generator arranged to receive the load signal from the counter and generate a pulse of duration equal to a bit period of the serial data stream.
    Type: Grant
    Filed: March 1, 1990
    Date of Patent: October 15, 1991
    Assignee: AG Communication Systems Corporation
    Inventors: Han Kem, John S. Young
  • Patent number: 5058112
    Abstract: A fault insertion circuit is disclosed which generates and applies a fault signal to a digital circuit under test. The fault insertion circuit includes fault insertion hardware connected to the digital circuit under test. The fault insertion hardware is arranged to select, generate and apply the fault signal. A programmable controller and communication circuit are also included. The communication circuit is connected to the controller and to a data terminal, personal computer or any other source of programming commands and instructions. The communication circuit receives the programming commands and instructions from the data terminal and transmits the commands and instructions to the controller. The controller in response to the received commands and instructions transmits control signals to the fault insertion hardware, thereby, generating and applying a fault signal to the digital circuit under test.
    Type: Grant
    Filed: July 31, 1989
    Date of Patent: October 15, 1991
    Assignee: AG Communication Systems Corporation
    Inventors: Walter J. Namitz, Charles S. Chang