Abstract: A switching power amplifier circuit has the functions of a power inverter and a switching amplifier embodied into one integral circuit. Two high frequency switching inverter circuits are connected back to back sharing the same inverter power transformer. One switching inverter circuit processes power from an input rail to an output capacitor while the other switching inverter circuit processes power from the output capacitor to the input rail. The output capacitor voltage is regulated with respect to a signal input in order to obtain the desired output signal waveform. A blocking capacitor in the output absorbs the DC component of the output capacitor voltage and allows a pure AC ringing signal to be applied to the load. In an application as a ringing generator circuit the signal input is supplied by a ringing signal oscillator circuit.

Abstract: A communication channel ownership arrangement where two call units (switching modules) each own certain ones of the bidirectional channels between the units. By virtue of ownership, a call unit can immediately assign owned channels to calls without consulting the other call unit. While the ownership of channels to calls may be artibrary at system initialization, ownership is modifiable on a per-call basis to dynamically adapt to the actual directional traffic patterns that are present at a given time to minimize the coordination and communication required between the call units.

Abstract: A combined binary and binary coded decimal (BCD) arithmetic logic unit (binary/BCD ALU) having a binary adder adapted to perform decimal operations on BCD data without impacting the performance of binary operations. The combined binary/BCD ALU has a look-ahead carry binary adder for generating the binary sum or logical combination of inputs to the binary adder to an output (Y), the Y output being arranged in groups of four bits. The binary adder additionally provides carry outputs Co.sub.i of the binary additions from each of the groups of four bits of the Y output. A decimal correction unit, responsive to the Y and Co.sub.i outputs from the binary adder [ALU means], corrects the binary sum from the binary adder when performing BCD arithmetic. A multiplexer selects the Y output from the binary adder to a result output when performing operations on binary data. Alternately, the multiplexer selects the output from the decimal correction unit to the result output performing operations on BCD data.

Abstract: The fabrication of a printed circuit board (26) usually includes the step of testing the board with a testing machine (24) to verify operability. The testing machine accomplishes such testing by transmitting test signals to the board via a transmission line (36) and then analyzing each response signals returned from the board in response to the test signals. To reduce the incidence of error, the testing machine (24) is compensated for the propagation delay of the line (12) which is measured by launching a first string of pulses into one end of the line whose opposite end is left open. A second string of pulses is sinultaneously launched into a programmable delay line (16) which delays each second pulse by an adjustable interval. After the generation of each first and second pulse, a check is made whether the first pulse has been reflected back to the first end of the transmission line at the same time the second pulse reaches the output of the delay line.

Abstract: A circuit package comprises at least one IC chip bonded directly in a hole provided in a wafer such that the surface of the chip and the surface of the wafer are in the same plane thereby accommodating TAB bonding of the chip to bonding pads provided on the wafer. The structure can include multilayer circuitry on the wafer.

Abstract: An actuator including a device made of thin film shape memory material mounted to a substrate. The thin film device is deformed from its original shape. Thereafter, the device is heated to restore the device to its original shape. Motion of the device occurs in the deforming and restoring steps, which is used to produce some form of work result.

Abstract: In a hermaphroditic connector (20), an optical fiber cable (24) extends through a cap (46) into a tapered passageway of a flanged bushing. Optical fibers extend through a bore in a wedge (65) having a truncated conical shape and being received in the bushing. Portions of non-metallic filamentary strength member (28) of the cable are captured between surfaces of a wall of the tapered passageway and the wedge which are substantially smooth to avoid damage to the strength members. Forces applied to the cable cause the wedge to be seated further in the bushing. The included angle between diametrically opposite lines on the wedge surface that lie in a plane passing through the longitudinal axis of the wedge enhances the locking features. The fibers also extend through a retention nut (70) which is turned threadably over a portion of the bushing and each fiber is connected to a plug (94) mounted adjacent to an end of the connector with one plug being received in an alignment sleeve (130).

Abstract: The connector comprises a plastic holder which carries two wire leads and serves as a cap for the free end of a drop wire inserted thereunto. Two metal contacts received in slots in the holder are driven in by pliers action to pierce the insulation of the leads and drop wire and to each engage both the conductor of a respective lead and a respective conductor of the drop wire to thereby electrically connect these two conductors. Next, plastic covers for the contacts, hinged to and integral with the holder, are closed to become locked thereto. The connection is then adapted to serve as a plug for an aperture in a terminal box, and to be attached thereto by snap action, and to have its leads connected to terminals in the box.

Abstract: Apparatus according to the invention comprises an optical, or opto-electronic device that comprises one or more "trapping" layers that can speed the decay of a non-equilibrium carrier distribution in an active region of the device, thereby improving device characterstics. In preferred embodiments the trapping layers are arranged so as to increase the likelihood of radiative recombination of carriers leading to erased heat sinking requirements.

Abstract: A molecular beam epitaxy method of growing Ge.sub.x Si.sub.1-x films on silicon substrate is described. Semiconductor heterostructures using Ge.sub.x Si.sub.1-x layers grown on either Ge or Si substrates are described.

Abstract: An opto-electronic organizer on a printed wiring card includes a plurality of opto-electronic devices each having electrical leads and at least one optical fiber extending therefrom and an optical fiber channel in the form of a closed loop for directing optical fibers. The opto-electronic devices are attached to the optical fiber closed loop channel at predetermined locations therealong and the optical fibers extending from the devices are directed into the closed loop channel wherein they are selectively interconnected. The closed loop channel has first and second portions and at least one channel joining the first and second portions so that optical fiber passing therethrough can reenter the closed loop either clockwise or counterclockwise. The organizer is affixed to the printed circuit card in predetermined alignment whereby the electrical leads extending from the opto-electronic devices are connected to prescribed electrical elements on the printed circuit card.

Abstract: Ionic drift in integrated optical devices is reduced by the utilization of a gettering layer interposed between the surface dielectric and the electrodes. The material used to form this layer is capable of gettering the mobile ions at a relatively low temperature (for example <600.degree. C.).

Abstract: Apparatus and method for identifying the location of a lost token signal continuously transmitted on transmission paths interconnecting nodes of a network to sequentially enable the nodes to write data onto the network. The arrival of the token signal at each node is recorded in counter states of a token track counter corresponding with the node. The recorded binary counter states are compared upon the failure of the token signal to arrive at a node to detect mismatches and transitions occurring between adjacent nodes counter states identifying the network location of the lost token signal.

Abstract: Single GaAs quantum well or single GaAs active layer or single reverse interface structures with Al.sub.x Ga.sub.1-x As barrier layers have improved qualities when one or more narrow bandgap GaAs getter-smoothing layers, which are thin, are grown and are incorporated in the barrier layer before and in close proximity to the active layer.

Abstract: An arrangement and a method for recognizing a speech pattern employs a quick initial processing based upon subpatterns of speech features from which time-sequence information has been removed is followed by more conventional processing of a plurality of the best candidates. The initial processing, or pre-selection, eliminates large numbers of unlikely candidates, the best candidates being retained by setting an empirically determined threshold for similarity, as measured by a suitable distance measurement. To facilitate retrieving the complete speech feature patterns including time-sequence information for the subsequent processing, the code books of the subpatterns also contain associated indices pointing to the corresponding complete patterns.

Abstract: A high performance bipolar transistor structure is disclosed which exhibits an extremely low extrinsic base resistance by virtue of a silicide layer which is included in the base contact portion of the structure. The silicide layer is situated to be electrically in parallel with the conventional heavily-doped polysilicon base contact region, where a vertical polysilicon runner is used to provide a self-aligned electrical contact to the base. The parallel combination of the low resistivity (0.5-4 ohm/square) silicide with the polysilicon (sheet resistance of 10-100 ohm/square) results in a low extrinsic base resistance on the order of 0.5-4 ohm/square. The disclosed device also includes a submicron emitter size, defined by vertical oxide sidewalls above the base region, which further improves the high frequency performance of the device.

Abstract: The invention is a controlled laser having an optical resonator, a laser gain medium placed inside the optical resonator, the laser gain medium being capable of emitting light and of lasing with the light, a multiple layer heterostructure placed inside the optical resonator, and means for varying an optical absorption of the multiple layer heterostructure for the light in order to control an optical gain of the optical resonator, and thereby control lasing of the laser gain medium. Passive mode locking is achieved by the light emitted by the gain medium controlling the optical absorption of the multiple layer heterostructure. Active mode locking and modulation are achieved by controlling the optical absorption of the multiple layer heterostructure by applying an electric field to the multiple layer heterostructure.

Abstract: Optical fiber cables have an inner sheath extruded or otherwise applied to surround optical fibers. If the fibers are coupled to the sheath, substantial shrinkage of the sheath during manufacturing induces microbending losses in the optical fibers. The inventive technique involves choosing a sheath material having a low viscoelastic modulus, typically PVC, and the application of tension thereto during or after extrusion that prevents such shrinkage. This approach typically avoids the necessity of including longitudinal compressive strength members in the cable. A filled optical fiber cable having a flexible gel to prevent water entry advantageously uses the present technique.

Abstract: A previously ignored property of a degenerate 2-dimensional gas of charge carriers in a quantum well (to be termed the quantum-capacitance effect) makes possible a novel class of transistors. In these devices the collector (a quantum well having high transverse conductance) is located between gate and emitter, with a barrier layer between emitter and collector, and a relatively thin barrier layer between collector and gate, and the chemical compositions and/or thicknesses of the various layers are chosen such that application of a voltage to the gate results, as a manifestation of the quantum-capacitance effect, in an induced charge in the emitter, whereby a current between emitter and collector can be controlled by means of a voltage applied to the gate. Transistors according to the invention potentially are very fast. Exemplarily the invention is embodied in a GaAs/AlGaAs heterostructure.