Abstract: A system and method for processing signals from at least two sources, using a receiver having a timer and a local code sequence, the method comprising, providing at least one signal channel divided into a plurality of sequential time slots processing said signal from a first of said two sources in a first time slot of the plurality of time slots to provide a first time slot signal, processing said signal from a second of said two sources in a second time slot of the plurality of time slots to provide a second time slot signal, processing said signal from said first of said two sources in a third time slot of the plurality of time slots to provide a third time slot signal, said first, second and third time slots occurring in sequential order, comparing said local code sequence to said signals in said first and third time slots by incrementing the local code sequence during the interval between said first and third time slots.

Abstract: In a fractional-N frequency synthesizer, a circuit for generating at least one off-axis zero in an equation representative of the circuit.

Abstract: A method for generating a plurality of frequencies having predetermined frequency deviations from a phase lock loop device including a VCO having a main voltage input, a modulation voltage input and a frequency output, a first and second feedback loop digital divider, each having an input and an output, a phase frequency detector having a first and second input and an output, a reference frequency generator such as a crystal oscillator having an output, a first and second reference frequency digital divider, each having an input and an output, a loop filter having an input and an output, a switch having an input and a first and a second switched output, a hold circuit having an input and an output, a memory circuit for storing the a lock voltage and the corresponding loop output frequency, the steps including; setting a first initial predetermined value of the first feedback loop digital divider, connecting a switch output to the main input of the VCO, supplying a first predetermined reference frequency to th

Abstract: A package for housing a device (e.g., an integrated circuit chip or die) includes a Faraday cage. The Faraday cage is at least partially formed in the integrated circuit die. The die includes conductive vias and solder balls surrounding a circuit. The package can be a ball grid array (BGA) package or flip chip package. The package substrate can include a ground plane.

Abstract: A package for housing a device (e.g., an integrated circuit chip or die) includes a Faraday cage. The Faraday cage is at least partially formed in the integrated circuit die. The die includes conductive vias and solder balls surrounding a circuit. The package can be a ball grid array (BGA) package or flip chip package. The package substrate can include a ground plane.

Abstract: A modulator and a method of modulating utilizes phase or frequency modulation and amplitude modulation. A delay circuit or synchronization circuit is utilized to coordinate the performance of amplitude modulation and phase modulation. The amplitude modulation can be provided after phase modulation is provided to the signal. The modulation circuit can be utilized in any frequency range including high frequency and low frequency circuits.