Patents Assigned to ASM Japan K.K.
  • Patent number: 8394466
    Abstract: A method of forming a conformal dielectric film having Si—N bonds on a substrate having a patterned surface includes: introducing a reactant gas into a reaction space; introducing a silicon precursor in pulses of less than 5-second duration into the reaction space; applying a first RF power to the reaction space during the pulse of the silicon precursor; applying a second RF power to the reaction space during the interval of the silicon precursor pulse, wherein an average intensity of the second RF power during the interval of the silicon precursor pulse is greater than that of the first RF power during the pulse of the silicon precursor; and repeating the cycle to form a conformal dielectric film having Si—N bonds with a desired thickness on the patterned surface of the substrate.
    Type: Grant
    Filed: September 3, 2010
    Date of Patent: March 12, 2013
    Assignee: ASM Japan K.K.
    Inventors: Kuo-wei Hong, Akira Shimizu, Kunitoshi Namba, Woo-Jin Lee
  • Publication number: 20130029498
    Abstract: A method for reducing a dielectric constant of a film includes (i) forming a dielectric film on a substrate; (ii) treating a surface of the film without film formation, and (III) curing the film. Step (i) includes providing a dielectric film containing a porous matrix and a porogen on a substrate, step (ii) includes, prior to or subsequent to step (iii), treating the dielectric film with charged species of hydrogen generated by capacitively-coupled plasma without film deposition to reduce a dielectric constant of the dielectric film, and step (iii) includes UV-curing the dielectric film to remove at least partially the porogen from the film.
    Type: Application
    Filed: July 27, 2011
    Publication date: January 31, 2013
    Applicant: ASM Japan K.K.
    Inventor: Akinori Nakano
  • Publication number: 20130014697
    Abstract: A container for containing a liquid material for processing a wafer includes: a container body; a divider dividing the interior of the container body and defining compartments fluid-tightly sealed off from each other except for bottom portions of the compartments; gas inlet ports for introducing gas to the respective compartments and gas outlet ports for discharging gas from the respective compartments; and a liquid level sensor provided in one of the compartments for keeping a liquid surface of a liquid material above the bottom portions when the container is in use conditions.
    Type: Application
    Filed: July 12, 2011
    Publication date: January 17, 2013
    Applicant: ASM JAPAN K.K.
    Inventor: Hiroki Kanayama
  • Publication number: 20130014896
    Abstract: A wafer-supporting device for supporting a wafer thereon adapted to be installed in a semiconductor-processing apparatus includes: a base surface; and protrusions protruding from the base surface and having rounded tips for supporting a wafer thereon. The rounded tips are such that a reverse side of a wafer is supported entirely by the rounded tips by point contact. The protrusions are disposed substantially uniformly on an area of the base surface over which a wafer is placed, wherein the number (N) and the height (H [?m]) of the protrusions as determined in use satisfy the following inequities per area for a 300-mm wafer: (?0.5N+40)?H?53; 5?N<100.
    Type: Application
    Filed: July 15, 2011
    Publication date: January 17, 2013
    Applicant: ASM JAPAN K.K.
    Inventors: Fumitaka Shoji, Hideaki Fukuda
  • Publication number: 20120325148
    Abstract: A method for positioning wafers in dual wafer transport, includes: simultaneously moving first and second wafers placed on first and second end-effectors to positions over lift pins protruding from first and second susceptors, respectively; and correcting the positions of the first and second wafers without moving any of the lift pins relative to the respective susceptors or without moving the lift pins relative to each other, wherein when the first and second wafers are moved to the respective positions, the distance between the first wafer and tips of the lift pins of the first susceptor is substantially smaller than the distance between the second wafer and tips of the lift pins of the second susceptor.
    Type: Application
    Filed: June 22, 2011
    Publication date: December 27, 2012
    Applicant: ASM JAPAN K.K.
    Inventors: Takayuki Yamagishi, Masaei Suwada, Hiroyuki Tanaka
  • Publication number: 20120328780
    Abstract: A dual section module with mass flow controllers, for processing wafers, includes: dual process sections integrated together; at least one mass flow controller (MFC) each shared by the dual process sections and provided in a gas line branching into two gas lines, at a branching point, connected to the respective interiors of the dual process sections and arranged symmetrically between the dual process sections; and at least one mass flow controller (MFC) each unshared by the dual process sections and provided in a gas line connected to the interior of each dual process section.
    Type: Application
    Filed: June 27, 2011
    Publication date: December 27, 2012
    Applicant: ASM JAPAN K.K.
    Inventor: Takayuki Yamagishi
  • Patent number: 8334219
    Abstract: A method of forming stress-tuned dielectric films having Si—N bonds on a semiconductor substrate by modified plasma enhanced atomic layer deposition (PEALD), includes: introducing a nitrogen-and hydrogen-containing reactive gas and an additive gas into a reaction space inside which a semiconductor substrate is placed; applying RF power to the reaction space using a high frequency RF power source and a low frequency RF power source; and introducing a hydrogen-containing silicon precursor in pulses into the reaction space wherein a plasma is excited, thereby forming a stress-tuned dielectric film having Si—N bonds on the substrate.
    Type: Grant
    Filed: July 8, 2010
    Date of Patent: December 18, 2012
    Assignee: ASM Japan K.K.
    Inventors: Woo-Jin Lee, Kuo-Wei Hong, Akira Shimuzu
  • Patent number: 8329599
    Abstract: A method of forming a dielectric film having at least Si—N, Si—C, or Si—B bonds on a semiconductor substrate by atomic layer deposition (ALD), includes: adsorbing a precursor on a surface of a substrate; supplying a reactant gas over the surface; reacting the precursor and the reactant gas on the surface; and repeating the above steps to form a dielectric film having at least Si—N, Si—C, or Si—B bonds on the substrate. The precursor has at least one Si—C or Si—N bond, at least one hydrocarbon, and at least one halogen attached to silicon in its molecule.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: December 11, 2012
    Assignee: ASM Japan K.K.
    Inventors: Atsuki Fukazawa, Noboru Takamure
  • Publication number: 20120305196
    Abstract: A wafer-processing apparatus includes: eight or ten reactors with identical capacity for processing wafers on the same plane, constituting four or five discrete units, each unit having two reactors arranged side by side with their fronts aligned in a line; a wafer-handling chamber including two wafer-handling robot arms each having at least two end-effectors; a load lock chamber; and a sequencer for performing, using the two wafer-handling robot arms, steps of unloading/loading processed/unprocessed wafers from/to any one of the units, and steps of unloading/loading processed/unprocessed wafers from/to all the other respective units in sequence while the wafers are in the one of the units.
    Type: Application
    Filed: June 6, 2011
    Publication date: December 6, 2012
    Applicant: ASM JAPAN K.K.
    Inventors: Yukihiro Mori, Takayuki Yamagishi
  • Publication number: 20120295449
    Abstract: A method of forming a dielectric film having at least Si—N, Si—C, or Si—B bonds on a semiconductor substrate by atomic layer deposition (ALD), includes: supplying a precursor in a pulse to adsorb the precursor on a surface of a substrate; supplying a reactant gas in a pulse over the surface without overlapping the supply of the precursor; reacting the precursor and the reactant gas on the surface; and repeating the above steps to form a dielectric film having at least Si—N, Si—C, or Si—B bonds on the substrate. The precursor has at least one Si—C or Si—N bond, at least one hydrocarbon, and at least two halogens attached to silicon in its molecule.
    Type: Application
    Filed: August 3, 2012
    Publication date: November 22, 2012
    Applicant: ASM JAPAN K.K.
    Inventor: Atsuki Fukazawa
  • Publication number: 20120276306
    Abstract: A method for forming a film by atomic layer deposition wherein vertical growth of a film is controlled, includes: (i) adsorbing a metal-containing precursor for film formation on a concave or convex surface pattern of a substrate; (ii) oxidizing the adsorbed precursor to form a metal oxide sub-layer; (iii) adsorbing a metal-free inhibitor on the metal oxide sub-layer more on a top/bottom portion than on side walls of the concave or convex surface pattern; and (iv) repeating steps (i) to (iii) to form a film constituted by multiple metal oxide sub-layers while controlling vertical growth of the film by step (iii).
    Type: Application
    Filed: April 26, 2011
    Publication date: November 1, 2012
    Applicant: ASM JAPAN K.K.
    Inventor: Shintaro Ueda
  • Patent number: 8298951
    Abstract: A method of forming side spacers upwardly extending from a substrate, includes: providing a template constituted by a photoresist formed on and in contact with an etch-selective layer laminated on a substrate; anisotropically etching the template in a thickness direction with an oxygen-containing plasma to remove a footing of the photoresist and an exposed portion of the underlying layer; depositing a spacer film on the template by atomic layer deposition (ALD); and forming side spacers using the spacer film by etching. The etch-selective layer has a substantially lower etch rate than that of the photoresist.
    Type: Grant
    Filed: April 13, 2011
    Date of Patent: October 30, 2012
    Assignee: ASM Japan K.K.
    Inventor: Ryu Nakano
  • Publication number: 20120264305
    Abstract: A method of forming side spacers upwardly extending from a substrate, includes: providing a template constituted by a photoresist formed on and in contact with an etch-selective layer laminated on a substrate; anisotropically etching the template in a thickness direction with an oxygen-containing plasma to remove a footing of the photoresist and an exposed portion of the underlying layer; depositing a spacer film on the template by atomic layer deposition (ALD); and forming side spacers using the spacer film by etching. The etch-selective layer has a substantially lower etch rate than that of the photoresist.
    Type: Application
    Filed: April 13, 2011
    Publication date: October 18, 2012
    Applicant: ASM JAPAN K.K.
    Inventor: Ryu Nakano
  • Publication number: 20120223220
    Abstract: A method for managing UV irradiation for treating substrates in the course of treating multiple substrates consecutively with UV light, includes: exposing a first UV sensor to the UV light at first intervals to measure illumination intensity of the UV light so as to adjust the illumination intensity to a desired level based on the measured illumination intensity; and exposing a second UV sensor to the UV light at second intervals to measure illumination intensity of the UV light so as to calibrate the first UV sensor by equalizing the illumination intensity measured by the first UV sensor substantially with the illumination intensity measured by the second UV sensor, wherein each second interval is longer than each first interval.
    Type: Application
    Filed: March 3, 2011
    Publication date: September 6, 2012
    Applicant: ASM JAPAN K.K.
    Inventor: Hirofumi Arai
  • Publication number: 20120220139
    Abstract: A method of forming a film on a semiconductor substrate by plasma enhanced atomic layer deposition (PEALD), includes: introducing a nitrogen- and hydrogen-containing reactive gas and a rare gas into a reaction space inside which the semiconductor substrate is placed; introducing a precursor in pulses of less than 1.0-second duration into the reaction space wherein the reactive gas and the rare gas are introduced; exiting a plasma in pulses of less than 1.0-second duration immediately after the precursor is shut off; and maintaining the reactive gas and the rare gas as a purge of less than 2.0-second duration.
    Type: Application
    Filed: March 2, 2012
    Publication date: August 30, 2012
    Applicant: ASM JAPAN K.K.
    Inventors: Woo-Jin Lee, Kuo-wei Hong, Akira Shimizu, Deakyun Jeong
  • Publication number: 20120214318
    Abstract: A method of forming a dielectric film having at least Si—N, Si—C, or Si—B bonds on a semiconductor substrate by atomic layer deposition (ALD), includes: adsorbing a precursor on a surface of a substrate; supplying a reactant gas over the surface; reacting the precursor and the reactant gas on the surface; and repeating the above steps to form a dielectric film having at least Si—N, Si—C, or Si—B bonds on the substrate. The precursor has at least one Si—C or Si—N bond, at least one hydrocarbon, and at least one halogen attached to silicon in its molecule.
    Type: Application
    Filed: February 18, 2011
    Publication date: August 23, 2012
    Applicant: ASM JAPAN K.K.
    Inventors: Atsuki Fukazawa, Noboru Takamure
  • Patent number: 8241991
    Abstract: A method for forming an interconnect structure with airgaps, includes: providing a structure having a trench formed on a substrate; depositing a spacer oxide layer on sidewalls of the trench as sidewall spacers by plasma enhanced atomic layer deposition; filling the trench having the sidewall spacers with copper; removing the sidewall spacers to form an airgap structure; and encapsulating the airgap structure, wherein airgaps are formed between the filled copper and the sidewalls of the trench.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: August 14, 2012
    Assignee: ASM Japan K.K.
    Inventors: Julian J. Hsieh, Nobuyoshi Kobayashi, Akira Shimizu, Kiyohiro Matsushita, Atsuki Fukazawa
  • Publication number: 20120196048
    Abstract: A thin film is formed by alternating multiple times, respectively, a process of adsorbing a precursor onto a substrate and a process of treating the adsorbed surface using a reactant gas and a plasma, wherein the reactant gas is supplied substantially uniformly over the substrate, and the plasma is pulse-time-modulated and applied in the process of supplying the reactant gas.
    Type: Application
    Filed: January 28, 2011
    Publication date: August 2, 2012
    Applicant: ASM JAPAN K.K.
    Inventor: Shintaro Ueda
  • Publication number: 20120164846
    Abstract: A method of forming a metal oxide hardmask on a template includes: providing a template constituted by a photoresist or amorphous carbon formed on a substrate; and depositing by atomic layer deposition (ALD) a metal oxide hardmask on the template constituted by a material having a formula SixM(1-x)Oy wherein M represents at least one metal element, x is less than one including zero, and y is approximately two or a stoichiometrically-determined number.
    Type: Application
    Filed: December 21, 2011
    Publication date: June 28, 2012
    Applicant: ASM JAPAN K.K.
    Inventors: Jeongseok Ha, Hideaki Fukuda, Shintaro Kaido
  • Patent number: 8197915
    Abstract: A method of depositing a silicon oxide film on a resist pattern or etched lines formed on a substrate by plasma enhanced atomic layer deposition (PEALD) includes: providing a substrate on which a resist pattern or etched lines are formed in a PEALD reactor; controlling a temperature of a susceptor on which the substrate is placed at less than 50° C. as a deposition temperature; introducing a silicon-containing precursor and an oxygen-supplying reactant to the PEALD reactor and applying RF power therein in a cycle, while the deposition temperature is controlled substantially or nearly at a constant temperature of less than 50° C., thereby depositing a silicon oxide atomic layer on the resist pattern or etched lines; and repeating the cycle multiple times substantially or nearly at the constant temperature to deposit a silicon oxide atomic film on the resist pattern or etched lines.
    Type: Grant
    Filed: April 1, 2009
    Date of Patent: June 12, 2012
    Assignee: ASM Japan K.K.
    Inventors: Takahiro Oka, Akira Shimizu