Patents Assigned to Burr-Brown Corporation
  • Patent number: 5049882
    Abstract: High speed conversion of an analog input signal to a digital output signal is performed by applying the analog input to an input of a unity gain amplifier. During a first pass, an output signal produced by the amplifier is applied to inputs of each of a plurality of comparators. A first group of successively larger reference voltages are applied to reference inputs of the comparators, respectively. A plurality of the comparators switch in response thereto to produce output signals indicative of a range within which the output of the amplifier lies. The outputs of the comparators are encoded to effectuate conversion thereof to an analog representation of the amplifier output. The analog representation is compared to the analog input signal and the difference therebetween is applied to the input of the amplifier. During another pass another group of reference voltages, each substantially lower than corresponding values thereof during the previous pass, are applied to the reference inputs of the comparators.
    Type: Grant
    Filed: December 20, 1990
    Date of Patent: September 17, 1991
    Assignee: Burr-Brown Corporation
    Inventors: James L. Gorecki, Michael J. McGowan
  • Patent number: 5047665
    Abstract: A dual successive approximation analog-to-digital converter, including circuitry for generating separate reference voltages for each analog-to-digital converter, is integrated onto a single semiconductor chip. A single successive approximation register including a 19 bit shift register and two 18 bit latches and associated gating circuitry operates to produce two sets of 18 successive approximation numbers, one supplied as successive digital inputs to a CDAC of one of the analog-to-digital converters and the other set of successive approximation numbers being applied as digital inputs to a CDAC of the other analog-to-digital converter. A CMOS comparator includes two high speed, low gain differential amplifier stages, the first including cascode MOSFETs to provide a high power supply rejection.
    Type: Grant
    Filed: June 15, 1990
    Date of Patent: September 10, 1991
    Assignee: Burr-Brown Corporation
    Inventor: Rodney T. Burt
  • Patent number: 5019789
    Abstract: A push-pull amplifier circuit includes an NPN pullup transistor and an pulldown transistor, an emitter of the pullup transistor being coupled to a collector of the pulldown transistor. A first resistor is coupled between an output conductor and the emitter of the pullup transistor, and a second resistor is coupled between an emitter of the pulldown transistor and a supply voltage. A bias circuit includes a phase splitting transistor having an emitter coupled to a constant bias current source and a base of the pullup transistor, a collector coupled to a base of the pulldown transistor, and a control electrode coupled to an input signal. The phase splitting transistor steers a portion of the bias current into a first conductor connected to the base of the pullup transistor and a portion of the bias current into a second conductor connected to the base of the pulldown transistor in response to an input signal applied to the control electrode of the phase splitting transistor.
    Type: Grant
    Filed: June 26, 1990
    Date of Patent: May 28, 1991
    Assignee: Burr-Brown Corporation
    Inventors: Jerald G. Graeme, Steven D. Millaway
  • Patent number: 5017918
    Abstract: A digital-to-analog converter converts a digital word of M+N bits to an analog signal with reduced bit switching error, by providing a first group of M input conductors conducting the M most significant bits of the digital word, a second group of N input conductors conducting the N least significant bits of the digital word, and an M bit plus 1 adder having M inputs connected to a corresponding conductor of the first group. A signal representative of the most significant bit of the digital input word is coupled to an input of the adder. The adder has M output conductors. Signals on the N input conductors of the second group together with signals on the M output conductors from an intermediate digital word of M+N bits differ in value from the first digital word. An M+N bit DAC receives the intermediate digital word and produces an analog current corresponding to the value of the intermediate digital word.
    Type: Grant
    Filed: March 26, 1990
    Date of Patent: May 21, 1991
    Assignee: Burr-Brown Corporation
    Inventor: Kyoji Matsusako
  • Patent number: 5003269
    Abstract: A unity gain amplifier of the Diamond follower type provides the combination of negligible input offset voltage, high slew rate, and high bandwidth by providing first and second opposite polarity current mirror circuits which respond to currents flowing through first and second input transistors to boost current available to charge parasitic capacitances during fast rise times and fast fall times of an input pulse. The rapid charging and discharging of the parasitic capacitances eliminates degradation in the rise and fall times of an output pulse produced by the unity gain amplifier.
    Type: Grant
    Filed: May 12, 1989
    Date of Patent: March 26, 1991
    Assignee: Burr-Brown Corporation
    Inventor: Klaus Lehmann
  • Patent number: 4999585
    Abstract: Circuitry for reducing harmonic distortion in an amplifier includes a first transistor having a first non-linear collector-to-substrate capacitance, a first load device coupled to a collector of the first transistor, a first current source coupled to an emitter of the first transistor, a first conductor conducting an input voltage coupled to a base of the first transistor, and a second conductor coupled to the first load device and conducting an output voltage of the amplifier. The first transistor produces a first non-linear current in the first non-linear collector-to-substrate capacitance in response to the input voltage. A second transistor has a second non-linear collector-to-substrate capacitance. A second current source is coupled to an emitter of the second transistor. The first conductor is coupled to apply the input voltage to a base of the second transistor.
    Type: Grant
    Filed: November 6, 1989
    Date of Patent: March 12, 1991
    Assignee: Burr-Brown Corporation
    Inventors: Rodney T. Burt, Timothy V. Kalthoff, David A. Heisley, R. Mark Stitt, II
  • Patent number: 4968901
    Abstract: An attenuator for use in an integrated circuit window comparator circuit provides voltage division across an input voltage divider including a large number of identical thin film resistor segments combined in various series and parallel arrangements so that resistive voltage division of the input signal is in the same ratio as capacitive voltage division of the input signal by parasitic capacitances of the resistors.
    Type: Grant
    Filed: May 16, 1989
    Date of Patent: November 6, 1990
    Assignee: Burr-Brown Corporation
    Inventor: Stuart B. Shacter
  • Patent number: 4954769
    Abstract: A stable, low noise, low output impedance CMOS reference voltage circuit includes a CMOS/bipolar band gap circuit producing a reference voltage on the source of a source follower transistor driven by an output of a CMOS differential amplifier which maintains a V.sub.THERMAL voltage across the bases of a pair of emitter follower transistors driving the inputs of the CMOS differential amplifier. A power supply noise rejection circuit includes a cascode MOSFET coupling the drain of the source follower output transistor to a positive power supply voltage conductor. A current mirror circuit greatly attenuates any power supply voltage perturbations before they reach the gate of the cascode MOSFET. A unity gain buffer includes a CMOS differential amplifier input stage with one input coupled to the output of the source follower transistor and an output driving a CMOS operational transconductance amplifier.
    Type: Grant
    Filed: February 8, 1989
    Date of Patent: September 4, 1990
    Assignee: Burr-Brown Corporation
    Inventor: Timothy V. Kalthoff
  • Patent number: 4945955
    Abstract: An apparatus for transferring toxic waste liquid directly into a 55 gallon waste drum includes a mobile drum cradle that lifts the drum so it can be moved to a container presently holding the toxic liquid. A vacuum is produced in a transfer reservoir, and an inlet valve of the tank is opened and a dump valve of the tank is closed. The vacuum draws waste liquid through a tube and the inlet valve into the transfer reservoir until a full condition is sensed. The vacuum then is released, the inlet valve is closed, and the dump valve is opened, dumping waste liquid from the transfer reservoir through the dump valve directly into the drum. This procedure is automatically repeated until all of the waste liquid is transferred or a drum full condition is sensed. The drum is then carried to a disposal site by the mobile drum cradle.
    Type: Grant
    Filed: March 23, 1988
    Date of Patent: August 7, 1990
    Assignee: Burr-Brown Corporation
    Inventor: Dennis Murphy
  • Patent number: 4947169
    Abstract: In one embodiment, a successive approximation analog-to-digital converter having a main CDAC and a trim CDAC includes resistors in the main CDAC connected in series with various bit switch FETs. The resistors are precisely matched to equivalent resistances of trimmable voltage divider circuits connected in series with various corresponding bit switch FETs in the trim DAC, to prevent non-linear parasitic capactiance and voltage-current properties of first and second clamping FETs from "unbalancing" the voltages on the charge summing conductors of the main DAC and the trim DAC during turn-off of the first and second clamping FETs after they have been turned on to equalize the voltages of the charge summing conductors. In another embodiment, separate trim and dummy DACs are provided to improve the accuracy to which the resistances in the main CDAC and trim CDAC can, as a practical matter, be matched.
    Type: Grant
    Filed: October 24, 1989
    Date of Patent: August 7, 1990
    Assignee: Burr-Brown Corporation
    Inventors: Lewis R. Smith, David M. Thomas
  • Patent number: 4945259
    Abstract: A circuit for producing a reference voltage includes an NPN transistor having its emitter connected to a first terminal, its collector connected to a second terminal, a PNP transistor having its emitter connected to the second terminal, its base connected to the base of the NPN transistor, and having its collector connected to the second terminal. A current source is connected to either the first terminal or the second terminal to force a current which is divided into a current through the PNP transistor and another current through the NPN transistor. The circuit produces a reference voltage equal to the sum of the PNP V.sub.BE voltage and the NPN V.sub.BE voltage. The reference voltage tracks precisely with variations in saturation currents of the PNP transistor and the NPN transistor. The circuit is useful in producing a two V.sub.BE bias voltage between the base of an NPN pullup transistor and a PNP pulldown transistor having a common emitter connection to an output terminal.
    Type: Grant
    Filed: November 10, 1988
    Date of Patent: July 31, 1990
    Assignee: Burr-Brown Corporation
    Inventor: Thomas R. Anderson
  • Patent number: 4940981
    Abstract: A dual successive approximation analog-to-digital converter, including circuitry for generating separate reference voltages for each analog-to-digital converter, is integrated onto a single semiconductor chip. A single successive approximation register including a 19 bit shift register and two 18 bit latches and associated gating circuitry operates to produce two sets of 18 successive approximation numbers, one supplied as successive digital inputs to a CDAC of one of the analog-to-digital converters and the other set of successive approximation numbers being applied as digital inputs to a CDAC of the other analog-to-digital converter. A CMOS comparator includes two high speed, low gain differential amplifier stages, the first including cascode MOSFETs to provide a high power supply rejection.
    Type: Grant
    Filed: February 8, 1989
    Date of Patent: July 10, 1990
    Assignee: Burr-Brown Corporation
    Inventors: Jimmy R. Naylor, Rodney T. Burt, Tony D. Miller
  • Patent number: 4904951
    Abstract: A technique for reducing phase shift of a signal passing through a large thin film resistor on an insulating layer includes applying a signal to one terminal of the thin film resistor and also to one end of an underlying doped epitaxial region. The opposite terminal of the thin film resistor is connected to a virtual ground or virtual reference voltage produced by an inverting input of an operational amplifier. The corresponding opposite end of the epitaxial layer is connected to ground or other reference voltage. The voltage gradients produced by currents flowing through both the thin film resistor and the epitaxial layer are equal, so that substantially no incremental charging current flows through capacitance between the thin film resistor and the epitaxial layer. Phase shift of the signal flowing through the thin film resistor is thereby avoided.
    Type: Grant
    Filed: June 6, 1988
    Date of Patent: February 27, 1990
    Assignee: Burr-Brown Corporation
    Inventors: Johnnie F. Molina, Robert M. Stitt, II
  • Patent number: 4901031
    Abstract: A common-base, source-driven differential amplifier achieves both high speed operation and low noise operation by providing an input stage including a pair of source follower JFETs that drive emitters of a pair of NPN input transistors having their bases connected together and to a bias circuit. The collectors of the NPN transistors each are connected to a corresponding load device and to a corresponding input of an output amplifier stage. The bias circuit includes a current source and a pair of diode-connected NPN transistors having their bases and collectors connected to the current source and to the bases of the input transistors. The emitters of the diode-connected NPN transistors are connected to sources of a second pair of source follower JFETs, the gates of which are connected to the input terminals.
    Type: Grant
    Filed: January 17, 1989
    Date of Patent: February 13, 1990
    Assignee: Burr-Brown Corporation
    Inventors: Timothy V. Kalthoff, Rodney T. Burt, R. Mark Stitt, II
  • Patent number: 4897616
    Abstract: A wideband integrated circuit amplifier includes a pair of current mirror circuits sensing emitter currents of NPN and PNP transistors in the amplifier output stage. A pair of current mirror circuits divide the emitter currents, respectively, by a factor of 20. The current mirror output currents are summed, current splitter directs approximately 1/20 of the summed mirror currents through a transistor, the collector of which is coupled to the gate electrode of a field effect input transistor of a bias control circuit, to produce a scaled down feedback current. A high impedance current source is connected to the collector of the transistor. The bias circuit adjusts the DC bias voltage applied between the base electrodes of the transistors to cause the scaled down feedback current to equal the constant current. A very small compensation capacitor produces a low frequency pole that prevents the bias circuit from interfering with high frequency performance characteristics of a wide band amplifier.
    Type: Grant
    Filed: July 25, 1988
    Date of Patent: January 30, 1990
    Assignee: Burr-Brown Corporation
    Inventors: Anthony D. Wang, R. Mark Stitt, II
  • Patent number: 4893091
    Abstract: A complementary current mirror includes a PNP transistor and an NPN transistor, one of which serves as a control transistor and the other of which serves as an output transistor. A V.sub.BE voltage generated by forcing a control current into or out of the emitter of the control transistor is imposed between the base and emitter of the output transistor to produce a controlled current in the collector of the output transistor. A first such current mirror, with an NPN control transistor, and a second such current mirror, with a PNP control transistor, are driven by the same control current to supply first and second input bias currents to a diamond follower circuit in the same integrated circuit as the first and second current mirror circuits to face the V.sub.BE voltage of the PNP and NPN transistors of the diamond follower circuit to be equal despite variation in saturation currents of the PNP and NPN transistsors. This results in zero input offset for the diamond follower circuit.
    Type: Grant
    Filed: October 11, 1988
    Date of Patent: January 9, 1990
    Assignee: Burr-Brown Corporation
    Inventors: William J. Lillis, Anthony D. Wang
  • Patent number: 4890106
    Abstract: A method and apparatus for converting a plurality of digital signals to an analog signal and m-bit digital-to-analog converter having an LSB current switch. A most significant m bits of an m bit digital signal are applied to m bits, respectively, of the m bit digital-to-analog converter, and successive values of the n bit digital signal are substituted at a first frequency. An interpolation signal is produced at the first frequency. A least significant n-m bits of the n bit digital signal are applied to the interpolation circuit to cause it to interpolate between successive values of the n bit digital signal. An LSB current switch distinct from the m bit digital-to-analog converter produces an output signal in response to the interpolation signal. An analog output signal produced by the m bit digital-to-analog converter is combined with the output signal produced by the LSB current switch to produce an analog output signal with n bit resolution.
    Type: Grant
    Filed: October 13, 1987
    Date of Patent: December 26, 1989
    Assignee: Burr-Brown Corporation
    Inventor: R. Allan Belcher
  • Patent number: 4887047
    Abstract: A current sense amplifier includes first and second current mirrors cross-coupled to collectors of first and second transistors having a common base connection to a bias voltage circuit. First and second load devices are connected to the collectors of the first and second transistors, the emitters of which are connected to control transistors of the second and first current mirrors, respectively. The control transistors also receive first and second input currents, respectively. The collectors of the first and second transistors are connected to output terminals of the current sense amplifier.
    Type: Grant
    Filed: September 30, 1988
    Date of Patent: December 12, 1989
    Assignee: Burr-Brown Corporation
    Inventor: Thomas A. Somerville
  • Patent number: 4847986
    Abstract: A square toroid transformer is assembled on a ceramic hybrid integrated circuit substrate. The primary and secondary windings of the transformer are provided on opposite arms of a square toroid ferrite core by providing first and second groups of spaced, parallel metal conductors on the surface of the ceramic substrate and adherent thereto, and an insulative layer over the first and second groups of conductors, leaving their respective end portions exposed. The square toroid ferrite core, coated with dielectric material, is attached to the insulative layer. Wire bonds in planes perpendicular to the longitudinal axes of the opposite arms each are wire bonded, respectively, to an inner end of one of the metal conductors and an outer end of an adjacent one.
    Type: Grant
    Filed: September 30, 1988
    Date of Patent: July 18, 1989
    Assignee: Burr Brown Corporation
    Inventor: Walter B. Meinel
  • Patent number: 4843339
    Abstract: An isolation amplifier includes a voltage-to-duty-cycle modulator, a non-galvanic isolation barrier, and a demodulator converting a duty-cycle-modulated signal transmitted across the isolation barrier to an analog voltage replica of the analog input voltage. The modulator circuit includes a first current switching means which produces a first current that is switched between positive and negative values in response to an output from a comparator that can be referenced to a noise-synchronized signal. The first current is summed with an input current and the difference is integrated and input to the comparator, the output of which produces the duty-cycle-modulated signal.
    Type: Grant
    Filed: October 28, 1987
    Date of Patent: June 27, 1989
    Assignee: Burr-Brown Corporation
    Inventors: Rodney T. Burt, Robert M. Stitt, II