Abstract: The present invention discloses a sample sorter system adapted to receive and sort samples according to predetermined criteria. The sample sorter system comprises a receptacle that is adapted to receive and retain fluid and samples. The receptacle is operatively coupled with a drive and with a power source such that actuation of the drive causes the rotation of at least one circular component, which in turn causes the development of a flow regime in the receptacle such that the samples suspended in the fluid are conveyable along a closed path to at least one sample handling site that are positioned along said closed path.

Abstract: The present invention refers, inter alia, to pixel circuits. The pixel circuit according to embodiments of the invention may include a photo-sensitive device having charge storage capability connected to a sense node. The pixel circuit may further include an inverting amplifier which is able to amplify a voltage from the sense node to a voltage on an output node of the amplifier, when being operated in open-loop configuration; and a reset switch being able to connect the input and output nodes of the inverting amplifier and thus to reset the inverting amplifier to an operating point providing high open loop gain by temporarily establishing negative feedback. Moreover, the pixel circuit may include a low-pass filter at the output node of the inverting amplifier for limiting the signal frequencies passing to the readout node to those frequencies that contain useful signal information. Additional and alternative embodiments are specified and claimed.

Abstract: A system is provided in which the spatial values (S1 to Sn) of the physical quantity are represented by measurement pulses (I1 to In), the temporal ordering of which represents the values, which are processed by processing units (U1 to Un) arranged in at least one row and each include an output (SOR1 to SORn). During successive processing cycles, a measurement pulse processed therein can be delivered to form the output signal (SU) of the system. Each processing unit includes an inhibiting unit (BI) for, in other units and during a given processing cycle, inhibiting the passage to the outputs of the other units respective measurement pulses processed therein and hence preventing them from forming the output signal, if the measurement impulses are temporally ordered later in the given processing cycle than the one processed in the unit concerned.

Abstract: The present invention concerns a mechanical oscillator, comprising an oscillating system comprising a balance (1) and its return spring (3). This oscillator also comprises two elastic strips (9, 10) fixed by one end and acting in opposition intermittently by their other end on a connecting organ (8) secured to the oscillating system.

Abstract: A selective differential low-noise amplifier includes a pair of transistors, each transistor of the pair being connected by its source to a current source and by its gate and/or its source to a differential voltage source, a coupling circuit between the gate of each transistor and the source of the other transistor of the pair, and, for each transistor of the pair, at least one series resonance and parallel resonance resonator connected in series between the source and/or the gate of the transistor and the differential voltage source.

Abstract: A method for producing a fuel cell including: providing two identical subassemblies each including a substrate and a current collector removably arranged thereon, depositing an ionic liquid or pasty polymerizable membrane on at least one of the subassemblies in such a way that the collector thereof is completely covered, applying the subassemblies one against the other so as to obtain an assembly having a solidified membrane with the two collectors incorporated, face to face, in this membrane, and detaching the two substrates from the collectors.

Abstract: Useful information taking the form of an analog or digital voltage is communicated between a transmitter and a receiver using UWB signals. The transmitter includes a subcarrier modulator, a high frequency oscillator and a transmission antenna and the receiver includes a reception antenna and an amplifier and a demodulator for discriminating the useful information in a signal received at the reception antenna. On transmission, the method generates a narrow frequency band high frequency carrier, modulates the high frequency carrier using a subcarrier with a modulation index at least equal to 10, and modulates the subcarrier using the useful information. On reception, the method demodulates the carrier to extract therefrom the subcarrier and demodulates the subcarrier to extract therefrom the useful information.

Abstract: A system for generating addresses for a digital signal processor in which the program instructions include a code for accessing a memory associated with said processor. An address calculation circuit calculates each access address to the memory on the basis of operation codes designated by the address generation code of one of the instructions and of the content of one address register selected from said address registers. Each address generation code defines an operation code to be sent to the calculation circuit. Each of the address registers is further associated with a configuration register designated at the same time as the address register by the address generation code, and each of the configuration registers contains a set of predefined operation codes, each adapted to command a predetermined calculation operation in the calculation circuit.

Abstract: The invention relates to a method of calculating the local contrast at each pixel (PC) in a network (Mp) of photosensitive pixels which are arranged in at least one dimension (x, y). The inventive method consists in, during successive image acquisition cycles, producing a signal which is representative of the local luminance at each pixel, said luminance-representative signals being integrated values of luminance values sensed by the respective pixels (pC, pG, pD, pH, pB). The inventive method consists in: sampling the integrated values of the signals representing the luminance values at the pixels adjacent (pG, pD, pH, pB) to a considered pixel (pC), said sampling taking place at an instant in the cycle when the integrated value of the luminance at the considered pixel (pC) is equal to a pre-determined reference value; and determining the local contrast at the considered pixel (pC) on the basis of values thus sampled.

Abstract: A timekeeper equipped with a radio reception device capable of decoding Radio Data System (RDS) information and including a time base, a display for displaying time data supplied by the time base, and an adjustment control for correcting the time data. The radio reception device includes a frequency locking loop for delivering RDS type data derived from a RDS spectrum received on a high-frequency carrier; and a controller which, on the basis of the delivered RDS type data, controls the adjustment control to ensure time setting of the timekeeper. The timekeeper is portable and the radio reception device rejects the spectrum received from a frequency modulated transmitter supplying RDS data, except for the frequency band containing RDS type data.

Abstract: An analog type fuzzy logic controller is adapted to permit the implementation of a set of rules. The controller includes a circuit (B,C) for determining the overall degree of truth of each rule and a circuit (D,E) for determining the values to be supplied at the output. The determination circuit of the overall degrees of truth of the various rules is composed of a network (C) of interconnected resistive elements. Each of the resistive elements is associated with a condition of a rule and is adapted to be commanded in such a way that its conductance is substantially proportional to the degree of truth of the associated condition. The current intensities circulating in the various branches (21,22,23) of the network are representative of the overall degrees of truth of the various rules.

Abstract: This fuzzy logic controller of the analog type enables the implementing of a set of fuzzy rules for which the output values are polynomial functions of the input variables. The controller functions by determining initially the weights of the different rules, then estimating a global value for each of the coefficients of the polynomials delivering the output values under the different rules. Finally the controller deliveres a global output value determined by evaluating the value of a polynomial for which the coefficients are the global values evaluated beforehand.

Abstract: The invention concerns a processing circuit (2, 120) for producing a variable output signal in response to a variable quantity picked up or received as input. The processing circuit is associated with a stage or has an input sensor (4, 100) furnishing a signal with a variable amplification/attenuation factor, and further exhibits response characteristics which depend in particular from state variables. The processing circuit includes a suppression circuit (FIG. 5, FIG. 6) for suppressing transients normally produced by modification of the amplification/attenuation factor, this suppression circuit functioning by modifying the value of the state variables in direct proportion to the modification of the amplification/attenuation factor.

Abstract: The invention concerns a power diverting circuit for creating a supply voltage for a signal processing circuit from a source of data signals each having a high or a low potential respectively corresponding to a first or a second logic state. The circuit comprises a first terminal for receiving the data signals, a second terminal for providing the supply voltage, a switch coupled between the first terminal and the second terminal for selectively connecting and disconnecting the first terminal and the second terminal, and an inverter for inverting the state of the data signals. The inverter, which has an input terminal connected to the first terminal and an output terminal for providing the inverted data signals to the signal processing circuit, is responsive to the state of the data signals received at the first terminal to control the operation of said switch means.