Abstract: Provided is a touch panel including a driving line extending in a first direction and first and second sensing lines extending in a second direction intersecting the first direction. A first end of the first sensing line and a first end of the second sensing line are connected with each other. One of the second ends of the first and second driving lines is connected to a driving unit configured to provide driving signals.

Abstract: A data driver includes a random delay unit configured to receive and delay a first control signal and to generate a random delay signal based on the delay, a latch unit configured to store data in response to the random delay signal, a digital-analog conversion unit configured to convert the data from the latch unit into an analog signal, and an output unit configured to amplify and output the analog signal, wherein the time delay between the first control signal and the random delay signal is random.

Abstract: A touch screen, a touch panel, and a driving method thereof are provided. The touch panel recognizes a user's touch, and includes a plurality of driving lines arranged in a first direction. A plurality of sensing lines are arranged in a direction crossing the first direction. Pixels are at locations where the driving lines and the sensing lines cross each other. Some of the pixels include mutual capacitance type pixels that recognize the user's touch by mutual capacitance, and at least part of the remainder of the pixels include self-capacitance type pixels that recognize the user's touch by self-capacitance.

Abstract: A method for manufacturing a semiconductor device includes forming a lower electrode pattern on a substrate, forming a first insulating layer on the lower electrode pattern, forming an upper electrode pattern on the first insulating layer, forming an etch blocking spacer at a side of the upper electrode pattern, forming a second insulating layer on the upper electrode pattern, etching the second insulating layer to form a cavity which exposes the etch blocking spacer, and forming a contact ball in the cavity.

Abstract: Method for manufacturing a semiconductor device includes the steps of forming a lower electrode pattern on a substrate, forming a first interlayer insulating layer on the lower electrode pattern, forming an upper electrode pattern on the first interlayer insulating layer, forming a second interlayer insulating layer on the upper electrode pattern, forming an etch blocking layer on a side of the upper electrode pattern, wherein the etch blocking layer passes through the first interlayer insulating layer, forming a cavity which exposes the side of the etch blocking layer by etching the second interlayer insulating layer, and forming a contact ball in the cavity.

Abstract: An image sensor includes a pixel array including a plurality of unit pixels, each having a photodiode, a transfer transistor, a reset transistor, a drive transistor, and a select transistor, an analog to digital converter for sampling an analogous sensing signal from the pixel array and converting the analogous sensing signal into a digital sensing signal, and a timing controller for forwarding a transfer signal which turns on the transfer transistor until after sampling the sensing signal.

Abstract: A complementary metal-oxide-semiconductor (CMOS) image sensor includes a substrate including a photodiode, a transistor on the substrate; a first insulating layer on the substrate; a contact connected to the transistor and passing through the first insulating layer; an etch stop layer on the first insulating layer; a second insulating layer on the etch stop layer; and a signal line extending through the etch stop layer and the second insulating layer, on the first insulating layer and connected to the contact.

Abstract: An image sensor includes a pixel unit configured to output a bayer pattern by converting an optical signal of a subject into an electrical signal; and a vertical interpolation unit configured to generate a vertical binning image by adding or averaging values of vertical pixels of the bayer pattern based on weight information set for each row region of the bayer pattern. Further, the image sensor includes a horizontal interpolation unit configured to generate a horizontal binning image by adding or averaging values of horizontal pixels of the bayer pattern based on weight information set for each column region of the bayer pattern; and an image composition unit configured to generate a weight-based binning image by composing the vertical and horizontal binning images.

Abstract: A touch panel is disclosed. The touch panel includes driving lines and sensing lines. A node capacitor is formed between a driving line and an adjacent sensing line. The touch panel also includes a driver configured to demodulate a driving signal using a direct sequence spread spectrum method and supply the demodulated driving signal to each of the driving lines, and a sensor electrically connected to the sensing lines, configured to detect a variation in a capacitance of the node capacitors. The sensor demodulates a signal from the sensing line using the direct sequence spread spectrum method.

Abstract: A bipolar junction transistor includes a first trench element isolation film, a second trench element isolation film, a first base region, a second base region, a collector region, a first well, a second well, an emitter, a collector, and bases. The second well is formed by implanting an n-type impurity into the semiconductor substrate, and the emitter is formed by implanting the n-type impurity into the emitter region between the first trench element isolation film and the second well. The collector is formed by implanting the n-type impurity into the collector region between the first well and the second trench element isolation film, and the bases are formed by implanting the p-type impurity into the first base region and into the second base region between the emitter region and the second well.

Abstract: An image sensor is provided. An image sensor can include a plurality of unit pixels. Each of the unit pixels can include a photoelectric converter as a light receiving element. In each unit pixel, a transport switching unit can transport charges in the photoelectric converter to a floating diffusion region, and a first switching unit can selectively connect the floating diffusion region to a first sensing line. A second switching unit can selectively connect the floating diffusion region to a second sensing line, and a first sensing part can be connected to the first sensing line, and a second sensing part can be connected to the second sensing line.

Abstract: A signal processing circuit of a touch screen is provided. The signal processing circuit can include driving and sensing lines arranged to interact with one another in a touch screen panel, power sources supplying power to each of the driving lines, and sensing channels detecting touch by sensing a mutual capacitance on a node where the sensing line interacts with the driving line. The circuit can also include driving line switches selectively connecting the power sources to the driving lines, channel switches selectively connecting the sensing channels to the sensing lines, and a bypass line allowing the driving line to be connected to the sensing line by operation of the channel switches.

Abstract: A driving circuit of an image sensor is provided. The driving circuit can include a pixel array where pixel circuits receiving light and converting the received light into an electrical signal are arranged in columns, an analog-to-digital (ADC) block including a plurality of ADC circuits receiving an analog image signal from pixel circuits arranged in the same column and converting the received analog image signal into a digital signal, and an ADC controller outputting a global signal to control each operation of the ADC circuit. The ADC controller can allow the ADC circuits in the ADC block to operate separately according to at least two timings.

Abstract: An illuminance and proximity sensor includes a first sensing unit that senses infrared light and green light, and forwards a first sensing signal corresponding to a result of the sensing, a second sensing unit that filters visible light, senses the infrared light, and forwards a second sensing signal corresponding to a result of the sensing, and a control unit that produces an illuminance using a first difference value from subtracting the second sensing signal from the first sensing signal, and a proximity using a second difference value from subtracting the first difference value from the second sensing signal.

Abstract: An apparatus configured to control a pulse frequency modulation in a single-inductor dual-output power circuit. The apparatus fixes a pulse width of one of a maximum on-time pulse signal (which is used to define a maximum on-time during which a current flowing through the inductor is generated) and a minimum off-time pulse signal (which is used to define a minimum off-time during which either the boost voltage converter or the buck-boost voltage converter produces a positive voltage or a negative voltage). The apparatus adjusts a pulse width of the other pulse signal.

Abstract: An LDMOS device includes a second conduction type buried layer, a first conduction type drain extension region configured to be formed on and/or over a region of the second conduction type buried layer, a second conduction type drain extension region configured to be formed in a partial region of the first conduction type drain extension region, a first conduction type body, a first guard ring configured to be formed around the second conduction type drain extension region and configured to include a second conduction type impurity layer, and a second guard ring configured to be formed around the first guard ring and configured to include a high-voltage second conduction type well and a second conduction type impurity layer. Further, the second conduction type impurity layer of the first guard ring and the second conduction type impurity layer of the second guard ring operate as an isolation.

Abstract: A level shifter including a differential input stage including first and second transistors having respective first terminals, respective control terminals configured to receive a differential input signal, and respective second terminals connected in common to a first voltage; a breakdown voltage controller including third and fourth transistors having respective first terminals, respective second terminals connected to respective first terminals of the first and second transistors, and respective control terminals configured to receive a bias signal, and a load stage comprising fifth and sixth transistors having respective first terminals connected to respective first terminals of the third and fourth transistors, respective control terminals that are cross coupled, and respective second terminals connected to a second voltage is disclosed. A bias voltage applied to bulks or bodies of the first through the fourth transistors equals or substantially equals the first voltage.

Abstract: A stepped ramp signal generator includes a ramp signal generation unit configured to provide final values of previous stepped ramp signals as initial values of the next stepped ramp signals. The ramp signal generation unit includes a plurality of matching resistors, and a plurality of holders installed between the matching resistors, each holder storing a final value across a previous matching resistor and providing the final value to a next matching resistor.

Abstract: A touch panel includes a transparent substrate, a first pattern/layer on the transparent substrate, and an second pattern/layer on or under the first pattern/layer. The first pattern/layer includes first electrodes detecting a first coordinate value and first metal interconnections connecting the first electrodes to a flexible printed circuit board (FPCB). The second pattern/layer includes second electrodes detecting a second coordinate value and second metal interconnections connecting the second electrodes to the FPCB. The first and second metal interconnections extend on side and back surfaces of the transparent electrode. Therefore, the metal interconnections connect the first and second patterns/layers to the FPCB by being formed on the side and back surfaces of the transparent substrate, which reduces the length and/or width of the bezel (a non-active region).

Abstract: A level shifter including a differential input stage including first and second transistors having respective first terminals, respective control terminals configured to receive a differential input signal, and respective second terminals connected in common to a first voltage; a breakdown voltage controller including third and fourth transistors having respective first terminals, respective second terminals connected to respective first terminals of the first and second transistors, and respective control terminals configured to receive a bias signal, and a load stage comprising fifth and sixth transistors having respective first terminals connected to respective first terminals of the third and fourth transistors, respective control terminals that are cross coupled, and respective second terminals connected to a second voltage is disclosed. A bias voltage applied to bulks or bodies of the first through the fourth transistors equals or substantially equals the first voltage.