Patents Assigned to Eudyna Devices Inc.
  • Patent number: 7521707
    Abstract: A semiconductor device includes, an AlGaN electron supply layer having a [000-1] crystalline orientation in a thickness direction to a substrate plane, a GaN electron traveling layer formed on the AlGaN electron supply layer, a gate electrode formed above the GaN electron traveling layer, and a source electrode and a drain electrode between which the gate electrode is located, the source and drain electrode being formed on the GaN electron traveling layer.
    Type: Grant
    Filed: March 22, 2006
    Date of Patent: April 21, 2009
    Assignee: Eudyna Devices Inc.
    Inventors: Takeshi Kawasaki, Ken Nakata, Hiroshi Yano
  • Publication number: 20090098676
    Abstract: A method of manufacturing a light emitting diode includes forming an active layer of a nitride semiconductor on a first conductive type of a nitride semiconductor layer, thermally treating the active layer at a first temperature, and forming a second conductive type of a nitride semiconductor layer on the active layer at a second temperature lower than the first temperature.
    Type: Application
    Filed: October 10, 2008
    Publication date: April 16, 2009
    Applicant: EUDYNA DEVICES INC.
    Inventors: Reiko SOEJIMA, Keiichi YUI, Kazuhiko HORINO
  • Patent number: 7515946
    Abstract: A semiconductor device includes a decoder decoding input signals and generating a control signal from decoded input signals, and a power control circuit detecting a given combination of the input signals applied to the decoder and controlling a supply of power to the decoder.
    Type: Grant
    Filed: August 10, 2005
    Date of Patent: April 7, 2009
    Assignee: Eudyna Devices Inc.
    Inventor: Naoyuki Miyazawa
  • Patent number: 7515779
    Abstract: An optical semiconductor device has a heater, an optical waveguide layer, a first electrode and a second electrode. The heater is provided on a first semiconductor region and has more than one heater segment coupled or separated to each other. The optical waveguide layer is provided in the first semiconductor region and receives heat from the heater. The first electrode is coupled to a connecting point of the heater segments adjacent to each other. The second electrodes are electrically common and are coupled to other ends of the heater segments in opposite side of the connecting point respectively.
    Type: Grant
    Filed: March 29, 2007
    Date of Patent: April 7, 2009
    Assignee: Eudyna Devices Inc.
    Inventor: Tsutomu Ishikawa
  • Publication number: 20090026498
    Abstract: A field effect transistor includes: a nitride semiconductor layer having a channel layer; a gate electrode including a Schottky electrode that contacts the nitride semiconductor layer and includes a gallium doped zinc oxide (GZO) layer annealed in an inactive gas atmosphere; and ohmic electrodes connecting with the channel layer.
    Type: Application
    Filed: July 25, 2008
    Publication date: January 29, 2009
    Applicant: EUDYNA DEVICES INC.
    Inventor: Keita MATSUDA
  • Publication number: 20090028200
    Abstract: A laser diode drive circuit includes: a duty control amplifier (23) that controls the duty ratio of a main signal for laser control in accordance with a duty control signal; and an AND gate (22) that outputs the duty control signal to the duty control amplifier (23), and outputs a duty control signal that controls the duty ratio of the main signal to be 0% in the duty control amplifier in accordance with a shutdown signal of a laser diode. With this structure, there is no need to input the main signal having the duty ratio controlled to a logic circuit that becomes unstable. Thus, outputs from a semiconductor laser can be shut down, and the output duty can be controlled in a stable manner.
    Type: Application
    Filed: September 30, 2008
    Publication date: January 29, 2009
    Applicant: EUDYNA DEVICES INC.
    Inventor: Hidetoshi NAITO
  • Publication number: 20090028203
    Abstract: A method for manufacturing a semiconductor device having a compound semiconductor layer that is provided on a substrate and includes a cladding layer of a first conductivity type, an activation layer, a cladding layer of a second conductivity type that is the opposite of the first conductivity type, includes the steps of: forming a diffusion source layer on the compound semiconductor layer; forming a first diffusion region in the compound semiconductor layer by carrying out a first heat treatment, so that the first diffusion region includes a light emitting facet for emitting light from the activation layer; removing the diffusion source layer; forming a first SiN film having a refractive index of 1.9 or higher on the compound semiconductor layer; and turning the first diffusion region into the second diffusion region by carrying out a second heat treatment.
    Type: Application
    Filed: July 28, 2008
    Publication date: January 29, 2009
    Applicant: EUDYNA DEVICES INC.
    Inventors: Takeshi SAKASHITA, Masanori SAITO
  • Publication number: 20090022185
    Abstract: A method of controlling a semiconductor laser having a wavelength selection portion, a refractive index of the wavelength selection portion being controllable with a heater including: a starting sequence including a first step for adjusting a heat value of the heater until the heat value of the heater reaches a given value; and a wavelength control sequence including a second step for correcting a wavelength of the semiconductor laser according to a detection result of an oscillation wavelength of the semiconductor laser after the starting sequence.
    Type: Application
    Filed: July 18, 2008
    Publication date: January 22, 2009
    Applicant: EUDYNA DEVICES INC.
    Inventors: Toyotoshi MACHIDA, Tsutomu ISHIKAWA, Hirokazu TANAKA
  • Publication number: 20090022186
    Abstract: A method of controlling a semiconductor laser that has a plurality of wavelength selection portions having a different wavelength property from each other and is mounted on a temperature control device, including: a first step of correcting a temperature of the temperature control device according to a detected output wavelength of the semiconductor laser; and a second step of controlling at least one of the wavelength selection portions so that changing amount differentials between each wavelength property of the plurality of the wavelength selection portions is reduced, the changing amount differential being caused by correcting the temperature of the temperature control device.
    Type: Application
    Filed: July 18, 2008
    Publication date: January 22, 2009
    Applicant: EUDYNA DEVICES INC.
    Inventors: Hirokazu TANAKA, Tsutomu ISHIKAWA, Toyotoshi MACHIDA
  • Publication number: 20090021238
    Abstract: An optical device includes an optical element, a detector and a controller. The optical element has an optical waveguide. Refractive index of the optical waveguide is controlled by a heater. A temperature of the optical element is controlled by a temperature control device. The detector detects a current flowing in the heater and/or a voltage applied to the heater. The controller controls an electrical power provided to the heater so as to be kept constant according to the detection result of the detector.
    Type: Application
    Filed: July 17, 2008
    Publication date: January 22, 2009
    Applicant: EUDYNA DEVICES INC.
    Inventors: Tsutomu ISHIKAWA, Toyotoshi MACHIDA, Hirokazu TANAKA
  • Publication number: 20090009246
    Abstract: An electronic circuit includes a differential amplifier circuit, a first smoothing circuit, a second smoothing circuit and a first switch. The differential amplifier circuit receives a digital input signal and a reference signal. The first smoothing circuit smoothes the digital input signal with a first capacitance value. The second smoothing circuit smoothes the digital input signal with a second capacitance value larger than the first capacitance value. The first switch selects one of output signals from the first smoothing circuit and the second smoothing circuit as the reference signal.
    Type: Application
    Filed: July 3, 2008
    Publication date: January 8, 2009
    Applicant: EUDYNA DEVICES INC.
    Inventors: Hiroshi HARA, Sosaku SAWADA
  • Patent number: 7474684
    Abstract: An optical semiconductor device includes an optical semiconductor element, a metal pattern and at least one thermal conductive material. The optical semiconductor element has a first optical waveguide region and a second optical waveguide region. The second optical waveguide region is optically coupled to the first optical waveguide region and has a heater for changing a refractive index of the second optical waveguide region. The metal pattern is provided on an area to be thermally coupled to a temperature control device. The thermal conductive material couples the metal pattern with an upper face of the first optical waveguide region of the optical semiconductor element. The thermal conductive material is electrically separated from the first optical waveguide region.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: January 6, 2009
    Assignee: Eudyna Devices Inc.
    Inventors: Tsutomu Ishikawa, Takuya Fujii
  • Publication number: 20080315078
    Abstract: A wavelength measuring device includes: light receiving elements that receive light to be measured; a temperature controller that maintains the light receiving elements at different temperatures from one another; and a calculation unit that determines the wavelength of the light to be measured, based on outputs of the light receiving elements.
    Type: Application
    Filed: July 3, 2008
    Publication date: December 25, 2008
    Applicant: EUDYNA DEVICES INC.
    Inventor: Haruyoshi Ono
  • Patent number: 7468698
    Abstract: A patch antenna is disclosed that includes a dielectric substrate, a substantially rectangular radiation element formed of a conductive material on the dielectric substrate; and a feeder line connected to a feeding point for feeding to the radiation element. The feeding point has an impedance matching the impedance of the feeder line.
    Type: Grant
    Filed: November 1, 2005
    Date of Patent: December 23, 2008
    Assignees: Shinko Electric Industries Co., Ltd., Eudyna Devices Inc.
    Inventors: Tomoharu Fujii, Yasutake Hirachi, Hiroshi Nakano
  • Publication number: 20080292250
    Abstract: An optical communication module includes a receptacle, a chassis and a pressing jig. The receptacle has a photonic device therein and a projection portion. The chassis houses the receptacle. The pressing jig has an engage portion. The engage portion is latched with the chassis with the pressing jig pressing the projection portion of the receptacle to the chassis.
    Type: Application
    Filed: May 22, 2008
    Publication date: November 27, 2008
    Applicant: EUDYNA DEVICES INC.
    Inventor: Masato Hino
  • Publication number: 20080283822
    Abstract: A semiconductor light emitting device includes a substrate and a quantum well active layer. The quantum well active layer has a plurality of barrier layers made of GaN-based semiconductor and a well layer made of GaN-based semiconductor sandwiched between the barrier layers and has polarized charge between the barrier layer and the well layer caused by piezo polarization. The well layer has a composition modulation so that a band gap is minimum at an interface between the well layer and one of the barrier layers more far from the substrate than the other.
    Type: Application
    Filed: May 16, 2008
    Publication date: November 20, 2008
    Applicant: EUDYNA DEVICES INC.
    Inventor: Keiichi YUI
  • Publication number: 20080247707
    Abstract: An optical semiconductor device includes a waveguide and a refractive index control portion. The waveguide has one or more first segments, one or more second segments and a plurality of third segments. The first segment has a region that includes a diffractive grating and another region that is a space region combined to the region. The second segment has a region that includes a diffractive grating and another region that is a space region combined to the region. A length of the second segment is different from that of the first segment. The third segment has a region that includes a diffractive grating and another region that is a space region combined to the region. A length of the third segment is shown as L3=L1+(L2?L1)×K1 in which 0.3?K1?0.7, L1 is a length of the first segment, L2 is a length of the second segment and L3 is a length of the third segment. The refractive index control portion controls refractive index of the first segment through the third segments.
    Type: Application
    Filed: April 4, 2008
    Publication date: October 9, 2008
    Applicant: EUDYNA DEVICES INC.
    Inventor: Takuya FUJII
  • Publication number: 20080240191
    Abstract: In a p-type clad layer, not only a p-type dopant Zn but also Fe is doped. Its Zn concentration is 1.5×1018 cm?3 and the Fe concentration is 1.8×1017 cm?3. In a semi-insulating burying layer, Fe is doped as an impurity generating a deep acceptor level and the concentration thereof is 6.0×1016 cm?3. The Fe concentration in the p-type clad layer is thus three times higher than the Fe concentration in the burying layer.
    Type: Application
    Filed: March 21, 2008
    Publication date: October 2, 2008
    Applicants: FUJITSU LIMITED, EUDYNA DEVICES INC.
    Inventors: Kan TAKADA, Mitsuru EKAWA, Tsuyoshi YAMAMOTO, Tatsuya TAKEUCHI
  • Publication number: 20080237452
    Abstract: An optical semiconductor module that includes: a light emitting element; a light receiving element that has a light receiving face on an upper face and a side face thereof, with the light receiving face having an antireflection film formed thereon; and a mounting unit that has the light emitting element and the light receiving element mounted thereon with such a positional relationship that the light emitted from the light emitting element is optically connected at least on the light receiving face of the side face of the light receiving element.
    Type: Application
    Filed: March 31, 2008
    Publication date: October 2, 2008
    Applicant: EUDYNA DEVICES INC.
    Inventors: Yoshihiro Yoneda, Ryuji Yamabi
  • Publication number: 20080239601
    Abstract: A semiconductor device includes a pad; an internal circuit; a protection FET that has a drain connected to the pad, and a source connected to a reference potential; a first resistive element that is connected between the drain of the protection FET and the internal circuit, and has a larger resistance value than the value of the series resistance between the drain of the protection FET and the pad; a capacitive element that is connected between the pad and the gate of the protection FET; and a second resistive element that is connected between the gate of the protection FET and the source of the protection FET.
    Type: Application
    Filed: March 31, 2008
    Publication date: October 2, 2008
    Applicant: EUDYNA DEVICES INC.
    Inventors: Naoyuki Miyazawa, Makoto Kondo