Abstract: Spin-Hall (SH) material is provided near free regions of magnetoresistive devices that include magnetic tunnel junctions. Current flowing through such SH material injects spin current into the free regions such that spin torque is applied to the free regions. The spin torque generated from SH material can be used to switch the free region or to act as an assist to spin-transfer torque generated by current flowing vertically through the magnetic tunnel junction, in order to improve the reliability, endurance, or both of the magnetoresistive device. Further, one or more additional regions or manufacturing steps may improve the switching efficiency and the thermal stability of magnetoresistive devices.
Abstract: A semiconductor process integrates three bridge circuits, each include magnetoresistive sensors coupled as a Wheatstone bridge on a single chip to sense a magnetic field in three orthogonal directions. The process includes various deposition and etch steps forming the magnetoresistive sensors and a plurality of flux guides on one of the three bridge circuits for transferring a āZā axis magnetic field onto sensors orientated in the XY plane.
Type:
Application
Filed:
April 30, 2021
Publication date:
August 26, 2021
Applicant:
EVERSPIN TECHNOLOGIES, INC.
Inventors:
Renu WHIG, Phillip MATHER, Kenneth SMITH, Sanjeev AGGARWAL, Jon SLAUGHTER, Nicholas RIZZO
Abstract: A magnetoresistive device may include one or more electrodes or electrically conductive lines and a fixed region and a free region disposed between the electrodes or electrically conductive lines. The fixed region may have a fixed magnetic state and the free region may be configured to have a first magnetic state and a second magnetic state. The free region may store a first value when in the first magnetic state and store a second value when in the second magnetic state. The magnetoresistive device may further include a dielectric layer between the free region and the fixed region and a spin-Hall (SH) material proximate to at least a portion of the free region. An insertion layer may be disposed between the SH material and the free region.
Type:
Application
Filed:
February 6, 2020
Publication date:
August 12, 2021
Applicant:
Everspin Technologies, Inc.
Inventors:
Sumio IKEGAWA, Hamid ALMASI, SHIMON, Kerry NAGEL, Han Kyu LEE
Abstract: Structures and methods are disclosed for shielding magnetically sensitive components. One structure includes a substrate, a bottom shield deposited on the substrate, a magnetoresistive semiconductor device having a first surface and a second surface opposing the first surface, the first surface of the magnetoresistive semiconductor device deposited on the bottom shield, a top shield deposited on the second surface of the magnetoresistive semiconductor device, the top shield having a window for accessing the magnetoresistive semiconductor device, and a plurality of interconnects that connect the magnetoresistive semiconductor device to a plurality of conductive elements.
Abstract: Spin-orbit-torque (SOT) lines are provided near free regions in magnetoresistive devices that include magnetic tunnel junctions. Current flowing through such SOT lines injects spin current into the free regions such that spin torque is applied to the free regions. The spin torque generated from a SOT switching line can be used to switching the free region or to act as an assist to spin-transfer torque generated by current flowing vertically through the magnetic tunnel junction, in order to improve the reliability, endurance, or both of the magnetoresistive device. Further, one or more additional layers or regions may improve the SOT switching efficiency and the thermal stability of magnetoresistive devices including SOT lines.
Abstract: The magnetoresistive stack or structure of a magnetoresistive device includes one or more electrodes or electrically conductive lines, a magnetically fixed region, a magnetically free region disposed between the electrodes or electrically conductive lines, and a dielectric layer disposed between the free and fixed regions. The magnetoresistive device may further include a spin-Hall (SH) material proximate to at least a portion of the free region, and one or more insertion layers comprising antiferromagnetic material.
Abstract: A chopping technique, and associated structure, is implemented to cancel the magnetic 1/f noise contribution in a Tunneling Magnetoresistance (TMR) field sensor. The TMR field sensor includes a first bridge circuit including multiple TMR elements to sense a magnetic field and a second circuit to apply a bipolar current pulse adjacent to each TMR element. The current lines are serially or sequentially connected to a current source to receive the bipolar current pulse. The field sensor has an output including a high output and a low output in response to the bipolar pulse. This asymmetric response allows a chopping technique for 1/f noise reduction in the field sensor.
Abstract: A magnetoresistive device may include an intermediate region positioned between a magnetically fixed region and a magnetically free region, and spin Hall channel region extending around a sidewall of at least the magnetically free region. An insulator region may extend around a portion of the sidewall such that the insulator region contacts a first portion of the sidewall and the spin Hall channel region contacts a second portion of the sidewall.
Abstract: A method of manufacturing one or more interconnects to magnetoresistive structure comprising (i) depositing a first conductive material in a via; (2) etching the first conductive material wherein, after etching the first conductive material a portion of the first conductive material remains in the via, (3) partially filling the via by depositing a second conductive material in the via and directly on the first conductive material in the via; (4) depositing a first electrode material in the via and directly on the second conductive material in the via; (5) polishing a first surface of the first electrode material wherein, after polishing, the first electrode material is (i) on the second conductive material in the via and (ii) over the portion of the first conductive material remaining in the via; and (6) forming a magnetoresistive structure over the first electrode material.
Type:
Grant
Filed:
November 19, 2018
Date of Patent:
June 8, 2021
Assignee:
Everspin Technologies, Inc.
Inventors:
Kerry Joseph Nagel, Kenneth H. Smith, Moazzem Hossain, Sanjeev Aggarwal
Abstract: A semiconductor process integrates three bridge circuits, each include magnetoresistive sensors coupled as a Wheatstone bridge on a single chip to sense a magnetic field in three orthogonal directions. The process includes various deposition and etch steps forming the magnetoresistive sensors and a plurality of flux guides on one of the three bridge circuits for transferring a āZā axis magnetic field onto sensors orientated in the XY plane.
Type:
Grant
Filed:
March 21, 2019
Date of Patent:
June 1, 2021
Assignee:
Everspin Technologies, Inc.
Inventors:
Renu Whig, Phillip Mather, Kenneth Smith, Sanjeev Aggarwal, Jon Slaughter, Nicholas Rizzo
Abstract: Spin-orbit-torque (SOT) segments are provided along the sides of free layers in magnetoresistive devices that include magnetic tunnel junctions. Current flowing through such SOT segments injects spin current into the free layers such that spin torque is applied to the free layers. The spin torque can be used as an assist to spin-transfer torque generated by current flowing vertically through the magnetic tunnel junction in order to improve the efficiency of the switching current applied to the magnetoresistive device.
Abstract: A magnetoresistive device may include a first ferromagnetic region, a second ferromagnetic region, and an intermediate region positioned between the first ferromagnetic region and the second ferromagnetic region. The intermediate region may be formed of a dielectric material and comprise at least two different metal oxides.
Abstract: A magnetoresistive device may include a first plurality of magnetic tunnel junction (MTJ) bits arranged in a first XY plane, and a second plurality of MTJ bits arranged in a second XY plane that is spaced apart from the first XY plane in a Z direction. And, the MTJ bits of the first plurality of MTJ bits may be spaced apart from the MTJ bits of the second plurality of MTJ bits in the X and Y directions.
Abstract: A magnetoresistive magnetic tunnel junction (MTJ) stack includes a free magnetic region, a fixed magnetic region, and a dielectric layer positioned between the free magnetic region and the fixed magnetic region. In one aspect, the fixed magnetic region consists essentially of an unpinned, fixed synthetic anti-ferromagnetic (SAF) structure which comprises (i) a first layer of one or more ferromagnetic materials, including cobalt, (ii) a multi-layer region including a plurality of layers of ferromagnetic materials, wherein the plurality of layers of ferromagnetic materials include a layer of one or more ferromagnetic materials including cobalt, and (iii) an anti-ferromagnetic coupling layer disposed between the first layer and the multi-layer region. The free magnetic region may include a circular shape, the one or more ferromagnetic materials of the first layer may include cobalt, iron and boron, and the dielectric layer may be disposed on the first layer.
Type:
Application
Filed:
December 14, 2020
Publication date:
May 6, 2021
Applicant:
Everspin Technologies, Inc.
Inventors:
Srinivas V. PIETAMBARAM, Bengt J. AKERMAN, Renu WHIG, Jason A. JANESKY, Nicholas D. RIZZO, Jon M. SLAUGHTER
Abstract: A method of fabricating a magnetoresistive bit from a magnetoresistive stack includes (a) etching through at least a portion of a thickness of the surface region to create a first set of exposed areas in the form of multiple strips extending in a first direction, and (b) etching through at least a portion of a thickness of the surface region to create a second set of exposed areas in the form of multiple strips extending in a second direction. The first set of exposed areas and the second set of exposed areas may have multiple areas that overlap. The method may also include, (c) after the etching in (a) and (b), etching through at least a portion of the thickness of the magnetoresistive stack through the first set and second set of exposed areas.
Type:
Application
Filed:
December 2, 2020
Publication date:
April 22, 2021
Applicant:
Everspin Technologies, Inc.
Inventors:
Kerry Joseph NAGEL, Sanjeev AGGARWAL, Sarin A. DESHPANDE
Abstract: Magnetoresistive device architectures and methods for manufacturing are presented that facilitate integration of process steps associated with forming such devices into standard process flows used for surrounding logic/circuitry. In some embodiments, the magnetoresistive device structures are designed such that the devices are able to fit within the vertical dimensions of the integrated circuit associated with a single metal layer and a single layer of interlayer dielectric material. Integrating the processing for the magnetoresistive devices can include using the same standard interlayer dielectric material as used in the surrounding circuits on the integrated circuit as well as using standard vias to interconnect to at least one of the electrodes of the magnetoresistive devices.
Type:
Application
Filed:
December 28, 2020
Publication date:
April 22, 2021
Applicant:
Everspin Technologies, Inc.
Inventors:
Kerry Joseph NAGEL, Sanjeev AGGARWAL, Thomas ANDRE, Sarin A. DESHPANDE
Abstract: A magnetoresistive stack/structure and method of manufacturing same comprising wherein the stack/structure includes a seed region, a fixed magnetic region disposed on and in contact with the seed region, a dielectric layer(s) disposed on the fixed magnetic region and a free magnetic region disposed on the dielectric layer(s). In one embodiment, the seed region comprises an alloy including nickel and chromium having (i) a thickness greater than or equal to 40 Angstroms (+/?10%) and less than or equal to 60 Angstroms (+/?10%), and (ii) a material composition or content of chromium within a range of 25-60 atomic percent (+/?10%) or 30-50 atomic percent (+/?10%).
Type:
Application
Filed:
December 23, 2020
Publication date:
April 15, 2021
Applicant:
Everspin Technologies, Inc.
Inventors:
Jijun SUN, Sanjeev AGGARWAL, Han-Jong CHIA, Jon M. SLAUGHTER, Renu WHIG
Abstract: A magnetoresistive device may include multiple magnetic tunnel junction (MTJ) stacks separated from each other by one or more dielectric material layers and electrically conductive vias extending through the one more dielectric material layers. Each MTJ stack may include multiple MTJ bits arranged one on top of another and the electrically conductive vias may be configured to electrically access each MTJ bit of the multiple MTJ stacks.
Type:
Grant
Filed:
January 11, 2019
Date of Patent:
April 6, 2021
Assignee:
Everspin Technologies, Inc.
Inventors:
Sanjeev Aggarwal, Kevin Conley, Sarin A. Deshpande
Abstract: An integrated circuit (IC) device includes a logic portion including logic circuits in multiple vertically stacked metal layers interconnected by one or more via layers, and a memory portion with a plurality of magnetoresistive devices. Each magnetoresistive device is provided in a single metal layer of the multiple vertically stacked metal layers of the IC device.
Abstract: An integrated circuit device includes a memory portion and a logic portion. The memory portion may include a plurality of magnetoresistive devices and the logic portion may include logic circuits. The memory portion may include a plurality of metal conductors separated by a first interlayer dielectric material (ILD), wherein the first ILD is a low-k ILD or an ultra low-k ILD. And, the logic portion may include a plurality of metal conductors separated by a second interlayer dielectric material (ILD).
Type:
Grant
Filed:
November 8, 2018
Date of Patent:
March 16, 2021
Assignee:
Everspin Technologies. Inc.
Inventors:
Kerry Joseph Nagel, Sanjeev Aggarwal, Sarin A. Deshpande