Patents Assigned to Finisar Corporation
  • Patent number: 10302866
    Abstract: Various embodiments relate to polarization splitters. A polarization splitter may include a silicon nitride (SiN) waveguide core configured to receive an input light signal having a first polarization mode and a second polarization mode. The polarization splitter may further include a silicon (Si) slot waveguide core disposed proximate the SiN waveguide core. The Si slot waveguide core may include a tapered portion at a first end configured to couple the first polarization mode to the Si slot waveguide.
    Type: Grant
    Filed: April 25, 2018
    Date of Patent: May 28, 2019
    Assignee: Finisar Corporation
    Inventors: Shiyun Lin, Bryan Park
  • Patent number: 10302883
    Abstract: An optical coupling assembly includes optical fibers and a fiber coupling structure assembly that includes an active optical component (AOC) array. The AOC array includes wafer material, AOCs, and soldering pads. The fiber coupling structure assembly includes a rigid substrate that defines apertures and includes an array connection surface on which additional soldering pads are formed. The rigid substrate is fixed to the AOC array by bump joints that connect the soldering pads of the AOC array with the additional soldering pads formed on the array connection surface such that each of the apertures is aligned with a corresponding one of the AOCs. The optical fibers may be positioned relative to the one or more apertures such that an optical signal may be communicated between a corresponding one of the optical fibers and a corresponding one of the AOCs via a corresponding one of the one or more apertures.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: May 28, 2019
    Assignee: FINISAR CORPORATION
    Inventor: Jiashu Chen
  • Patent number: 10305254
    Abstract: A VCSEL can include: an elliptical oxide aperture in an oxidized region that is located between an active region and an emission surface, the elliptical aperture having a short radius and a long radius with a radius ratio (short radius)/(long radius) being between 0.6 and 0.8, the VCSEL having a relative intensity noise (RIN) of less than ?140 dB/Hz. The VCSEL can include an elliptical emission aperture having the same dimensions of the elliptical oxide aperture. The VCSEL can include an elliptical contact having an elliptical contact aperture therein, the elliptical contact being around the elliptical emission aperture. The elliptical contact can be C-shaped. The VCSEL can include one or more trenches lateral of the oxidized region, the one or more trenches forming an elliptical shape, wherein the oxidized region has an elliptical shape. The one or more trenches can be trapezoidal shaped trenches.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: May 28, 2019
    Assignee: Finisar Corporation
    Inventors: Deepa Gazula, Nicolae Chitica, Marek Chacinski, Gary Landry, Jim Tatum
  • Patent number: 10299389
    Abstract: In an example embodiment, a circuit interconnect includes a first printed circuit board (PCB), a second PCB, a spacer, and an electrically conductive solder joint. The first PCB includes a first electrically conductive pad. The second PCB includes a second electrically conductive pad. The spacer is configured to position the first PCB relative to the second PCB such that a space remains between the first PCB and the second PCB after the first electrically conductive pad and the second electrically conductive pad are conductively connected in a soldering process. The electrically conductive solder joint conductively connects the first electrically conductive pad and the second electrically conductive pad.
    Type: Grant
    Filed: August 1, 2017
    Date of Patent: May 21, 2019
    Assignee: FINISAR CORPORATION
    Inventor: Wei Shi
  • Patent number: 10295768
    Abstract: One example embodiment includes an optical subassembly (OSA). The OSA includes a leadframe circuit, an optical port, and an active optical component subassembly. The active optical component subassembly is mounted to the leadframe circuit. The optical port is mechanically coupled to the leadframe circuit.
    Type: Grant
    Filed: July 7, 2017
    Date of Patent: May 21, 2019
    Assignee: Finisar Corporation
    Inventors: Wendy Pei Fen Lau, Paul Thien Vui Chia, Yunpeng Song, Tat Ming Teo, Yew-Tai Chieng
  • Patent number: 10298330
    Abstract: An embodiment includes a host-equalized optical transceiver. The host-equalized optical transceiver includes a driver analog interface, a linear laser diode driver (LLDD), and an optical transmitter. The driver analog interface is configured to interface with a host integrated circuit (IC) of a host system. The LLDD is directly electrically coupled to a host IC of the host system via the driver analog interface. The LLDD is configured to receive an equalized electrical data signal directly from the host IC via the driver analog interface and to generate a driving signal based on the equalized electrical data signal. The equalized electrical data signal is a linear signal. The optical transmitter is electrically coupled to the LLDD. The optical transmitter is configured to receive the driving signal from the LLDD and to generate an optical signal that is representative of the driving signal.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: May 21, 2019
    Assignee: FINISAR CORPORATION
    Inventor: Jim Alan Tatum
  • Patent number: 10291324
    Abstract: An optoelectronic transceiver includes an optoelectronic transmitter, an optoelectronic receiver, memory, and an interface. The memory is configured to store digital values representative of operating conditions of the optoelectronic transceiver. The interface is configured to receive from a host a request for data associated with a particular memory address, and respond to the host with a specific digital value of the digital values. The specific digital value is associated with the particular memory address received from the host. The optoelectronic transceiver may further include comparison logic configured to compare the digital values with limit values to generate flag values, wherein the flag values are stored as digital values in the memory.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: May 14, 2019
    Assignee: Finisar Corporation
    Inventors: Lewis B. Aronson, Lucy G. Hosking
  • Patent number: 10291346
    Abstract: In an example, a communication module includes an optical transmitter, an optical receiver, and a periodical filter. The optical transmitter is configured to emit an outbound optical signal. The optical receiver is configured to receive an inbound optical signal. A first frequency of the outbound optical signal is offset from a second frequency of the inbound optical signal by an amount less than a channel spacing of a multiplexer/demultiplexer implemented in an optical communication system that includes the communication module. The periodical filter is positioned in optical paths of both the outbound optical signal and the inbound optical signal and has a transmission spectrum with periodic transmission peaks and troughs. The first frequency of the outbound optical signal may be aligned to one of the transmission peaks and the second frequency of the inbound optical signal may be aligned to one of the transmission troughs, or vice versa.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: May 14, 2019
    Assignee: FINISAR CORPORATION
    Inventors: Leo Yu-Yu Lin, Huade Shu, Huiping Li, Li Zhang, Shanshan Zeng, Guangsheng Li
  • Patent number: 10284301
    Abstract: A laser module can include: a laser chip having a plurality of laser diodes; a focusing lens optically coupled to each of the plurality of distinct laser diodes; and a photonic integrated circuit (PIC) having a plurality of optical inlet ports optically coupled to the plurality of laser diodes through the focusing lens. The laser module can include an optical isolator optically coupled to the focusing lens and PIC and positioned between the focusing lens and PIC. The laser chip can include a fine pitch laser array. The laser module can include a plurality of optical fibers optically coupled to an optical outlet port of the PIC. The laser module can include a hermetic package containing the laser chip and having a single focusing lens positioned for the plurality of laser diodes to emit laser beams there through.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: May 7, 2019
    Assignee: FINISAR CORPORATION
    Inventors: Xiaojie Xu, Mark Donovan
  • Patent number: 10270538
    Abstract: A circuit may include amplifier circuitry configured to receive a current signal at an amplifier input node, convert the current signal to a voltage signal, and output the voltage signal at an amplifier output node. The circuit may also include overload circuitry configured to receive a replica DC input voltage and a replica DC output voltage. The overload circuitry may be further configured to detect that the current signal exceeds a threshold level based on the replica DC input voltage and the replica DC output voltage. In addition, the overload circuitry may be configured to, in response to and based on detecting that the current signal exceeds the threshold level, direct DC current of the current signal through a DC shunt path and direct AC current of the current signal through an AC shunt path. The AC shunt path may be different from the DC shunt path.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: April 23, 2019
    Assignee: FINISAR CORPORATION
    Inventors: Theron Lee Jones, Richard Dean Davis
  • Patent number: 10261251
    Abstract: In an example, a photonic system includes a Si PIC with a Si substrate, a SiO2 box formed on the Si substrate, a first layer, and a second layer. The first layer is formed above the SiO2 box and includes a SiN waveguide with a coupler portion at a first end and a tapered end opposite the first end. The second layer is formed above the SiO2 box and vertically displaced above or below the first layer. The second layer includes a Si waveguide with a tapered end aligned in two orthogonal directions with the coupler portion of the SiN waveguide such that the tapered end of the Si waveguide overlaps in the two orthogonal directions and is parallel to the coupler portion of the SiN waveguide. The tapered end of the SiN waveguide is configured to be adiabatically coupled to a coupler portion of an interposer waveguide.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: April 16, 2019
    Assignee: FINISAR CORPORATION
    Inventors: Daniel Mahgerefteh, Bryan Park, Jianxiao Chen, Xiaojie Xu, Gilles P. Denoyer, Bernd Huebner
  • Patent number: 10254477
    Abstract: An integrated optical component includes at least one input waveguide, at least one output waveguide; a first slab waveguide having a first refractive index, n1. The first slab waveguide may be disposed between at least one of the input waveguides and at least one of the output waveguides. The integrated optical component may further include a second slab waveguide having a second refractive index, n2. The integrated optical component may also include a third cladding slab having a third refractive index, n3. The third cladding slab may be disposed between the first slab and the second slab. The thickness of the second slab waveguide and the thickness of the third slab waveguide are adjustable to reduce a birefringence of the integrated optical component.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: April 9, 2019
    Assignee: FINISAR CORPORATION
    Inventors: Daniel Mahgerefteh, Jared Mikkelsen
  • Patent number: 10243322
    Abstract: A system includes a surface coupled edge emitting laser that includes a core waveguide, a fan out region optically coupled to the core waveguide in a same layer of the surface coupled edge emitting laser as the core waveguide; and a first surface grating formed in the fan out region; and a photonic integrated circuit (PIC) that includes an optical waveguide and a second surface grating formed in an upper layer of the PIC, wherein the second surface grating is in optical alignment with the first surface grating.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: March 26, 2019
    Assignee: FINISAR CORPORATION
    Inventors: Daniel Mahgerefteh, Jianxiao Chen, Bernd Huebner, Xiaojie Xu, Yasuhiro Matsui, David Adams, The' Linh Nguyen
  • Patent number: 10241948
    Abstract: An example embodiment includes an idle state detection circuit. The idle state detection circuit includes a bias current loop, a rectifying circuit loop, a voltage translating loop, and a filter circuit. The bias current loop provides a rectifying diode a forward current such that the rectifying diode detects an alternating current (AC) signal received from a transmitter via one or more transmission nodes. The rectifying circuit loop stores differential peak to peak amplitude information representative of a peak to peak amplitude of the AC signal in a first capacitor that is electrically coupled to a cathode side of the rectifying diode. The voltage translating loop converts the differential peak to peak amplitude information stored at the first capacitor to a single-end voltage signal across a first resistor that is electrically coupled to the cathode side of the rectifying diode. The filter circuit filters an AC component of the single-end voltage signal.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: March 26, 2019
    Assignee: FINISAR CORPORATION
    Inventors: Hongdang He, Qin Chen
  • Patent number: 10241274
    Abstract: An optical assembly includes a first grating device configured to: receive a light beam that includes an optical signal with a particular wavelength from a fiber; and change a propagation direction of the optical signal according to the particular wavelength of the optical signal. The optical assembly also includes a second grating device configured to: receive the optical signal outputted from the first grating device; change the propagation direction of the optical signal according to the particular wavelength of the optical signal; and direct the optical signal onto a grating coupler. The first grating device and the second grating device are configured to satisfy a plurality of configuration constraints.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: March 26, 2019
    Assignee: FINISAR CORPORATION
    Inventors: Xiaojie Xu, Thomas W. Mossberg, Tengda Du, Christoph M. Greiner, Dmitri Iazikov
  • Patent number: 10230215
    Abstract: An etched planarized VCSEL includes: an active region; a blocking region over the active region, and defining apertures therein; and conductive channel cores in the apertures, wherein the conductive channel cores and blocking region form an isolation region. A method of making the VCSEL includes: forming the active region; forming the blocking region over the active region; etching the apertures in the blocking region; and forming the conductive channel cores in the apertures of the blocking region. Another etched planarized VCSEL includes: an active region; a conductive region over the active region, and defining apertures therein; and blocking cores in the apertures, wherein the blocking cores and conductive region form an isolation region. A method of making the VCSEL includes: forming the active region; forming the conductive region over the active region; etching the apertures in the conductive region; and forming the blocking cores in the apertures of the conductive region.
    Type: Grant
    Filed: August 8, 2017
    Date of Patent: March 12, 2019
    Assignee: FINISAR CORPORATION
    Inventors: Luke Graham, Andy MacInnes
  • Patent number: 10222556
    Abstract: A fiber optic connector may include a body, a first fiber ferrule, and a second fiber ferrule. The first fiber ferrule may extend in a length direction of the body from a module-side end of the body. The second fiber ferrule may extend in the length direction of the body from the module-side end of the body and may be spaced apart from the first fiber ferrule in a width direction of the body. A maximum width in the width direction of a portion of the body configured to be received in a port of an optoelectronic communication module may be less than half a width of a fiber-side end of the optoelectronic communication module.
    Type: Grant
    Filed: May 26, 2017
    Date of Patent: March 5, 2019
    Assignee: FINISAR CORPORATION
    Inventor: Long Van Nguyen
  • Patent number: 10225071
    Abstract: A system may include a clock and data recovery circuit that includes one or more analog components. The system may also include a digital control circuit configured to control the clock and data recovery circuit. The digital control circuit and the clock and data recovery circuit may be formed on a single substrate.
    Type: Grant
    Filed: November 24, 2014
    Date of Patent: March 5, 2019
    Assignee: FINISAR CORPORATION
    Inventor: Jason Y. Miao
  • Patent number: 10218098
    Abstract: A module mount interposer may include one or more fastener receivers configured to mechanically couple with one or more fasteners so as to mechanically and electrically couple a module to the interposer. The module mount interposer may also include a core configured to electrically couple with the module, wherein each of the fastener receivers are mechanically coupled to the core. The module mount interposer may additionally include a solder layer electrically coupled to the core and configured to electrically couple with a printed circuit board (PCB) so as to provide an electrical signal from the module to the PCB and to provide an electrical signal from the PCB to the module.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: February 26, 2019
    Assignee: FINISAR CORPORATION
    Inventors: Jia Lian, Huaping Peng, Shamei Shi, William H Wang, Frank Flens, Henricus Jozef Vergeest
  • Patent number: 10218446
    Abstract: A method and apparatus for characterizing and compensating optical impairments in an optical transmitter includes operating an optical transmitter comprising a first and second parent MZ, each comprising a plurality of child MZ modulators that are biased at respective initial operating points. An electro-optic RF transfer function is generated for each of the plurality of child MZ modulators. Curve fitting parameters are determined for each of the plurality of electro-optic RF transfer functions and operating points of each child MZ modulator are determined using the curve fitting parameters. An IQ power imbalance is determined using the curve fitting parameters. Initial RF drive power levels are determined that compensate for the determined IQ power imbalance. The XY power imbalance is determined for initial RF drive power levels using the curve fitting parameters.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: February 26, 2019
    Assignee: Finisar Corporation
    Inventors: Suhas P. Bhandare, Heider N. Ereifej, Ihab E. Khalouf, Mark Colyar