Abstract: A device (1?, 1?, 1??) for manufacturing III-V-crystals and wafers (14) manufactured therefrom, which are free of residual stress and dislocations, from melt (16) of a raw material optionally supplemented by lattice hardening dopants comprises a crucible (2?, 2?, 2??) for receiving the melt (16) having a first section (4?, 4?) including a first cross-sectional area and a second section (6?) for receiving a seed crystal (12) and having a second cross-sectional area, wherein the second cross-sectional area is smaller than the first cross-sectional area and the first and second sections are connected with each other directly or via third section (8, 8?) which tapers from the first section towards the second section, in order to allow a crystallization starting from the seed crystal (12) within the directed temperature field (T) into the solidifying melt.

Abstract: The present invention encompasses a method of selectively separating Ga from wastewaters with the aid of a dialysis method. This exploits the particular complexation behaviour of Ga, which forms an unstable tetrahalo complex. This forms only in the case of a sufficiently high halide concentration. Since the halide concentration becomes lower across the membrane, the Ga-tetrahalo complex breaks down in the membrane, as a result of which the Ga is retained. Other metals such as In and Fe do not show this behaviour, and therefore the tetrahalo complexes of these metals can pass through the membrane and hence can be selectively separated off.

Abstract: The present invention relates to a novel provided gallium arsenide substrates as well as the use thereof. The gallium arsenide substrates provided according to the invention exhibit a so far not obtained surface quality, in particular a homogeneity of surface properties, which is detectable by means of optical surface analyzers, by way of example by means of ellipsometric lateral substrate mapping for optical contact-free quantitative characterization.

Abstract: There is provided a template comprising a substrate comprising sapphire and at least one III-N crystal layer, wherein III denotes at least one element of the main group III of the periodic table of the elements, selected from the group of Al, Ga and In, wherein in a region of the at least one III-N layer above the substrate comprises a mask material as an interlayer, wherein the III-N crystal layer of the template is defined by one or both of the following values (i)/(ii) of the deformation ?xx: (i) at room temperature the ?xx value lies in the range of <0; and (ii) at growth temperature the ?xx value lies in the range of ?xx?0.

Abstract: A device for evaporating a metal melt, the device comprising a first crucible or crucible portion operative to receive the metal melt comprising at least one aperture, from which the evaporated metal may pass off, a second crucible or crucible portion operative to receive a susceptor material, comprising an electromagnetic radiation source, which is arranged such that it can heat susceptor material comprised in the second crucible or crucible portion through incident electromagnetic induction, wherein it does not or only negligibly heats the metal melt in the first crucible or crucible portion, wherein the first crucible or crucible portion and the second crucible or crucible portion are thermally coupled, such that the metal melt can attain a desired temperature.

Abstract: The present invention relates to a process for the production of III-V-, IV-IV- or II-VI-compound semiconductor crystals. The process starts with providing of a substrate with optionally one crystal layer (buffer layer). Subsequently, a gas phase is provided, which comprises at least two reactants of the elements of the compound semiconductor (II, III, IV, V, VI) which are gaseous at a reaction temperature in the crystal growth reactor and can react with each other at the selected reactor conditions. The ratio of the concentrations of two of the reactants is adjusted such that the compound semiconductor crystal can crystallize from the gas phase, wherein the concentration is selected that high, that crystal formation is possible, wherein by an adding or adjusting of reducing agent and of co-reactant, the activity of the III-, IV- or II-compound in the gas phase is decreased, so that the growth rate of the crystals is lower compared to a state without co-reactant.

Abstract: The present invention relates to a III-N single crystal adhering to a substrate, wherein III denotes at least one element of the third main group of the periodic table of the elements, selected from the group of Al, Ga and In, wherein the III-N single crystal exhibits, within a temperature range of an epitaxial crystal growth, a value (i) of deformation ?XX in the range of <0. Additionally or alternatively, the III-N single crystal exhibits at room temperature a value (ii) of deformation ?XX in the range of <0.

Abstract: The present invention relates to a novel process for producing a surface-treated gallium arsenide substrate as well as novel provided gallium arsenide substrates as such as well as the use thereof. The improvement of the process according to the invention is based on a particular final surface treatment with an oxidation treatment of at least one surface of the gallium arsenide substrate in dry condition by means of UV radiation and/or ozone gas, a contacting of the at least one surface of the gallium arsenide substrate with at least one liquid medium and a Marangoni drying of the gallium arsenide substrate. The gallium arsenide substrates provided according to the invention exhibit a so far not obtained surface quality, in particular a homogeneity of surface properties, which is detectable by means of optical surface analyzers, specifically by means of ellipsometric lateral substrate mapping for the optical contact-free quantitative characterization.

Abstract: The present invention relates to the production of III-N templates and also the production of III-N single crystals, III signifying at least one element of the third main group of the periodic table, selected from the group of Al, Ga and In. By adjusting specific parameters during crystal growth, III-N templates can be obtained that bestow properties on the crystal layer that has grown on the foreign substrate which enable flawless III-N single crystals to be obtained in the form of templates or even with large III-N layer thickness.

Abstract: The present invention relates to the production of III-N templates and also the production of III-N single crystals, III signifying at least one element of the third main group of the periodic table, selected from the group of Al, Ga and In. By adjusting specific parameters during crystal growth, III-N templates can be obtained that bestow properties on the crystal layer that has grown on the foreign substrate which enable flawless III-N single crystals to be obtained in the form of templates or even with large III-N layer thickness.

Abstract: A semiconductor compound material, preferably a III-N-bulk crystal or a III-N-layer, is manufactured in a reactor by means of hydride vapor phase epitaxy (HVPE), wherein in a mixture of carrier gases a flow profile represented by local mass flow rates is formed in the reactor. The mixture can carry one or more reaction gases towards a substrate. Thereby, a concentration of hydrogen important for the reaction and deposition of reaction gases is adjusted at the substrate surface independently from the flow profile simultaneously formed in the reactor.

Abstract: A process for producing a doped III-N bulk crystal, wherein III denotes at least one element of the main group III of the periodic system, selected from Al, Ga and In, wherein the doped crystalline III-N layer or the doped III-N bulk crystal is deposited on a substrate or template in a reactor, and wherein the feeding of at least one dopant into the reactor is carried out in admixture with at least one group III material. In this manner, III-N bulk crystals and III-N single crystal substrates separated therefrom can be obtained with a very homogeneous distribution of dopants in the growth direction as well as in the growth plane perpendicular thereto, a very homogeneous distribution of charge carriers and/or of the specific electric resistivity in the growth direction as well as in the growth plane perpendicular thereto, and a very good crystal quality.

Abstract: An arrangement for manufacturing a crystal of the melt of a raw material comprises: a furnace having a heating device with one or more heating elements, which are configured to generate a gradient temperature field directed along a first direction, a plurality of crucibles for receiving the melt, which are arranged within the gradient temperature field side by side, and a device for homogenizing the temperature field within a plane perpendicular to the first direction in the at least two crucibles. The arrangement further has a filling material inserted within a space between the crucibles wherein the filling shows an anisotropic heat conductivity. Additionally or alternatively, the arrangement may comprise a device for generating magnetic migration fields, both the filling material having the anisotropic heat conductivity and the device for generating magnetic migration fields being suited to compensate or prevent the formation of asymmetric phase interfaces upon freezing of the raw melt.

Abstract: A device for heat treating (annealing) a III-V semiconductor wafer comprises at least one wafer support unit which is dimensioned such that a cover provided above the wafer surface is either spaced without any distance or with a distance of maximally about 2 mm to the wafer surface. A process for heat treating III-V semiconductor wafers having diameters larger than 100 mm and a dislocation density below 1×104 cm?2 is carried out in the device of the invention. SI GaAs wafers produced have an at least 25% increased characteristic fracture strength (Weibull distribution), an improved radial macroscopic and mesoscopic homogeneity and an improved quality of the mechano-chemically polished surface. The characteristic fracture strength is higher than 1900 MPa.

Abstract: An epitaxial growth process for producing a thick III-N layer, wherein III denotes at least one element of group III of the periodic table of elements, is disclosed, wherein a thick III-N layer is deposited above a foreign substrate. The epitaxial growth process preferably is carried out by HVPE. The substrate can also be a template comprising the foreign substrate and at least one thin III-N intermediate layer. The surface quality is improved by providing a slight intentional misorientation of the substrate, and/or a reduction of the N/III ratio and/or the reactor pressure towards the end of the epitaxial growth process. Substrates and semiconductor devices with such improved III-N layers are also disclosed.

Abstract: A semiconductor compound material, preferably a III-N-bulk crystal or a III-N-layer, is manufactured in a reactor by means of hydride vapor phase epitaxy (HVPE), wherein in a mixture of carrier gases a flow profile represented by local mass flow rates is formed in the reactor. The mixture can carry one or more reaction gases towards a substrate. Thereby, a concentration of hydrogen important for the reaction and deposition of reaction gases is adjusted at the substrate surface independently from the flow profile simultaneously formed in the reactor.

Abstract: The present invention relates to the production of III-N templates and also the production of III-N single crystals, III signifying at least one element of the third main group of the periodic table, selected from the group of Al, Ga and In. By adjusting specific parameters during crystal growth, III-N templates can be obtained that bestow properties on the crystal layer that has grown on the foreign substrate which enable flawless III-N single crystals to be obtained in the form of templates or even with large III-N layer thickness.

Abstract: A process is disclosed for producing a doped gallium arsenide single crystal by melting a gallium arsenide starting material and subsequently solidifying the gallium arsenide melt, wherein the gallium arsenide melt contains an excess of gallium relative to the stoichiometric composition, and wherein it is provided for a boron concentration of at least 5×1017 cm?3 in the melt or in the obtained crystal. The thus obtained crystal is characterized by a unique combination of low dislocation density, high conductivity and yet excellent, very low optic absorption, particularly in the range of the near infrared.

Abstract: A process for producing a doped III-N bulk crystal, wherein III denotes at least one element of the main group III of the periodic system, selected from Al, Ga and In, wherein the doped crystalline III-N layer or the doped III-N bulk crystal is deposited on a substrate or template in a reactor, and wherein the feeding of at least one dopant into the reactor is carried out in admixture with at least one group III material. In this manner, III-N bulk crystals and III-N single crystal substrates separated therefrom can be obtained with a very homogeneous distribution of dopants in the growth direction as well as in the growth plane perpendicular thereto, a very homogeneous distribution of charge carriers and/or of the specific electric resistivity in the growth direction as well as in the growth plane perpendicular thereto, and a very good crystal quality.

Abstract: In a process for manufacturing doped semiconductor single crystal comprises solidifying in a crucible, the amount of dopant is added into the semiconductor melt after the beginning of the crystal growth onto the seed crystal, or after at least partial solidification of the semiconductor single crystal in a conical or tapered portion of the crucible. Dopant may be partially added in advance into the crucible, with the remainder added into the semiconductor melt as described. Type III-V semiconductor single crystals or wafers having a diameter of at least about 100 mm, can be prepared having an electrical conductivity of at least about 250 Siemens/cm, and/or an electric resistivity of at most about 4×10?3 ?cm, and/or a significantly improved ratio of hall mobility to charge carrier concentration.