Abstract: Upper, inner and lower sections (182, 180 and 184) of a PCB (100) are formed with each section having a substrate (140, 150 and 160) having patterned layers of metallization (105 and 110, 115 and 120, and 125 and 130), respectively. Some of the patterned layers of metallization (110, 115, 120, and 125) have thicker portions (171, 173) and part (188) of portion (186), and thinner portions (172, 174, 187, 190, 191, 192 and 193). The resultant thinner portion (175 and 194) in the prepreg layers (145 and 155) with the respective thicker portions of metallization provide decoupling capacitors, while the resultant thicker portions (196 and 198), for example, provide a lower capacitance for improved trace impedance for the signal traces (191 and 192).

Abstract: An neutral electroless gold plating method that minimises “black band” corrosion problem in the final product. The electroless gold plating solution is provided at neutral pH in the presence of a reducing agent, a complexing agent and an accelerator to allow a gold layer of the desired thickness to be plated under manufacturing conditions The gold layer produced thereof has good bondability and solderability.

Abstract: A PCB board with in-board EMI shielding in which a prescribed electrical circuitry within a PCB is shielded from EMI by fabricating a uniform metal shielding enclosure therearound. The shielded circuitry may be a single metal trace, a group of interconnected traces in the same or different layers of the same PCB, or a complete electrical circuitry spanning many different layers and locations within the same PCB. Using the same technology, groups of electrical circuitry that require isolation because of EMI may be fabricated together in proximity, with each group shielded from the EMI of the others. The metal shield contains a top shield in a layer above the circuitry, a bottom shield in a layer below the circuitry, and side shields adjacent the circuitry. There is no gap in the shielding structure, except whether the prescribed circuitry connects to another circuitry.

Abstract: A printed circuit board with at least one cavity produced by combining a dielectric core layer with an adhesive layer. The adhesive layer is a no-flow bond film without a corresponding window. Thus the bond film also act as the base of the cavity. According to one feature of the invention, a top core layer having a window is laid on top of the bond film. Since the bond film does not have a window, the tedious step of registering different windows is completely eliminated. According to a further feature of the invention, the thickness of the top core layer from where the cavity will be derived is adjusted to thicker than or the same as the depth of the cavity in the final printed circuit board.