Abstract: A display panel, including: a substrate including a display region and a non-display region; a second conductive layer including more than one gate line located in the display region, and more than one virtual gate line located in the non-display region; a virtual conductive part, located in the non-display region, where the virtual conductive part is located in a different conductive layer from the virtual gate line, an orthographic projection of the virtual conductive part on the substrate is located within an orthographic projection of the virtual gate line on the substrate, and the virtual conductive part is configured to form an equivalent capacitance with the virtual gate line; and a RC load of the virtual gate line matches with a RC load of the gate line.

Abstract: The present disclosure provides an array substrate and a manufacturing method thereof, and a display apparatus. The array substrate includes a plurality of gate lines (20) and a plurality of data lines (50) disposed on a base substrate (11), the plurality of gate lines (20) extend along a first direction, the plurality of data lines (50) extend in a second direction, the plurality of gate lines (20) and the plurality of data lines (50) are intersected to define a plurality of sub-pixels, the sub-pixel includes a thin film transistor (10), a pixel electrode (80) and a common electrode (90), the common electrode (90) in one sub-pixel is connected with the common electrode (90) in the adjacent sub-pixel through a common connection portion (110).

Abstract: A dimming panel, a method for manufacturing same, a method for driving same, and architectural dimming glass. The dimming panel includes: a first base substrate and a second base substrate; a first electrode layer on one side of the first base substrate facing the second base substrate and at least in the dimming region; a group of support columns on one side of the first electrode layer facing the second base substrate, and an orthographic projection of each of the support columns on the first base substrate is provided an overlapping region with an orthographic projection of the first electrode layer on the first base substrate; a transition layer between the first electrode layer and the support columns; a second electrode layer on one side of the second base substrate facing the first base substrate; and a dimming layer between the second electrode layer and the transition layer.

Abstract: Provided is an array substrate. The array substrate includes: a base substrate; a plurality of clock lines; a plurality of clock leads; a plurality of shift register units; and a compensation capacitor plate, disposed on the base substrate and in the peripheral region, wherein the compensation capacitor plate is connected to the clock lead, and the compensation capacitor plate and the clock lead are in different layers, an area of the compensation capacitor plate being negatively correlated with a length of the clock lead connected to the compensation capacitor plate.

Abstract: A thin film transistor, an array substrate and a display device are provided. The thin film transistor is on a base substrate and includes a gate electrode, a first electrode, and a second electrode on the base substrate. The gate electrode includes a first body portion and a first extension portion extending along the first direction, electrically connected with the first body portion, and spaced apart from the first body portion by a first spacing.

Abstract: A display panel has a plurality of sub-pixel regions arranged in an array of a plurality of rows and a plurality of columns, and a light-shielding region that separates the sub-pixel regions and surrounds all the sub-pixel regions as a whole. The display panel includes: a first substrate; a light-shielding pattern layer located on the first substrate, the light-shielding pattern layer being located in the light-shielding region and covering part of the light-shielding region; a second substrate disposed opposite to the first substrate; and a light-shielding structure layer located on the second substrate, the light-shielding structure layer covering at least a region of the light-shielding region that is not covered by the light-shielding pattern layer.

Abstract: Provided is an array substrate, including: a substrate; a first insulating layer and a second insulating layer that are successively stacked; a first electrode disposed on a side, proximal to the substrate, of the first insulating layer; a second electrode disposed between the first insulating layer and the second insulating layer; and a lap electrode disposed on a side, distal from the substrate, of the second insulating layer. The array substrate includes a plurality of first vias and a plurality of second vias. The lap electrode is electrically connected to the first electrode and is electrically connected to the second electrode. An orthographic projection of the first electrode on the substrate is overlapped with an orthographic projection of the second electrode on the substrate, and covers a region between at least one of the first vias and at least one of the second vias.

Abstract: The present disclosure provides a display substrate and a display device. The display substrate includes a base substrate and a driving circuit arranged on the base substrate. The driving circuit includes multiple denoising transistors and multiple transistors for driving, and the denoising transistors are electrically connected to a pull-up node. A length of a channel of each of at least a part of the denoising transistors is a first length L1, a length of a channel of each of at least a part of the multiple transistors for driving is a second length L2, and the first length L1 is not equal to the second length L2.

Abstract: Provided is an array substrate which includes a base substrate; a plurality of common electrodes disposed on a side of the base substrate; a plurality of data lines disposed on a side of the base substrate, wherein with respect to each of the data lines, a distance between the data line and a first target common electrode is different from a distance between the data line and a second target common electrode; and a plurality of pixel electrodes arranged in an array and disposed on a side of the base substrate.

Abstract: An edge-lit backlight module (7) includes a light guide plate (71), at least one polarizer (72) and at least one light source (73). The light guide plate (71) has side faces (71a). A polarizer (72) is disposed opposite to a side face (71a) of the light guide plate (71). A light source (73) is disposed on a side of a polarizer (72) away from the light guide plate (71). The at least one polarizer (72) is configured to convert light emitted from a light source (73) disposed on a side of the polarizer away from the light guide plate to the light guide plate (71) into linearly polarized light.

Abstract: An Embodiment of the present disclosure provide a display substrate, including a base substrate, and a plurality of first scanning lines, a plurality of second scanning lines, a plurality of data lines, a plurality of common electrodes and a plurality of pixel electrodes on the base substrate. The second scanning lines are parallel to the data lines, and the second scanning lines, the common electrodes and the pixel electrodes are in different layers. The common electrodes are located on a side of the second scanning lines and the data lines away from the base substrate, and on a side of the pixel electrodes proximal to the base substrate. An orthographic projection of one of the data line and the second scanning line on the base substrate is located in a spacer region between adjacent pixel electrodes.

Abstract: A display panel includes: a first active area and at least one second active area, a substrate; a plurality of sub-pixels located on the substrate, the plurality of sub-pixels being in the first active area, and each of the sub-pixels including a common electrode; grid lines and data lines, at least one of the data lines being located at a junction of the first active area and the second active area; a plurality of first conductive patterns at least in the second active area, and the first conductive patterns being electrically connected to one of the grid lines or the common electrode; and a plurality of second conductive patterns in the second active area and electrically connected to the data line at the junction, orthographic projections of part first conductive patterns on the substrate overlap orthographic projections of the second conductive patterns on the substrate.

Abstract: Embodiments of the disclosure provide a display substrate and a method for manufacturing the same. The display substrate includes: a base substrate; a thin film transistor including a source-drain metal layer and a first insulating layer; a second insulating layer; a color resist layer; and a third insulating layer. The third insulating layer comprises a first via hole that sequentially penetrates the third insulating layer, the color resist layer and the second insulating layer and thus extends from the third insulating layer to the source-drain metal layer. A sidewall of the first via hole comprises a first portion formed of a material of the second insulating layer, a second portion formed of a material of the color resist layer, and a third portion formed of a material of the third insulating layer, the second portion is between the first portion and the third portion.

Abstract: The present disclosure provides a display substrate and a display device. The display substrate includes a base substrate and a driving circuit arranged on the base substrate. The driving circuit includes multiple denoising transistors and multiple transistors for driving, and the denoising transistors are electrically connected to a pull-up node. A length of a channel of each of at least a part of the denoising transistors is a first length L1, a length of a channel of each of at least a part of the multiple transistors for driving is a second length L2, and the first length L1 is not equal to the second length L2.

Abstract: The present disclosure provides a display device. The display device includes: a liquid crystal display panel; a liquid crystal light control panel located on the light incident side of the liquid crystal display panel; and at least two haze layers located on the light emitting side of the liquid crystal display panel.

Abstract: A displaying module and a method for manufacturing the same, and a displaying device, which relates to the technical field of displaying. The displaying module includes a liquid-crystal display panel, an adhering layer and an optical film that are arranged in layer configuration; the adhering layer is disposed between a shadow surface of the liquid crystal display panel and the optical film, and is configured for adhesively bonding the liquid crystal display panel and the optical film; and an orthographic projection of the adhering layer on the liquid crystal display panel covers at least an active area of the liquid-crystal display panel, and an orthographic projection of the optical film on the liquid crystal display panel covers at least the active area of the liquid-crystal display panel.

Abstract: The present disclosure relates to the field of display technologies and, in particular to a display panel and an electronic device. The display panel comprises: Q rows of first scanning line groups arranged sequentially along a column direction; M columns of second scanning line groups arranged sequentially along a row direction; and at least one gate drive circuit, located on a side of the Q-th row of the first scanning line groups away from the (Q?1)-th row of the first scanning line groups. Each gate drive circuit comprises Q columns of shift register unit groups cascaded in stages. The q-th stage of the shift register unit groups is connected with the q-th row of the first scanning line groups through at least one column of the second scanning line groups. M?Q>1, 1?q?Q, and M, N, Q, q are all positive integers.

Abstract: A display panel, including: a substrate including a display region and a non-display region; a second conductive layer including more than one gate line located in the display region, and more than one virtual gate line located in the non-display region; a virtual conductive part, located in the non-display region, where the virtual conductive part is located in a different conductive layer from the virtual gate line, an orthographic projection of the virtual conductive part on the substrate is located within an orthographic projection of the virtual gate line on the substrate, and the virtual conductive part is configured to form an equivalent capacitance with the virtual gate line; and a RC load of the virtual gate line matches with a RC load of the gate line.

Abstract: Disclosed are a display module and a transparent display apparatus. The display module includes: a transparent light guide plate including a grid dot face and a light emergent face, and a light incident face connecting the grid dot face and the light emergent face; a side-type light source, located on the side of the transparent light guide plate where the light incident face is located; a transparent adhesive layer including a first face and a second face, with the first face being disposed in contact with the grid dot face of the transparent light guide plate, the refractive index of the transparent adhesive layer is different from the refractive index of the transparent light guide plate, and the transparent adhesive layer contains particles that scatter light; and a transparent reflecting layer, disposed in contact with the second face of the transparent adhesive layer.

Abstract: A display substrate, a display panel and a display apparatus. The display substrate including: a substrate having a display area; a plurality of sub-pixels arranged in an array and located in the display area of the substrate; and a plurality of data lines arranged in the display area of the substrate; the plurality of data lines extend in a column direction of the sub-pixels, and a column of sub-pixels are electrically connected with at least one of the plurality of data lines; and for at least one of the plurality of data lines, a side of an orthographic projection of the at least one of the plurality of data lines on the substrate facing orthographic projections of sub-pixels electrically connected with the at least one of the plurality of data lines has a plurality of first concave-convex structures.