Abstract: The network relay device of the invention carries out data transmission to and from an opposite device to relay data in a network. The network relay device includes: multiple ports connecting with corresponding multiple ports of the opposite device via multiple links; and a link aggregation control module that aggregates the multiple links to establish a link aggregation, which is regarded as one logic link, and carries out transmission of a control frame signal including a synchronization bit, as well as data transmission, at each port via the link aggregation. In response to detection of occurrence of a trouble in at least one of the aggregated multiple links, the link aggregation control module causes a port that connects with a normal link without the trouble among the multiple ports to stop the data transmission and send the control frame signal including the synchronization bit set equal to a first value.

Abstract: The present invention provides electronic parts for amplifying high frequency power capable of expanding a dynamic range of an output power detection circuit, obtaining a continuous detection output having no inflexion point from a low region of output power to its high region and thereby improving controllability of the output power. In a wireless communication system which controls output power of a high frequency power amplifier, based on an output power detection signal and a signal indicative of an output level, an output power detection circuit is provided with a multi-stage configured amplifier which amplifies a high frequency signal taken out via a coupler and capacitive elements. Further, a plurality of detection circuits which detect outputs of amplifiers of respective stages, and a detection circuit which detects the high frequency signal without passing through the multi-stage configured amplifier are provided.

Abstract: The network relay device of the invention carries out data transmission to and from an opposite device to relay data in a network. The network relay device includes: multiple ports connecting with corresponding multiple ports of the opposite device via multiple links; and a link aggregation control module that aggregates the multiple links to establish a link aggregation, which is regarded as one logic link, and carries out transmission of a control frame signal including a synchronization bit, as well as data transmission, at each port via the link aggregation. In response to detection of occurrence of a trouble in at least one of the aggregated multiple links, the link aggregation control module causes a port that connects with a normal link without the trouble among the multiple ports to stop the data transmission and send the control frame signal including the synchronization bit set equal to a first value.

Abstract: In the case of radio base stations of different kinds, a synchronization in a radio section cannot be established so that the efficiently effective use of electric waves cannot be retained. According to the invention, therefore, there is provided a TDMA type mobile communication system 100 comprising: a plurality of radio base stations of different system kinds (i.e., a general type radio base station 1, an IP connection type radio base station 10 and a main digital cordless phone 2); mobile phones 5A and 5B wirelessly connected with the plural radio base stations; and a private branch exchange 4 wired with the radio base stations. The radio base station receives, when a synchronized operation mode is decided, a frame signal containing a control CH signal, from a reference radio base station (i.e.

Abstract: In radio communication system that is able to transmit in two or more modulation modes, e.g., one modulation mode when phase shifts are performed and another modulation mode when phase shifts and amplitude shifts are performed, the disclosed invention can avoid that receiving band noise becomes so great not to conform to the GSM standards' prescription for such noise in a high voltage region of the power supply voltage, even when the output power is controlled by changing the amplitude of the input signal to the power amplifier circuitry while fixing the bias voltages to be applied to the power amplifying transistors. When the output power is controlled as above, in the modulation mode (GSM mode) when phase shifts are performed, idle currents flowing across the power amplifying transistors are regulated, depending on the power supply voltage, i.e., the idle currents are decreased when the power supply voltage is high and increased when the power supply voltage is low.

Abstract: A semiconductor integrated circuit includes a demodulating circuit, a plurality of sampling circuits each capable of sampling output signals of the demodulating circuit, a plurality of detection circuits capable of detecting headers of output signals of the sampling circuits, a plurality of processing circuits capable of performing a predetermined data process based on the detection results of the detection circuits, and a circuit capable of determining a match to a preset communication method from results of the header detection by the detection circuits. By performing processes adapted to different communication methods in parallel, time required to establish a connection and enable information to be transmitted/received is reduced.

Abstract: The invention intends to realize a high accuracy of some picoseconds in skew compensation as well as a downsized circuit scale. A phase shifter using analog circuits that allows a downsized circuit scale and a high-accuracy phase shifting is adopted in order to finely shift the phase between a clock signal and a data signal. The phase shifter passes the clock signal or the data signal through a low pass filter having a pass band not higher than the based frequency of the clock signal to extract the frequency factors not higher than the based frequency factors. After dividing the extracted signal into plural signals, the phase shifter inputs the clock signal or the data signal having the phase shifted to plural variable gain amplifiers. Next, the phase shifter inputs the outputs from the variable gain amplifiers to an adder or a subtracter, and inputs the signal after being added or subtracted to a limit amplifier to reshape it into a rectangular wave.

Abstract: An RF power module in which operating voltage is controlled by a control signal based on amplitude information includes a temperature detecting device which is provided over a semiconductor chip formed with an amplifying transistor or a semiconductor chip formed with a power source circuit; and a detector having a hysteresis characteristic which is provided over the semiconductor chip formed with the device or a different semiconductor chip, applies a bias to the temperature detecting device to compare the state of the device at two reference levels, outputs a signal indicating abnormality when judging that the temperature of the semiconductor chip formed with the temperature detecting device is above a predetermined temperature, and outputs a signal indicating normality when judging that the temperature of the semiconductor chip is below a second predetermined temperature lower than the predetermined temperature.

Abstract: The present invention provides a high frequency amplifier suitable for use in a wireless communication system which performs detection of an output level necessary for feedback control by a current detection system, wherein control sensitivity in an area low in transmit request level is lowered so that an output level can be controlled over the whole control range with satisfactory accuracy. There is provided a high frequency power amplification electric part constituting a wireless communication system, which performs detection of an output level necessary for feedback control of output power by a current detection system, compares the output level detected signal and an output level designation signal and generates a bias voltage for a high frequency power amplifier according to the difference therebetween to thereby control gain, wherein an nth root converter or a logarithm converter is provided between a current detector and a current-voltage converter.

Abstract: The present invention provides a high frequency amplifier suitable for use in a wireless communication system which performs detection of an output level necessary for feedback control by a current detection system, wherein control sensitivity in an area low in transmit request level is lowered so that an output level can be controlled over the whole control range with satisfactory accuracy. There is provided a high frequency power amplification electric part constituting a wireless communication system, which performs detection of an output level necessary for feedback control of output power by a current detection system, compares the output level detected signal and an output level designation signal and generates a bias voltage for a high frequency power amplifier according to the difference therebetween to thereby control gain, wherein an nth root converter or a logarithm converter is provided between a current detector and a current-voltage converter.

Abstract: A high-frequency power amplification electronic part is disclosed which comprises a power amplifier circuit and a bias control circuit, the power amplifier circuit having a plurality of amplifier stages for amplifying an input high-frequency signal, the bias control circuit acting to bias the power amplifier circuit. The power amplifier circuit controls output power in accordance with input power that is varied while a gain of the power amplifier circuit is being fixed by either a bias current or a bias voltage supplied from the bias control circuit.

Abstract: In radio communication system that is able to transmit in two or more modulation modes, e.g., one modulation mode when phase shifts are performed and another modulation mode when phase shifts and amplitude shifts are performed, the disclosed invention can avoid that receiving band noise becomes so great not to conform to the GSM standards' prescription for such noise in a high voltage region of the power supply voltage, even when the output power is controlled by changing the amplitude of the input signal to the power amplifier circuitry while fixing the bias voltages to be applied to the power amplifying transistors. When the output power is controlled as above, in the modulation mode (GSM mode) when phase shifts are performed, idle currents flowing across the power amplifying transistors are regulated, depending on the power supply voltage, i.e., the idle currents are decreased when the power supply voltage is high and increased when the power supply voltage is low.

Abstract: The invention intends to realize a high accuracy of some picoseconds in skew compensation as well as a downsized circuit scale. A phase shifter using analog circuits that allows a downsized circuit scale and a high-accuracy phase shifting is adopted in order to finely shift the phase between a clock signal and a data signal. The phase shifter passes the clock signal or the data signal through a low pass filter having a pass band not higher than the based frequency of the clock signal to extract the frequency factors not higher than the based frequency factors. After dividing the extracted signal into plural signals, the phase shifter inputs the clock signal or the data signal having the phase shifted to plural variable gain amplifiers. Next, the phase shifter inputs the outputs from the variable gain amplifiers to an adder or a subtracter, and inputs the signal after being added or subtracted to a limit amplifier to reshape it into a rectangular wave.