Abstract: An Electro-Static-Discharge (ESD) input-protection device has an NPNP structure of a N+ cathode formed in a FINFET fin or highly-doped region over a floating P-well, and a P+ fin or highly-doped region anode formed over a floating N-well that touches the floating P-well. The floating P-well is surrounded by an isolating N-well and has a deep N-well underneath to completely isolate the floating P-well from the p-type substrate. No well taps are formed in the floating wells or in the isolating N-wells. The floating P-well and the floating N-well are thus truly floating at all times. Since the wells are floating, the NPNP structure appears as three junction diodes in series, which has a lower capacitance than a single diode that the NPNP structure would appear as when one of the wells was shorted or biased. During an ESD event the NPNP structure behaves as a single diode.

Abstract: An apparatus and method for performing real object detection and control using a Virtual Reality Head Mounted Display System, and more particularly, when the real object detection and control are detecting hand presence and control in free space, in a virtual reality environment, the control being, for example, gestures or movement, in the free space.

Abstract: For an augmented reality (AR) content creation system having a marker database, when a user requests this system to use a first sub-image of an image to update the marker database, this system computes a suitability score of the first sub-image for rating feature richness of the first sub-image and uniqueness thereof against existing markers in the marker database. When the suitability score is less than a threshold value, a second sub-image of the image having a suitability score not less than the threshold value and completely containing the first sub-image is searched. Then the second sub-image, the suitability score thereof and the suitability score of the first sub-image are substantially-immediately presented to the user for real-time suggesting the user to use the second sub-image instead of the first sub-image as a new marker in updating the marker database to increase feature richness or uniqueness of the new marker.

Abstract: Provided is a method and an apparatus for signaling allocation of resources in a joint transmission communication system. The method includes determining one of a plurality of resource allocation schemes to be implemented by two or more of a plurality of transmission points (TPs) comprising a set of coordinated TPs for enabling said two or more of said TPs to transmit data to a scheduled user equipment (UE). The method may comprise determining a bit length of a resource allocation field for a resource allocation signal message based on a number N of resource blocks groups (RBGs) related to a bandwidth of the joint transmission communication system and a number M of TPs comprising said set of coordinated TPs and further include formatting the resource allocation signal message to provide the resource allocation field based on said determined bit length. The resource allocation signal message is transmitted from only one of said set of coordinated TPs to said scheduled UE.

Abstract: A method that prevents overload to input source and reduces parasitic inductance in an inverter circuit with dead-time control. A sensing capacitor senses temperatures of transistors in the inverter circuit. A delay generator changes delay times in response to receiving the temperatures of the transistors from the sensing capacitor. A dead time generation unit changes the dead times for the transistors in response to changes in the delay times.

Abstract: A programmable-threshold power supply selector has two power-supply inputs VDD1 and VDD2. The higher of these two voltages is pre-selected as a common supply that powers all transistors and circuitry in the programmable-threshold power supply selector, including substrates under transistors. An open-loop decision circuit is very stable since it uses no feedback. A tunable voltage divider divides VDD1 by a programmable divisor. The divided VDD1 is compared to a reference voltage to generate switch-control signals. The switch-control signals drive the gates of p-channel switch transistors that connect either VDD1 or VDD2 to an output supply voltage. The different programmable divisor values effectively cause VDD1 to be compared to a programmable threshold voltage VTH. The switch transistors switch the output supply voltage to VDD2 only when VDD1 falls below VTH. The output supply voltage remains at VDD1 even when VDD1 falls below VDD2, eliminating unnecessary power switching.

Abstract: A Quadrature-In, Quadrature-Out (QIQO) clock divider divides by an odd divisor, such as three. An IQ input clock has in-phase and quadrature differential signals. Four stages of dynamic logic are arranged into a loop, with each stage output being one of four IQ output signals that have 90-degree phase separations. Each stage output drives the gates of a p-channel charging transistor and an n-channel discharging transistor of a next stage. Two p-channel charging logic transistors are in series between the next stage output and the p-channel charging transistor, and two n-channel evaluation transistors are in series between the next stage output and the n-channel discharging transistor. Different pairs of the four IQ input clock signals are applied to their gates. When the prior stage output is low, the stage output is charged. When the prior stage output is high, the stage output discharge timing is determined by the IQ signals.

Abstract: A spatial light modulator (SLM) configured to reduce a fringe field effect (FFE) is provided. The SLM comprises pixels each having a liquid crystal (LC) on a pixel region. At least one pixel is an optimized pixel. The LC of the optimized pixel has an inhomogeneous distribution of pretilt angle or anchoring energy over the pixel region. The inhomogeneous distribution is selected to oppose the FFE. In one embodiment, the optimized pixel is partitioned into an outer region and an interior region. The outer region is an area between the optimized-pixel boundary and a pre-determined distance inwardly therefrom. The inhomogeneous distribution has one value of the pretilt angle or anchoring energy over the outer region and another value over the interior region. In another embodiment, a polymer stabilized network with an inhomogeneous polymerization degree over the pixel region is used to configure the LC layer to oppose the FFE.

Abstract: An integrator in a duty-cycle adjustment circuit has an adjustable charging current provided by a switched current-source array in response to configuration signals from the calibration logic. The integrator's ramp voltage is compared to a threshold voltage by a comparator to generate an output clock. A tunable voltage reference generates a reference voltage that can be tuned by configuration signals from the calibration logic. The reference voltage is divided by a tunable voltage divider, which selects different fractions of the reference voltage for use as the threshold voltage. During calibration, calibration logic repeatedly raises the reference voltage or reduces the charging current from the switched current-source array until a peak voltage of the ramp voltage equals the reference voltage, when a zero duty onset detector detects that the output clock has stopped pulsing. The configuration signals at the zero duty onset condition are stored and used for normal operation.

Abstract: An apparatus and method for performing real object detection and control using a Virtual Reality Head Mounted Display System, and more particularly, when the real object detection and control are detecting hand presence and control in free space, in a virtual reality environment, the control being, for example, gestures or movement, in the free space.

Abstract: In cancer-cell screening, a patient's cells are classified by a convolutional neural network (CNN) to identify abnormal cells. In one approach, a mask having a center more transparent than the mask's periphery is used to mask an input image containing a cell of interest to yield a masked image. Since the cell is usually located around an image center, and since the image often contains irrelevant objects, such as normal cells and micro-organisms, around an image periphery, interference due to the irrelevant objects in training the CNN and in classification is diminished by using the masked image rather than the original one. In another approach, masking is applied to feature maps before classification. In the CNN, this masking is accomplished by convolving each feature map with a convolutional kernel to produce an intermediate feature map followed by chopping off a peripheral region thereof to yield a downsized feature map.

Abstract: Provided is a method of determining Channel State Information (CSI) in a multiple input/multiple output (MIMO) wireless communication system. The CSI may comprise a Precoding Matrix Indicator (PMI) and/or a Rank Indicator (RI). The method comprises, for a matrix of channels comprising a link between a gNodeB (gNB) and a user equipment (UE), determining correlation values between all Discrete Fourier Transform (DFT) vectors and the observations from the channel matrix. The DFT vectors may include the horizontal vector direction and the vertical vector direction. The method includes selecting those DFT vectors in one or more selected vector directions having a correlation value greater than a predefined threshold to thereby identify a subset of all DFT vectors and determining said CSI from the selected subset of DFT vectors.

Abstract: A device for controllably deflecting a first circularly-polarized (CP) light beam from an incident direction with fast response comprises a polarization selector (PS) to adjust the incident light beam's sense of rotation to a desired one to form a second CP light beam, and a polarization grating (PG) to deflect the second CP light beam according to the desired sense of rotation. The PS comprises an optical modulator sandwiched between two quarter-wave plates. The optical modulator has at least one ferroelectric liquid crystal (FLC) half-wave plate (HWP) being reconfigurable in fast axis orientation. The device has a fast response in beam steering due to a short time of reconfiguring the FLC HWP. Based on serially cascading multiple units each being this device, a beam-steering apparatus having fast response and enhanced steering resolution is obtained. The apparatus is usable for enhancing a field of view in projecting an image.

Abstract: An RC oscillator has a variable capacitor that sets the output frequency. The variable capacitor has m binary-weighted switched capacitor arrays, and each binary-weighted switched capacitor array has binary-weighted capacitors. p binary bits are decoded into an m-bit thermometer code that selects one of the m binary-weighted switched capacitor arrays to use n binary bits to switch its binary-weighted capacitors. Other binary-weighted switched capacitor arrays have all their capacitors switched on, or all their capacitors switched off by the thermometer code. The smallest or unit capacitance of each binary-weighted switched capacitor array is adjusted to compensate for the non-linear reciprocal relationship of frequency being proportional to 1/RC. The unit capacitance is increased for each successive binary-weighted switched capacitor array to reset to the ideal linear relationship of the (p,n)-bit code to frequency.

Abstract: The presently claimed invention provides an electrochemical analytical apparatus for electrochemical bath analysis. The apparatus comprise a static electrode and a rotatable unit. As steady liquid flow can be generated on the electrolytic surface of the static electrode by the rotatable unit through rotation, the static disk electrode does not involve any movement during the bath analysis such that the design of the electrical contact in the electrode can be substantially simplified.

Abstract: Two or more power converters are connected in parallel to supply power current to a joining node through connecting resistors. An output voltage before the connecting resistor in each power converter is sampled and divided by a sampling ratio to generate sampled voltages for each power converter. A current sharing circuit for each power converter receives the local sampled voltage and another sampled voltage from another power converter. The current sharing circuit generates an adjustment voltage that is injected into a feedback loop. The adjustment voltage modifies the output voltage of the power converter, adjusting and balancing the power current delivered by that power converter. Power currents from several power converters are reduced and balanced when the same sampling ratio is used for all power converters. Current hogging by one power converter is prevented.

Abstract: A Power-Line Communication (PLC) receiver has a filter, a time domain processor, a frequency-domain processor, and a forward-error-correction decoder. A narrow-band frequency detector attached to the frequency-domain processor examines the frequency-domain signal for a highest-power sub-carrier frequency. This highest power is compared to an average power of all other sub-carriers and a narrow-band interferer is detected when the highest power is significantly above the average. When the interferer is detected N times in a time period, a control layer adds this sub-carrier frequency to a removed list and recalculates filter coefficients to add a notch filter at the frequencies of the removed list. Updated filter coefficients are loaded into the filter to implement notch filters. When the current power of a sub-carrier signal on the removed list falls significantly below the average power, the sub-carrier is deleted from the removed list and coefficients recalculated to remove the notch filter.

Abstract: A compact device useful for measuring an absorption spectrum of a liquid, such as water with organic contaminants, is provided. The device comprises an array of light emitting diodes (LEDs) each emitting light with a unique spectral peak. A reflector shaped as a half ellipsoid reflects the emitted light to form a reference beam. The reflector has an opening to allow part of the emitted light to form a measurement beam after passing through the liquid. Two photodetectors measure the reference beam and the measurement beam to give a reference intensity and a measured intensity, respectively. The LEDs sequentially emit showers of light one-by-one, giving plural pairs of reference and measured intensities for estimating the absorption spectrum. The device receives energy from a separate power-providing device through wireless power transfer. The power-providing device harvests motional energy of the flowing liquid to generate electrical energy.

Abstract: A Sampling Frequency Offset (SFO) tracking and estimation circuit performs SFO compensation on incoming data. A SFO acquisition module makes an initial coarse estimate using a Network Time Base (NTB) from the Media-Access-Controller (MAC) layer, or from the physical layer using adjacent synchronization symbols. A preamble channel estimator compares a frequency-domain preamble symbol to a reference symbol to generate a first channel estimate. As additional symbols are received, converted to the frequency domain, demodulated, and error corrected, the resulting data are re-error-encoded and compared to the same symbol stored before error correction and demodulation to generate a decision feedback channel estimate. The conjugate of the decision feedback channel estimate is multiplied by the last channel estimate to generate a new SFO estimate that is scaled by a filter constant and used to adjust SFO compensation. Each symbol generates a new estimate without using pilots.

Abstract: An Electro-Static-Discharge (ESD) protection device has a Silicon-Controlled Rectifier (SCR) with a triggering PMOS transistor. The SCR is a PNPN structure with a P+ anode/source within a center N-well, a P-substrate, and an outer N-well that connects to a cathode using N+ well taps. The P+ anode/source is both the source of the triggering PMOS transistor and the anode of the SCR. A trigger circuit drives the gate of the triggering PMOS transistor low, turning it on to charge the P+ drain. Since the P+ drain straddles the well boundary, making physical contact with both the center N-well and the P-substrate, holes flow into the P-substrate. The P+ drain is located near guard rings that suppress latch-up. The holes from the P+ drain flood the region under the guard rings, temporarily weakening their effect and reducing the trigger voltage.