Patents Assigned to Infineon Technologies Austria AG
  • Patent number: 11769701
    Abstract: A package includes an electrically conductive carrier, an electronic component on the carrier, an encapsulant encapsulating part of the carrier and the electronic component, an electrically insulating and thermally conductive interface structure covering an exposed surface portion of the carrier, and a protection cap covering at least part of the interface structure. Corresponding methods of manufacturing and operating the package are also described.
    Type: Grant
    Filed: February 15, 2021
    Date of Patent: September 26, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Christian Kasztelan, Nee Wan Khoo
  • Patent number: 11764774
    Abstract: An apparatus comprises a power source connected to a buffer capacitor. The apparatus comprises a first switch connected between the buffer capacitor and a driven switch. The buffer capacitor is charged by the power source when the first switch is turned off. The apparatus comprises a comparator. The comparator monitors the charging of the buffer capacitor. In response to the buffer capacitor reaching a threshold amount of charge, the comparator turns on the first switch to initiate a charge redistribution of charge from the buffer capacitor to the driven switch.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: September 19, 2023
    Assignee: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Simone Fabbro, Davide Giacomini, Wolfgang Frank
  • Patent number: 11764185
    Abstract: A method of soldering includes providing a substrate having a first metal joining surface, providing a semiconductor die having a second metal joining surface, providing a solder preform having a first interface surface and a second interface surface, arranging the solder preform between the substrate and the semiconductor die such that the first interface surface faces the first metal joining surface and such that the second interface surface faces the second metal joining surface, and performing a mechanical pressure-free diffusion soldering process that forms a soldered joint between the substrate and the semiconductor die by melting the solder preform and forming intermetallic phases in the solder. One or both of the first interface surface and the second interface surface has a varying surface profile that creates voids between the solder preform and one or both of the substrate and the semiconductor die before the melting of the solder preform.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: September 19, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Kirill Trunov, Thomas Hendrix
  • Patent number: 11764272
    Abstract: The disclosure relates to a semiconductor device having a first active region, a plurality of elongated gate regions having an elongated extension in a first lateral direction, respectively, a plurality of elongated field plate regions having an elongated extension in the first lateral direction, respectively, and a first additional gate region, wherein a first one of the elongated gate regions is arranged in a first elongated gate trench at a first side of the first active region, and a second one of the elongated gate regions is arranged in a second elongated gate trench at a second side of the first active region, the second side lying opposite to the first side with respect to a second lateral direction, and wherein the first additional gate region is arranged in a first additional gate trench which extends at least proportionately in the second lateral direction through the first active region.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: September 19, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: David Laforet, Cesar Augusto Braz, Alessandro Ferrara, Cédric Ouvrard, Li Juin Yip
  • Patent number: 11764296
    Abstract: A method for fabricating a semiconductor device includes: forming a trench in a first major surface of a semiconductor body having a first conductivity type; forming a gate in the trench; forming a body region of a second conductivity type in the semiconductor body; implanting a second dopant species into a first region of the body region and a first dopant species into a second region of the body region, the first dopant species providing the first conductivity type, the second dopant species being different from the first dopant species and reducing the diffusion of the first dopant species in the semiconductor body; and thermally annealing the semiconductor body to form a source region that includes the first and second dopant species, and to produce a pn-junction between the source and body regions at a depth dpn from the first major surface, wherein 50 nm<dpn<300 nm.
    Type: Grant
    Filed: October 5, 2021
    Date of Patent: September 19, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Anton Mauder, Johannes Georg Laven, Hans-Joachim Schulze, Werner Schustereder
  • Patent number: 11757343
    Abstract: An apparatus includes a soft start manager such as implemented via hardware, software, or a combination of hardware and software. The soft start manager receives input parameter from a power supply; the input parameter (such as output voltage, duty cycle, input voltage, etc.) is associated with conversion of the input voltage into an output voltage that powers a load. The soft start manager monitors a magnitude of the input parameter. Based at least in part on the magnitude of the input parameter, the soft start manager controls a switching period applied to switch circuitry in the power supply.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: September 12, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: David Lewis, Benjamim Tang, Venkat Sreenivas
  • Patent number: 11756917
    Abstract: A method for processing a semiconductor wafer is provided. A semiconductor wafer includes a first main surface and a second main surface. Defects are generated inside the semiconductor wafer to define a detachment plane parallel to the first main surface. Processing the first main surface defines a plurality of electronic semiconductor components. A glass structure is provided which includes a plurality of openings. The glass structure is attached to the processed first main surface, each of the plurality of openings leaving a respective area of the plurality of electronic semiconductor components uncovered. A polymer layer is applied to the second main surface and the semiconductor wafer is split into a semiconductor slice and a remaining semiconductor wafer by cooling the polymer layer beneath its glass transition temperature along the detachment plane. The semiconductor slice includes the plurality of electronic semiconductor components.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: September 12, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Carsten von Koblinski, Daniel Pedone, Matteo Piccin, Roland Rupp, Chiew Li Tai, Jia Yi Wong
  • Patent number: 11757547
    Abstract: An example apparatus as discussed herein includes a first communication circuit and a second communication circuit. A communication link couples the first communication circuit and the second communication circuit. The communication link conveys signals between the first communication circuit and the second communication circuit. The first communication circuit includes a first active inductor set to a first inductance; the first inductance controls a resonant frequency (carrier frequency) of communicating signals from the first communication circuit. The second communication circuit includes a second active inductor set to a second inductance. The second inductance controls a frequency response (such as band-pass resonant frequency) of a band-pass filter in the second communication circuit. The setting of the first inductance and the second inductance aligns the resonant frequency of the transmitted signals with respect to a peak or center frequency passed by the band-pass filter.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: September 12, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Filipe Esteves Tavora, Thomas Ferianz, Gernot Kasebacher
  • Publication number: 20230283273
    Abstract: A method for driving a power transistor includes comparing a measurement signal that is representative of a load current to a comparator threshold that corresponds to an overcurrent threshold; generating a first fault signal when the measurement signal exceeds the comparator threshold for a first time interval; generating a second fault signal when the measurement signal exceeds the comparator threshold for a second time interval that is greater than the first time interval; regulating a control voltage provided to the control terminal of the transistor to turn off the transistor in response to the second fault signal; and in response to the first fault signal, adjusting the control voltage to an adjusted voltage level in order to limit the load current to a reduced current level that is preconfigured to be greater than the overcurrent threshold. The adjusted voltage level is sufficient to maintain the power transistor in an on-state.
    Type: Application
    Filed: March 1, 2022
    Publication date: September 7, 2023
    Applicant: Infineon Technologies Austria AG
    Inventors: Sergio MORINI, Andrea LAMPREDI, Salviano MARINO, Daniele MIATTON
  • Patent number: 11749454
    Abstract: An apparatus comprises: first windings, second windings, a magnetic core, and multiple tap nodes. The first windings are primary windings of a multi-tapped autotransformer. The second windings are secondary windings of the multi-tapped autotransformer. The first windings and the second windings are wrapped around the magnetic core, the second windings disposed in a series connection between the first windings. The multiple tap nodes providing coupling of the first windings and the second windings to a power supply circuit such as a switched-capacitor converter.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: September 5, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Roberto Rizzolatti, Christian Rainer, Otto Wiedenbauer
  • Patent number: 11736022
    Abstract: A power supply includes a primary winding, a secondary winding, a switch, and a controller. The secondary winding is magnetically coupled to the primary winding. The switch is coupled to the secondary winding and controls a state of current through the secondary winding. The controller controls the state of the switch based on an integrator voltage derived from monitoring a voltage from the secondary winding. For example, the controller activates the switch to an ON state in response to detecting a condition in which the magnitude of the monitored voltage of the secondary winding crosses a threshold value such as a magnitude of an output voltage produced from the secondary winding.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: August 22, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Andrey Malinin, Renato Bessegato, Yong Siang Teo
  • Patent number: 11735352
    Abstract: According to one configuration, an inductor device comprises core material and at least a first electrically conductive path. The core material is fabricated from magnetically permeable material. The first electrically conductive path extends axially through the core material from a proximal end of the inductor device to a distal end of the inductor device. The core material is operable to confine first magnetic flux generated from first current flowing through the first electrically conductive path. The inductor device further includes a gap in the core material. The gap (gas or solid material) has a different magnetic permeability than the core material. Inclusion of the gap in the core material provides a way to tune an inductance of the inductor device and increase a magnetic saturation level of the inductor device. The core material includes any number of electrically conductive paths and corresponding gaps.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: August 22, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Danny Clavette, Gerald Deboy, Roberto Rizzolatti, Otto Wiedenbauer, Yong Zhou
  • Patent number: 11728721
    Abstract: A voltage converter powers a load. The voltage converter includes a first power converter and a second power converter. The first power converter produces an intermediate voltage and a first output current derived from an input voltage. The first power converter supplies the intermediate voltage to the second power converter. The second power converter produces a second output current based on the intermediate voltage received from the first power converter. An output node of the voltage converter outputs a sum of the first output current and the second output current to produce an output voltage.
    Type: Grant
    Filed: February 18, 2021
    Date of Patent: August 15, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Stefano Saggini, Mario Ursino, Roberto Rizzolatti, Gerald Deboy
  • Patent number: 11728746
    Abstract: Disclosed is a current source inverter that includes a combination of normally-on and normally-off switches configured to provide free-wheeling paths for current in case of loss of control signals or gate drive power.
    Type: Grant
    Filed: April 14, 2020
    Date of Patent: August 15, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Gerald Deboy, Johann Kolar, Matthias Joachim Kasper, Dominik Bortis, Mattia Guacci
  • Patent number: 11728752
    Abstract: A method of driving a permanent magnet synchronous motor (PMSM) with Field Oriented Control (FOC) includes: generating, by a current controller, control signals for driving motor currents of the PMSM; measuring, by the current controller, current information of the PMSM, including a direct-axis motor current and a quadrature-axis motor current; generating, by a direct-axis current controller, a direct-axis error value based on a difference between a flux weakening reference current and the direct-axis motor current; regulating, by the direct-axis current controller, a direct-axis motor voltage, including generating the direct-axis motor voltage based on the direct-axis error value; and generating and dynamically adapting, by a flux weakening controller, the flux weakening reference current based on changes to the motor load.
    Type: Grant
    Filed: December 7, 2021
    Date of Patent: August 15, 2023
    Assignee: Infineon Technologies Austria AG
    Inventor: Vedant Sadashiv Chendake
  • Patent number: 11728753
    Abstract: According to some embodiments, a method for controlling a motor comprises generating a stall threshold based on a torque generating current parameter associated with the motor. A motor stall condition is identified based on a torque generating voltage parameter associated with the motor violating the stall threshold. Operation of the motor is adjusted responsive to identifying the motor stall condition.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: August 15, 2023
    Assignee: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventor: Vedant Sadashiv Chendake
  • Patent number: 11728737
    Abstract: An apparatus may include an electric power converter and pre-charge circuitry. The electric power converter may include a first circuit, a second circuit and an energy transfer device. The first circuit may be connected to a power supply. The second circuit may be connected to a load. The energy transfer device may have a first side connected to the first circuit and a second side connected to the second circuit. The pre-charge circuitry may be connected to a capacitor of the first circuit. The capacitor may be connected to the first side of the energy transfer device. The pre-charge circuitry may be configured to charge the capacitor during a pre-charge mode of the electric power converter. The electric power converter may be configured to exit the pre-charge mode and enter an energy transfer mode responsive to a charge level of the capacitor reaching a threshold pre-charge level.
    Type: Grant
    Filed: September 20, 2020
    Date of Patent: August 15, 2023
    Assignee: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Daniele Miatton, Kyrylo Cherniak, Hayri Verner Hasou, Erwin Huber, Sergio Morini, Volha Subotskaya
  • Patent number: 11728790
    Abstract: Electronic circuits are disclosed. One electronic circuit includes: a transistor device having a load path and a drive input; a first drive circuit configured to receive a supply voltage and generate a drive signal for the transistor device based on the supply voltage; and a biasing circuit connected in parallel with the load path of the transistor device. The biasing circuit includes a bias voltage circuit configured to receive the supply voltage and generate a bias voltage higher than the supply voltage based on the supply voltage.
    Type: Grant
    Filed: April 4, 2022
    Date of Patent: August 15, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Hans Weber, Franz Hirler, Matteo-Alessandro Kutschak, Andreas Riegler
  • Patent number: 11728250
    Abstract: A semiconductor package includes a first die pad, a first semiconductor die mounted on the first die pad, an encapsulant body of electrically insulating material that encapsulates first die pad and the first semiconductor die, a plurality of package leads that each protrude out of a first outer face of the encapsulant body, a connection lug that protrudes out of a second outer face of the encapsulant body, the second outer face being opposite from the first outer face. The first semiconductor die includes first and second voltage blocking terminals. The connection lug is electrically connected to one of the first and second voltage blocking terminals of the first semiconductor die. A first one of the package leads is electrically connected to an opposite one of the first and second voltage blocking terminals of the first semiconductor die that the first connection lug is electrically connected to.
    Type: Grant
    Filed: May 20, 2021
    Date of Patent: August 15, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Edward Fuergut, Martin Gruber, Herbert Hopfgartner, Bernd Schmoelzer
  • Patent number: 11728427
    Abstract: A semiconductor device is described. The semiconductor device includes: a semiconductor substrate; an electrode structure on or in the semiconductor substrate, the electrode structure including an electrode and an insulating material that separates the electrode from the semiconductor substrate; and a strain-inducing material embedded in the electrode. The electrode structure adjoins a region of the semiconductor substrate through which current flows in a first direction during operation of the semiconductor device. The electrode is under either tensile or compressive stress in the first direction. The strain-inducing material either enhances or at least partly counteracts the stress of the electrode in the first direction. Methods of producing the semiconductor device are also described.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: August 15, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Stefan Karner, Oliver Blank, Günter Denifl, Germano Galasso, Saurabh Roy, Hans-Joachim Schulze, Michael Stadtmueller