Abstract: A semiconductor structure includes a vertical transport logic circuit cell. The vertical transport logic cell includes a first logic gate and at least a second logic gate. The first logic gate includes at least one input terminal and at least one output terminal. The second logic gate includes at least one input terminal and at least one output terminal. One of the input terminal and the output terminal of the first logic gate shares a pitch of the vertical transport logic circuit cell with one of the input terminal and the output terminal of the second logic gate. The first and second logic gates can include the same type or different types of logic functions.

Abstract: Pre-emptive configuration of a fog computing environment for on-demand services is provided. On-demand services are supported by service modules. Traffic related to demand for service modules is monitored and evaluated. The modules are selectively pushed to and removed from edge servers in a fog computing environment in order to efficiently service the demand for machine translation services.

Abstract: A semiconductor structure containing a multiple threshold voltage III-V device is provided. The III-V device includes a III-V compound semiconductor core portion and a III-V compound semiconductor shell portion. The III-V compound semiconductor core and shell portions are virtually defect-free. The III-V compound semiconductor core portion of the III-V device is used for back-gating to achieve multiple threshold voltages. The III-V compound semiconductor shell portion of the III-V device is used as a channel material for a field effect transistor.

Abstract: The present invention provides a thin film transistor structure in which at least a trench is formed in an insulating polymer film formed on a substrate. In the thin film transistor structure, a trench formed in the insulating polymer film accommodates a gate wiring constituted of a plurality of conductive layers. Provided also are a method of manufacturing the thin film transistor structure, and a display device including a thin film transistor array composed of the thin film transistors constituted as described above.

Abstract: There is provided a method for making a wafer comprising the steps of providing a substrate having a first surface, an opposite second surface, and at least one side edge defining a thickness of the substrate, the at least one side edge having a first peripheral region and a second peripheral region adjacent to the first peripheral region. The method includes applying a fluid to the first surface and the first peripheral region of the at least one side edge and removing the opposite second surface and the second peripheral region of the at least one side edge to form a third surface. A semiconductor chip made from the method for making the wafer is also provided.