Abstract: A fully protected H-bridge for a d-c motor consists of two high side MOSFETs and a control and logic IC on a first conductive heat sink all within a first package and two discrete low side MOSFETs. The entire bridge is controlled by the IC. Shoot thru protection is provided for each leg, and a PMW soft start sequence is provided through the control of the low side MOSFETs, programed by an external, chargeable RC circuit. Input signals to the high side MOSFETs select the operation modes. Protective circuits are provided for short circuit current and over current conditions. Sleep mode and braking/non braking control is also provided.

Abstract: An antipinch circuit prevents the motor driven closure of an automotive window if a soft obstacle is compressed between the window and the top of the door frame, and the window is opened in response to the sensing of the obstacle. The circuit measures the motor torque (by measuring motor current) and the motor shaft speed (by measuring motor back EMF). The torque and motor speed are compared to “signatures” of these values in the case of the window closing normally against the top of the door frame, or against an obstacle, and either stopping or reversing the motor rotation accordingly.

Abstract: A photo voltaic generator constructed on an SOI N− layer subdivided into a series of connected isolated tubs whereby the isolated tubs are subdivided by a matrix of trenched wells. A P+ junction is formed into the top surface of each well to define a photo voltaic generator junction for its respective well.

Abstract: A vertical conduction MOSFET having a reduced on resistance RDSON as well as reduced threshold voltage Vth, and an improved resistance to punchthrough and walkout has an extremely shallow source diffusion, of less than 0.3 microns in depth and an extremely shallow channel diffusion, of less than about 3 microns in depth. In a P channel version, phosphorus is implanted into the bottom of a contact trench and into the channel region with an implant energy of 400 keV for a singly charged phosphorus ion or 200 keV for a doubly charged ion, thereby to prevent walkout of the threshold voltage.

Abstract: A trench type power MOSgated device has a plurality of spaced trenches lined with oxide and filled with conductive polysilicon. The tops of the polysilicon fillers are below the top silicon surface and are capped with a deposited oxide the top of which is flush with the top of the silicon. Source regions of short lateral extent extend into the trench walls to a depth below the top of the polysilicon. A trench termination is formed having an insulation oxide liner covered by a polysilicon layer, covered in turn by a deposited oxide.

Abstract: A liquid crystal display device is described in which the TFTs are located directly below the spaces between pixels. The black matrix comprises an array of opaque conductive elements with one such element being above each TFT. The black matrix is incorporated into the TFT structure. By using highly conductive material for the black matrix elements their thickness is held to a minimum, thereby minimizing their impact on planarity. Optionally, this highly conductive layer may be laminated with layers of a non-reflective conductor that makes good ohmic contact to silicon. In one embodiment, metal filled via holes are added that connect the TFTs to the transparent conductive pixel control elements by way of the black matrix layer. In another embodiment, the black matrix layer is connected to be in parallel with the gate electrode, thereby reducing the series resistance of the latter. A process for manufacturing the display is also described.

Abstract: A Schottky diode has a barrier height which is adjusted by boron implant through a titanium silicide Schottky contact and into the underlying N− silicon substrate which receives the titanium silicide contact. The implant is a low energy, of about 10 keV (non critical) and a low dose of less than about 1E12 atoms per cm2 (non-critical).

Abstract: A flip chip structure contains laterally spaced semiconductor devices such as MOSFETs in a common chip. A deep trench isolates the devices. Contacts are connected to the source drain and gate electrode (or other electrodes) and are interconnected as required for a circuit function either within the chip or on the support board. Ball contacts are connected to the electrodes. The opposite surface of the chip to that in which the devices are formed receives a copper or other metal layer which is patterned to increase its area for heat exchange. The surface of the copper is coated with black oxide to increase its ability to radiate heat.

Abstract: A polysilicon FET is built atop a SiC diode to form a MOSgated device. The polysilicon FET includes an invertible layer of polysilicon atop the surface of a SiC diode which has spaced diode diffusions. A MOSgate is formed on the polysilicon layer and the energization of the gate causes an inversion channel in the invertible layer to form a majority carrier conduction path from a top source electrode to a bottom drain electrode. Forward voltage is blocked in part by the polysilicon FET and in larger part by the depletion of the silicon carbide area between the spaced diode diffusions.

Abstract: A MOS-gated semiconductor device is shown and described which includes deep implanted junctions and thick oxide spacers disposed over a substantial portion of common conduction regions.

Abstract: A termination structure for a superjunction device on which the net charge between P pylons in an N− termination region is intentionally unbalanced and is negative. The P pylons in the termination area are further non-uniformly located relative to those in the active area. A field ring which is an extension of the source electrode terminates at a radial mid point of the termination region.

Abstract: A MOSFET that includes short channel regions for a reduced RDSON, and narrowly spaced, relatively deep base regions for an improved breakdown voltage.

Abstract: A lateral conduction superjunction semiconductor device has a plurality of spaced vertical trenches in a junction receiving layer of P− silicon. An N− diffusion lines the walls of the trench and the concentration and thickness of the N− diffusion and P− mesas are arranged to deplete fully in reverse blocking operation. A MOSgate structure is connected at one end of the trenches and a drain is connected at its other end. An N−− further layer or an insulation oxide layer may be interposed between a P−− substrate and the P− junction receiving layer.

Abstract: A fast recovery diode has a single large area P/N junction surrounded by a termination region. The anode contact in contact with the central active area extends over the inner periphery of an oxide termination ring and an EQR metal ring extends over the outer periphery of the oxide termination ring. Platinum atoms are diffused into the back surface of the device. A three mask process is described. An amorphous silicon layer is added in a four mask process, and a plurality of spaced guard rings are added in a five mask process.

Abstract: A composite field ring for a Schottky diode has a low concentration deep portion to increase breakdown voltage withstand and a high concentration, shallow region to enable minority carrier injection during high forward current conduction. The composite ring permits a reduction in the thickness of the epitaxially formed layer which receives the Schottky barrier metal.

Abstract: A driver stage consisting of an N channel FET and a P channel FET are mounted in the same package as the main power FET. The power FET is mounted on a lead frame and the driver FETs are mounted variously on a separate pad of the lead frame or on the main FET or on the lead frame terminals. All electrodes are interconnected within the package by mounting on common conductive surfaces or by wire bonding. The drivers are connected to define either an inverting or non-inverting drive.

Abstract: An electronic ballast circuit for powering a gas discharge lamp is networked with other ballast circuits to provide large scale lighting control on a local or remote basis. The ballast has an interface connectable to a standard PC for receiving commands and obtaining query information. The ballasts can be controlled individually or in groups. The ballast control also can download lighting profiles to a microcontroller in the ballast, and can support lighting control protocols including the DALI standard.

Abstract: The oxide atop a P pad below the gate electrode has a cut completely through the oxide atop the P pad to prevent the drift of contamination ions, such as sodium ions from the periphery of a MOSgated device to the periphery of the active area, thus stabilizing the device threshold voltage under high temperature reverse bias. The cut may be filled with metal.

Abstract: A force-fit diode for high circuit application has a cylindrical constant diameter conductive body which has a tapered top and bottom peripheral edge. An axial conductor extends from one end of the housing. The tapered top and bottom peripheral edges allow the housing to be forced into an opening in the bus, with either the housing bottom or the axial lead being the first to enter the openings.

Abstract: A process for forming an insulation underfill for soldering semiconductor die solder balls by a solder paste on conductive traces on a support surface. The process comprises the screen printing or deposition from a syringe of thermoplastic or thermosetting epoxy columns between the solder balls, to a height equal to the standoff height of the die from the support surface. The assembly is first heated to a temperature at which the plastic becomes semifluid and before the area over which it will spread becomes contaminated with flux residue; and is next heated to the solder paste reflow temperature.