Patents Assigned to Intersil Americas LLC
  • Patent number: 10038382
    Abstract: A voltage regulator including a converter and a modulator. The converter includes a switching circuit coupled to an inductor for converting an input voltage to an output voltage. The modulator controls the switching circuit in a buck mode of operation, a boost mode of operation, and an intermediate buck-boost mode of operation. During the buck-boost mode of operation, the modulator controls the switching circuit during each switching cycle to sequentially switch between three different switching states, including a first switching state that applies the input voltage across the inductor, a second switching state that applies a difference between the input and output voltages across the inductor, and a third switching state that applies the output voltage across the inductor. The modulator is controlled based on voltage applied across or current flowing through the inductor to regulate the output voltage to a target level.
    Type: Grant
    Filed: January 9, 2017
    Date of Patent: July 31, 2018
    Assignee: Intersil Americas LLC
    Inventors: M. Jason Houston, Eric M. Solie
  • Patent number: 10038379
    Abstract: A controller for controlling operation of a switching regulator including a modulator, a discontinuous conduction mode (DCM) controller, an audible DCM (ADCM) controller, and a sub-sonic discontinuous conduction mode (SBDCM) controller. The modulator generally operates in a continuous conduction mode. The DCM controller modifies operation to DCM during low loads. The ADCM controller detects when the switching frequency is less than a super-sonic frequency threshold and modifies operation to maintain the switching frequency at a super-sonic frequency level. The SBDCM controller detects a sub-sonic operating condition during ADCM operation and responsively inhibits operation of the ADCM mode controller to allow a SBDCM mode within a sub-sonic switching frequency range. The SBDCM operating mode allows for efficient connected standby operation. The SBDCM controller allows operation to return to other modes when the switching frequency increases above the subsonic level.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: July 31, 2018
    Assignee: INTERSIL AMERICAS LLC
    Inventors: M. Jason Houston, Steven P. Laur
  • Patent number: 10031078
    Abstract: A system and method for identifying a position of a moving object, regardless of static objects present in the optical field of an active infrared (IR) proximity detector, is provided. Moreover, a modulated light emitting diode (LED) signal is captured and processed through I/Q demodulation. Specifically, the reflections received at an IR sensor are demodulated to generate in-phase (I) and quadrature phase (Q) signals and the derivative of I/Q signals is obtained to isolate motion. For example, an I/Q domain differentiator or a high pass filter is employed to calculate the derivative, which actively remove the effects of all forms of static interference. Further, the phase of the derivative I/Q signals is determined and is utilized to reconstruct the distance at which the motion occurred.
    Type: Grant
    Filed: June 4, 2014
    Date of Patent: July 24, 2018
    Assignee: INTERSIL AMERICAS LLC
    Inventors: David W. Ritter, Itaru Hiromi
  • Patent number: 10008928
    Abstract: A system, DC-DC converter, and compensation method and circuit for a DC-DC converter are disclosed. For example, a compensation circuit for a DC-DC converter is disclosed. The compensation circuit includes an integrator circuit configured to receive and integrate a first voltage signal, a differential difference amplifier circuit coupled to the integrator circuit and configured to generate a first filter transfer function associated with the integrated first voltage signal, and a switched capacitor filter circuit coupled to the differential difference amplifier circuit and configured to generate a second filter transfer function, wherein the differential difference amplifier is further configured to output a second voltage signal responsive to the first filter transfer function and the second filter transfer function. In one implementation, the compensation circuit is a type-III switched capacitor filter (SCF) compensation circuit.
    Type: Grant
    Filed: January 6, 2016
    Date of Patent: June 26, 2018
    Assignee: INTERSIL AMERICAS LLC
    Inventor: Gaurav Bawa
  • Publication number: 20180166992
    Abstract: An electronic system, DC-DC voltage converter, method of operating a buck-boost DC-DC converter, and method for power mode transitioning in a DC-DC voltage converter are disclosed. For example, one method includes receiving a compensated error signal associated with an output voltage of the DC-DC voltage converter, determining a power mode of operation of the DC-DC voltage converter, and if the power mode of operation is a first mode, outputting a first control signal to regulate the output voltage of the DC-DC voltage converter. If the power mode of operation is a second mode, outputting a second control signal to regulate the output voltage of the DC-DC voltage converter, and if the power mode of operation is a third mode, outputting a third control signal to regulate the output voltage of the DC-DC voltage converter.
    Type: Application
    Filed: January 23, 2018
    Publication date: June 14, 2018
    Applicant: Intersil Americas LLC
    Inventor: Michael Jason HOUSTON
  • Patent number: 9991792
    Abstract: Current sensing with RDSON correction is disclosed. In an embodiment, a method comprises: measuring an approximate temperature of a MOS transistor switch by a temperature sensor to yield a measured temperature; calculating a corrected temperature from the measured temperature using a stored temperature sensor gain and offset correction function; measuring a gate drive voltage for the MOS transistor; calculating a voltage correction factor using a stored voltage correction function, wherein the stored voltage correction function is a function of the corrected temperature and the gate drive voltage; measuring a RDSON voltage drop across the MOS transistor switch to yield a measured RDSON voltage drop; and calculating the current using the measured RDSON drop and the voltage correction factor.
    Type: Grant
    Filed: December 16, 2014
    Date of Patent: June 5, 2018
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Robert H. Isham, Thomas Hayes, Andrew L. Webb, Julio Reyes
  • Publication number: 20180145591
    Abstract: One embodiment pertains to a method including transitioning a logic state of at least one enable signal. A first power transistor begins to turn off. A parameter level of the input of the first power transistor is directly sensed. A second power transistor is turned off when the parameter level is less than a threshold level.
    Type: Application
    Filed: November 2, 2017
    Publication date: May 24, 2018
    Applicant: Intersil Americas LLC
    Inventors: Alexandro Leoncini, Edward Kohler, Timmy Lok
  • Patent number: 9977057
    Abstract: A current measurement circuit may include unbuffered inputs, and the current may be sampled directly from the input pins. The input current created from each sample may be cancelled by injecting opposite charge on the subsequent sample. This direct sampling from the pins increases the common mode input range of the sense path without having to build high linearity rail-to-rail input buffers, hence lowering cost and power consumption of the current measurement path. It also allows for high-impedance input sampling. The measurement circuit may include multiple sampling stages, with a first sampling stage implemented as a switched-capacitor based circuit. A compensator circuit coupled in a feedback loop from the output of the first sampling stage to the input pins may be operated to provide the equivalent charge back to the input pins every cycle to cancel the input current required to charge the sampling capacitors of the first sampling stage.
    Type: Grant
    Filed: January 16, 2015
    Date of Patent: May 22, 2018
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Travis J. Guthrie, James R. Toker, Narendra B. Kayathi, Brannon C. Harris
  • Patent number: 9977512
    Abstract: An optical proximity detector includes a driver, light detector, analog front-end, sensor(s) that sense correction factor(s) (e.g., temperature, supply voltage and/or forward voltage drop), and a digital back end. The driver drives the light source to emit light. The light detector produces a light detection signal indicative of a magnitude and a phase of a portion of the emitted light that reflects off an object and is incident on the light detector. The analog front-end receives the light detection signal and outputs a digital light detection signal, or digital in-phase and quadrature-phase signals, which are provided to the digital back-end. The digital back-end performs closed loop correction(s) for dynamic variation(s) in gain and/or phase caused by a portion of the analog front-end, uses polynomial equation(s) and sensed correction factor(s) to perform open loop correction(s) for dynamic variations in temperature, supply voltage and/or forward voltage drop, and outputs a distance value.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: May 22, 2018
    Assignee: Intersil Americas LLC
    Inventors: Itaru Hiromi, Philip V. Golden, Steven Herbst
  • Patent number: 9960236
    Abstract: Methods for forming body contact layouts for semiconductor structures are disclosed. In at least one exemplary embodiment, a method comprises: forming a plurality of gates disposed on a semiconductor layer, each gate extending parallel to a y-axis in a coordinate space; a source region disposed between two of the plurality of gates; a plurality of body contacts disposed in each source region; and wherein a portion of each body contact, adjacent to the gate, has a width extending parallel to the y-axis that is less than the width of the body contact parallel to the y-axis at a distance on an x-axis from the gate.
    Type: Grant
    Filed: November 16, 2016
    Date of Patent: May 1, 2018
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Dev Alok Girdhar, Jeffrey Michael Johnston
  • Publication number: 20180109174
    Abstract: Disclosed herein is a power converter with low step down conversion ratio with improved power conversion efficiency. The power converter includes a first inductor to receive the input voltage, and a second inductor to supply the output voltage to a load. The first inductor and the second inductor are electromagnetically coupled to each other. The power converter further includes a first switch coupled between the first inductor and the second inductor. The first switch is switched according to a pulse having a frequency corresponding to a resonant frequency of (i) a series inductance between the first inductor and the second inductor and (ii) a parallel capacitance across the first switch. The power converter further includes a second switch coupled to the first switch and the second inductor to supply a reference voltage to the second inductor according to another pulse having the frequency.
    Type: Application
    Filed: August 17, 2017
    Publication date: April 19, 2018
    Applicant: Intersil Americas LLC
    Inventors: Sitthipong ANGKITITRAKUL, Jian YIN
  • Patent number: 9930222
    Abstract: A method includes determining whether to switch from a first input video signal to a second input video signal. Upon switching from a first input video signal to a second input video signal, determining whether the current displayed frame has terminated. If the current displayed frame has terminated, process the second video input signal and load data corresponding to the second video input signal from the timing generator, scale and pixel clock registers correspondingly into the timing generator, scaler and pixel clock. Generate a clock signal for the second input video signal. Calculate generator parameter(s) corresponding to the second input video signal. Generate timing control signals for the second input video signal. Determine if a new frame of the second input video signal has occurred. Provide timing control signals and pixel data for the video to be displayed and corresponding the second input video signal.
    Type: Grant
    Filed: February 9, 2017
    Date of Patent: March 27, 2018
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Jeremy Mah, Morgan Tang, Hyoungyon Han
  • Publication number: 20180076641
    Abstract: A voltage error signal is provided to a PWM controller of a voltage regular and used to produce a PWM signal that drives a power stage of the regulator. When operating in an adapter current limit regulation mode, an adapter current sense voltage, indicative of an adapter current, is compared to an adapter current reference voltage to produce an adapter current error signal. A compensator receives the adapter current error signal and outputs a compensated adapter current error signal. The adapter current sense voltage, or a high pass filtered version thereof, is subtracted from the compensated adapter current error signal to produce the voltage error signal provided to the PWM controller. Alternatively, an input voltage, or a high pass filtered version thereof, is added to the compensated adapter current error signal to produce the voltage error signal.
    Type: Application
    Filed: August 28, 2017
    Publication date: March 15, 2018
    Applicant: Intersil Americas LLC
    Inventors: Michael Jason HOUSTON, Lei ZHAO
  • Publication number: 20180076647
    Abstract: The present embodiments relate generally to managing power in a system including a battery, and more particularly to a flexible or hybrid battery charging topology for a system including a battery. In addition to being capable of operating in a conventional narrow voltage DC (NVDC) buck-boost charger mode, it is also capable of operating in a new “turbo power buck-boost” mode, where the input voltage is directly fed to the system load, bypassing the inductor. Compared with the conventional NVDC buck-boost charger topology, the flexible or hybrid topology provided by the present embodiments reduces the inductor size otherwise needed to support new mobile charging protocols, among many other benefits and advantages.
    Type: Application
    Filed: September 11, 2017
    Publication date: March 15, 2018
    Applicant: Intersil Americas LLC
    Inventors: Jia WEI, Gary KIDWELL
  • Patent number: 9912234
    Abstract: Systems and methods for mitigation of resistor nonlinearity errors in a power converter are provided. In at least one embodiment, the power converter comprises at least one power switch coupled to an input voltage, a pulse width modulation (PWM) circuit for generating control pulses for the at least one power switch, at least one output inductor coupled to a respective one of the at least one power switches, a current sensor coupled in parallel with the at least one output inductor, and at least one circuit element. The current sensor comprises at least one capacitor, at least one resistor for each of the at least one output inductors, and is coupled to the PWM circuit at a current bleed node. The at least one circuit element is coupled to the current bleed node and bleeds a bleed current from the current bleed node when a power switch is turned on.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: March 6, 2018
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Warren Richard Schroeder, Thomas Andrew Jochum
  • Publication number: 20180040728
    Abstract: One embodiment is directed towards a method. The method includes forming a drift region of a first conductivity type above or in a substrate. The substrate has first and second surfaces. A first insulator is formed over a first portion of the channel, and which has a first thickness. A second insulator is formed over the second portion of the channel, and which has a second thickness that is less than the first thickness. A first gate is formed over the first insulator. A second gate is formed over the second insulator. A body region of a second conductivity type is formed above or in the substrate.
    Type: Application
    Filed: October 20, 2017
    Publication date: February 8, 2018
    Applicant: Intersil Americas LLC
    Inventor: Dev Alok GIRDHAR
  • Publication number: 20180032096
    Abstract: An embodiment pertains to a method including determining if an amplitude of an error signal has entered steady state. If the amplitude of the error signal has not entered steady state, then amplify with a high gain the amplitude of the AC component of the error signal. If the amplitude of the error signal has entered steady state, then initiate a timer. Determining if the amplitude of the error signal has remained in steady state while the timer runs. If the amplitude of the error signal has remained in steady state while the timer runs, then amplify with a low gain the amplitude of the AC component of the error signal.
    Type: Application
    Filed: October 5, 2017
    Publication date: February 1, 2018
    Applicant: Intersil Americas LLC
    Inventor: David L. BECK
  • Patent number: 9882488
    Abstract: An electronic system, DC-DC voltage converter, method of operating a buck-boost DC-DC converter, and method for power mode transitioning in a DC-DC voltage converter are disclosed. For example, one method includes receiving a compensated error signal associated with an output voltage of the DC-DC voltage converter, determining a power mode of operation of the DC-DC voltage converter, and if the power mode of operation is a first mode, outputting a first control signal to regulate the output voltage of the DC-DC voltage converter. If the power mode of operation is a second mode, outputting a second control signal to regulate the output voltage of the DC-DC voltage converter, and if the power mode of operation is a third mode, outputting a third control signal to regulate the output voltage of the DC-DC voltage converter.
    Type: Grant
    Filed: March 23, 2016
    Date of Patent: January 30, 2018
    Assignee: INTERSIL AMERICAS LLC
    Inventor: Michael Jason Houston
  • Patent number: 9876012
    Abstract: A voltage converter includes an output circuit having a high-side device and a low-side device which can be formed on a single die (a “PowerDie”). The high-side device can include a lateral diffused metal oxide semiconductor (LDMOS) while the low-side device can include a trench-gate vertical diffused metal oxide semiconductor (VDMOS). The voltage converter can further include a controller circuit on a different die which can be electrically coupled to, and co-packaged with the output circuit.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: January 23, 2018
    Assignee: INTERSIL AMERICAS LLC
    Inventor: Francois Hebert
  • Patent number: RE46673
    Abstract: An integrated circuit is disclosed including a primary input for receiving an input voltage, a battery voltage input for receiving a battery voltage signal and an output for providing an output voltage higher than the battery voltage. First circuitry responsive to the input voltage is provided for turning off the output voltage responsive to an input over voltage condition. Second circuitry responsive to the battery voltage signal is provided for turning off the output voltage responsive to a battery over voltage condition. Third circuitry provides for over current protection.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: January 16, 2018
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Zheren Lai, Hsien Yi Chou, Zengjing Wu