Patents Assigned to Interuniversitair Micro-Electronica Centrum VZW
  • Publication number: 20130245606
    Abstract: A hydrogel based occlusion system, a method for occluding vessels, appendages or aneurysms, and a method for hydrogel synthesis are disclosed. The hydrogel based occlusion system includes a hydrogel having a shrunken and a swollen state and a delivery tool configured to deliver the hydrogel to a target occlusion location. The hydrogel is configured to permanently occlude the target occlusion location in the swollen state. The hydrogel may be an electro-activated hydrogel (EAH) which could be electro-activated with a delivery system to control the degree of swelling/shrinking.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 19, 2013
    Applicants: UNIVERSITY COLLEGE CORK, NATIONAL UNIVERSITY OF IRELAND, CORK, UNIVERSITEIT GENT, TECHNISCHE UNIVERSITEIT DELFT, RAMOT AT TEL-AVIV UNIVERSITY, LTD., KATHOLIEKE UNVIVERSITEIT LEUVEN - KU LEUVEN RESEARCH & DEVELOPMENT, INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM VZW
    Inventors: Frank Albert STAM, Nathan JACKSON, Peter DUBRUEL, Kehinde ADESANYA, Anika EMBRECHTS, Eduardo MENDES, JR., Hurcules Pereira NEVES, Paul HERIJGERS, Peter VERBRUGGHE, Yosi SHACHAM, Leeya ENGEL, Viacheslav KRYLOV
  • Patent number: 6518088
    Abstract: A structural shape has an injection molded, three-dimensional substrate composed of an electrically insulating polymer, polymer studs planarly arranged on the underside of the substrate and co-formed during injection molding, outside terminals formed on the polymer studs by a solderable end surface, interconnections fashioned at least on the underside of the substrate that connect the outside terminals to inside terminals, and at least one chip arranged on the substrate and whose terminals are electrically conductively connected to the inside terminals. The structural shape is suitable for single, few or multi chip module and unites the advantages of a ball grid array with the advantages of MID technology (Molded Interconnection Devices). The manufacture and metallization of the polymer studs can take place with minimal additional outlay in the framework of the method steps already required in the MID technology.
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: February 11, 2003
    Assignee: Siemens N.V. and Interuniversitair Micro-Electronica Centrum VZW
    Inventors: Marcel Heerman, Joost Wille, Jozef Puymbroeck Van, Jean Roggen, Eric Beyne, Rita Hoof Van
  • Patent number: 6144586
    Abstract: A method of erasing and a method of programming a nonvolatile memory cell in a chip is disclosed. Said cell comprises a semiconductor substrate including a source and a drain region and a channel therebetween, a floating gate extending over a portion of said channel, a control gate extending over another portion of the channel region, and a program gate capacitively coupled through a dielectric layer to said floating gate. The methods or schemes are using substantially the lowest possible voltage to erase a nonvolatile memory cell of the floating-gate type without having the SILC problem. Therefore, these schemes are expected to allow a further scaling of the minimum feature size of Flash memory products which is necessary for cost reduction and density increase.The present invention also aims to further decrease the voltages necessary to erase/program the memory device without degrading the corresponding performance.
    Type: Grant
    Filed: February 16, 2000
    Date of Patent: November 7, 2000
    Assignee: Interuniversitair Micro-Electronica Centrum, vzw
    Inventors: Jan Van Houdt, Dirk Wellekens
  • Patent number: 6130478
    Abstract: A polymer stud grid array for microwave circuits is proposed which includes an injection-molded, three-dimensional substrate that is fabricated from an electrically insulating polymer. The substrate includes a plurality of polymer studs which are arranged over the underside of the substrate and which are integrally formed with the substrate during the injection-molding process. Signal connections are formed on the studs which include an end surface that is capable of being soldered. Potential connections are formed on at least one of the studs. The potential connection also includes an end surface that is capable of being soldered. Striplines are also constructed which connect the studs to the microwave circuit. Each stripline includes a first structured metal layer disposed on the underside of the substrate, a dielectric layer disposed on the first metal layer and a second structured metal layer disposed on top of the dielectric layer.
    Type: Grant
    Filed: April 18, 1998
    Date of Patent: October 10, 2000
    Assignees: Siemens N.V., Interuniversitair Micro-Electronica-Centrum VZW
    Inventors: Ann Dumoulin, Marcel Heerman, Jean Roggen, Eric Beyne, Rita van Hoof
  • Patent number: 6122172
    Abstract: In order to achieve better dissipation of the heat losses, a polymer stud grid array in proposed havingan injection-molded, three-dimensional substrate (S) composed of an electrically insulating polymer,polymer studs (PS) which are arranged over the area on the underneath of the substrate (S) and are integrally formed during injection molding,external connections which are formed on the polymer studs (PS) by an end surface which can be soldered,conductor runs which are formed at least on the underneath of the substrate (S) and connect the external connections to internal connections,at least one heat sink (WL) which is partially coated during the injection molding of the substrate (S), and havingat least one chip or wiring element (VE) which is arranged on the heat sink (WL) and whose connections are electrically conductively connected to the internal connections.The new configuration is suitable in particular for power components or power modules in a polymer stud grid array package.
    Type: Grant
    Filed: April 16, 1998
    Date of Patent: September 19, 2000
    Assignees: Siemens NV, Interuniversitair Micro-Electronica-Centrum VZW
    Inventors: Ann Dumoulin, Marcel Heerman, Jean Roggen, Eric Beyne, Rita van Hoof
  • Patent number: 5929516
    Abstract: A structural shape has an injection molded, three-dimensional substrate composed of an electrically insulating polymer, polymer studs planarly arranged on the underside of the substrate and co-formed during injection molding, outside terminals formed on the polymer studs by a solderable end surface, interconnections fashioned at least on the underside of the substrate that connect the outside terminals to inside terminals, and at least one chip arranged on the substrate and whose terminals are electrically conductively connected to the inside terminals. The structural shape is suitable for single, few or multi chip module and unites the advantages of a ball grid array with the advantages of MID technology (Molded Interconnection Devices). The manufacture and metallization of the polymer studs can take place with minimal additional outlay in the framework of the method steps already required in the MID technology.
    Type: Grant
    Filed: March 21, 1997
    Date of Patent: July 27, 1999
    Assignees: Siemens N.V., Interuniversitair Micro-Electronica Centrum VZW
    Inventors: Marcel Heerman, Joost Wille, Jozef Van Puymbroeck, Jean Roggen, Eric Beyne, Rita Van Hoof