Abstract: A data recording system includes a host terminal and a data recorder. The host terminal defines a first module card to be corresponding to a first data channel and a first module card slot of the data recorder. The first module card is inserted into the first module card slot, and the data recorder stores a first type of data captured from the first data channel to the first module card. The host terminal has the data recorder stop capturing the first type of data, and defines a second module card to be corresponding to a second data channel and the first module card slot of the data recorder. The data recorder is shut down, and the first module card is dismounted from the first module card slot. The second module card is inserted into the first module card slot, and the data recorder is rebooted.
Abstract: A circuit device includes a positive phase signal line, a negative phase signal line and a single-ended signal line. The positive phase signal line includes a first positive-phase-signal-line terminal and a second positive-phase-signal-line terminal for transmitting a first signal. The negative phase signal line includes a first negative-phase-signal-line terminal and a second negative-phase-signal-line terminal for transmitting a second signal. The single-ended signal line is disposed between the positive phase signal line and the negative phase signal line, and includes a first single-ended signal line terminal and a second single-ended signal line terminal for transmitting a single-ended signal. The first signal of the positive phase signal line causes a first noise on the single-ended signal line. The second signal of the negative phase signal line causes a second noise on the single-ended signal line. The first noise and the second noise eliminate one another.
Abstract: A serial general purpose input/output system includes a transmitter, a cable, a receiver and a verification unit. The transmitter includes an encoder to perform cyclic redundancy check coding on a data to generate a cyclic redundancy check code for verifying the accuracy of the data, and a first serial general purpose input/output connector coupled to the encoder to transmit the data and the cyclic redundancy check code. The receiver includes a second serial general purpose input/output connector coupled to the first serial general purpose input/output connector by the serial general purpose input/output cable to receive the data and the cyclic redundancy check code from the first serial general purpose input/output connector.
Abstract: An electromagnetic shielding structure uses at least one expansion card blank to cover an expansion card window. The expansion card blank includes a plate body, a fixing portion, an abutting portion, and an adjoining portion. The fixing portion and the abutting portion are connected to two opposite sides of the plate body respectively. The adjoining portion is connected to another side of the plate body. The expansion card blank is fixed to the expansion card window through the fixing portion and the abutting portion, so as to cover the expansion card window. In different practical instances, the adjoining portion touches a side fringe portion of the expansion card window, the plate body of another adjacent expansion card blank, or a fixing plate of an adjacent expansion card, so that the expansion card window can be covered completely for electromagnetic shielding.
Abstract: A method for managing traffic item in software defined networking includes establishing a downlink flow table of a switch according to the flow entries, establishing an uplink flow table of the switch according to the flow entries, acquiring a data packet by the switch, and generating a transmission path to allocate the data packet according to the data packet, the downlink flow table, and the uplink flow table. The downlink flow table includes a correlation between first transmission ports of the switch and down link switches. The uplink flow table includes a correlation between the first transmission ports and a transmission port group of uplink switches.
Abstract: A heat dissipation control method is applied to an immersion cooling apparatus for cooling a heat generating member. The immersion cooling apparatus includes a cooling chamber, a fan device, and a pump communicated with the cooling chamber and the fan device for transmitting vapor generated by a cooling solution to the fan device and transmitting the cooling solution to the cooling chamber. The heat generating member is immersed in the cooling solution stored in the cooling chamber. The fan device cools the vapor into liquid. The heat dissipation control method includes utilizing a sensing processor to detect a vapor temperature, the sensing processor preferentially increasing power of the pump when determining the vapor temperature is larger than a maximum of a temperature control range, and the sensing processor preferentially decreasing power of the fan device when determining the vapor temperature is less than a minimum of the temperature control range.
Abstract: An automatic power supply system is electrically coupled to a component to be tested. The automatic power supply system includes a power array and a controller. The power array includes a plurality of power channels, and provides power supplies through the plurality of power channels. The component to be tested is electrically coupled to a first power channel of the plurality of power channels and receives a power supply through the first power channel. The controller is electrically coupled to the power array, and calculates a power of the power supply received by the component to be tested. The controller adjusts a power specification of the power supply provided through the first power channel according to the power.
Abstract: A switching fabric includes a plurality of buses and a plurality of switching devices. A method for operating the switching fabric includes assigning the plurality of buses to be a plurality of peripheral buses and a plurality of computer buses according to a predetermined configuration, establishing electrical connections between the plurality of computer buses and the plurality of peripheral buses according to the predetermined configuration, and when a first computer is coupled to a first computer bus of the plurality of computer buses and performs a peripheral component interconnect express scan function, transmitting types and/or utilization information of a plurality of first peripheral devices corresponding to the first computer bus to the first computer according to the predetermined configuration to make the first computer reserve memory segments required by the plurality of first peripheral devices.
Abstract: A network system control method includes intercepting a flow modification message sent by a controller from a network protocol path between a switch and the controller so as to obtain a new flow entry; accessing a flow table of the switch so as to obtain a plurality of flow entries; inserting at least one redundant flow entry according to the new flow entry and the plurality of flow entries; performing an aggregation operation to the new flow entry, the plurality of flow entries and the at least one redundant flow entry so as to generate a set of aggregated flow entries; and updating the flow table using the set of aggregated flow entries.
Abstract: A power supply array system includes N first receiving devices and a power supply array device capable of generating N voltages. The power supply array device includes M adjustable power control boards, an adjustable input/output circuit board, and a controller. The M adjustable power control boards are used for outputting the N voltages. Each adjustable power control board has a plurality of output terminals. Each output terminal is used for outputting a voltage. The adjustable input/output circuit board is coupled to the plurality of output terminals of each adjustable power control board for detecting a voltage and a current of each output terminal. The controller is used for receiving data of the voltage and the current of the each output terminal of the each power control board accordingly. N and M are two integers greater than two and N>M.
Abstract: After a temperature point of the cooling fan is set according to a plurality of temperatures corresponding to a plurality of first consecutive time intervals, control a duty cycle of the cooling fan according to the temperature point, acquire temperature variation data of the cooling fan during a plurality of second consecutive time intervals, generate a gain factor and a frequency factor of the cooling fan according to the temperature variation data, and generate a proportional gain factor, an integral time factor and a derivative time factor of a proportional-integral-derivative controller of the cooling fan according to the gain factor and the frequency factor of the cooling fan. The plurality of first consecutive time intervals are followed by the plurality of second consecutive time intervals.
Abstract: A flow entry aggregation method of a network system includes classifying a plurality of flow entries into a plurality of partitions according to a plurality of indicators of the plurality of flow entries, wherein each flow entry utilizes ternary strings to represent at least one field of the flow entry and the plurality of indicators are utilized to indicating network requirements corresponding to the plurality of flow entries; and utilizing bit merging or subset merging to compress the flow entries in the same partition.
Abstract: The present disclosure provides a server system including a rack, a rack management controller, host devices, storage devices and two signal switches. The rack management controller generates a controlling signal. The host devices are located in the rack. The storage devices are electrically connected to the host devices respectively, are disposed in the rack and located under the host devices. The two signal switches are electrically connected to the host devices and the rack management controller respectively, each of the signal switches is electrically connected to the storage devices, and the two signal switches are disposed in the rack and located above the host devices. Each of the host devices receives the control signal through the two signal switches, so as to match one of the storage devices, such that each of the host devices performs the access and process operation for the data of the matched storage device thereof.
Abstract: A control method of a control system includes storing output data to a memory according to a buffer pointer when a clock signal converts to a second level from a first level; storing input data to the memory according to the buffer pointer when the clock signal converts to the first level from the second level; and updating the buffer point.
Abstract: A power adapting box and a fan module are provided. The power adapting box includes a box body, a plurality of first power adapters, an expansion socket and a plurality of second power adapters. The first power adapters are disposed in the box body. The expansion socket is detachably disposed in the box body. The second power adapters are disposed in the expansion socket.
Abstract: A control method for controlling a server system includes that a host server sends a first reset signal to a first server, the first server sends a second reset signal to a second server, and so on, till an (n?1)th server sends an nth reset signal to an nth server. The nth server performs a system boot operation of the nth server, then sends a first notification signal to the (n?1)th server. The (n?1)th server performs a system boot operation of the (n?1)th server after receiving the first notification signal, then sends a second notification signal to an (n?2)th server, and so on. After receiving an (n?1)th notification signal, the first server performs a system boot operation of the first server, then the first server sends an nth notification signal to the host server.
Abstract: A hot swap management device includes a bus buffer, a hot swap switch, and a controller. The bus buffer is selectively coupled to a host system management bus of a server. The hot swap switch is coupled to the bus buffer and a hardware expansion device. The controller is coupled to the bus buffer and the hot swap switch. When the hot swap management device is coupled to a board system management bus of the server, the controller assigns a hardware address to the bus buffer. A computational unit of the server controls the hardware expansion device through the host system management bus according to the hardware address.
Abstract: A removable hard disk carrier includes an L-shaped support, a flexible support, and a side support. The flexible support is fixedly connected to an end portion of the L-shaped support. The side support is fixedly connected to an end portion of the flexible support and is detachably engaged with another end portion of the L-shaped support. Therein, after the side support is detachably engaged with the L-shaped support, the L-shaped support, the flexible support, and the side support form an accommodating space therebetween and can fix a hard disk in the accommodating space. When the side support and the L-shaped support are not engaged, the side support can move away from the L-shaped support due to the resilient deformation of the flexible support, so that the hard disk can be detached from the removable hard disk carrier.
Abstract: A multilayer printed circuit board includes an inner circuit layer, a first outer circuit layer, a second outer circuit layer, a via, and a layer of high dielectric dissipation solder resist ink. The first outer circuit layer includes a first trace for transmitting a high frequency signal. The inner circuit layer includes a second trace, and is formed between the first outer circuit layer and the second outer circuit layer. The via is formed from the first outer circuit layer to the second outer circuit layer, and is coupled to the first trace and the second trace. The second trace is coupled to the first trace through the via for transmitting the high frequency signal. The layer of high dielectric dissipation solder resist ink is formed on a terminal of the open stub of the via exposed outside of the second outer circuit layer.
Abstract: An inter-integrated circuit bus arbitration system includes a first master circuit, a second master circuit, an analog switch circuit, an initial state identification circuit, and a selection control circuit. When the first master circuit is initiated to transmit data, the initial state identification circuit generates a first initial pulse signal. When the second master circuit is initiated to transmit data, the initial state identification circuit generates a second initial pulse signal. If the first initial pulse signal leads the second initial pulse signal, the selection control circuit generates a first control signal to make the analog switch circuit establish electrical connections between the first master circuit and an external data line and an external clock line when receiving the first control signal.