Patents Assigned to IXYS Corporation
  • Publication number: 20150102481
    Abstract: Within a cassette of a press pack module, a conductive shim is bonded to the backside of a device die by a layer of sintered metal. The die, sintered metal, and shim together form a sintered assembly. The cassette is compressed between a metal top plate member and a metal bottom plate member such that the backside of the assembly is pressed against the top plate member, and such that the frontside of the assembly is pressed against another shim. A central portion of the frontside surface of the die is contacted on the bottom by the other shim, but there is no shim contacting a peripheral portion of the frontside surface. Despite there being no shim in contact with the peripheral portion of the frontside surface, the peripheral portion is in good thermal contact with the top plate member through the sintered metal and the bonded conductive shim.
    Type: Application
    Filed: October 15, 2013
    Publication date: April 16, 2015
    Applicant: IXYS CORPORATION
    Inventors: Stefan Steinhoff, Philip Townsend
  • Publication number: 20150102383
    Abstract: A press pack module includes a collector module terminal, an emitter module terminal, a gate module terminal, and an auxiliary module terminal. Each IGBT cassette within the module includes a set of shims, two contact pins, and an IGBT die. The first contact pin provides part of a first electrical connection between the gate module terminal and the IGBT gate pad. The second contact pin provides part of a second electrical connection between the auxiliary module terminal and a shim that in turn contacts the IGBT emitter pad. The electrical connection between the auxiliary emitter terminal and each emitter pad of the many IGBTs is a balanced impedance network. The balanced network is not part of the high current path through the module. By supplying a gate drive signal between the gate and auxiliary emitter terminals, simultaneous IGBT turn off in high speed and high current switching conditions is facilitated.
    Type: Application
    Filed: October 15, 2013
    Publication date: April 16, 2015
    Applicant: IXYS Corporation
    Inventors: Ashley Golland, Franklin J. Wakeman, Howard D. Neal
  • Patent number: 8986621
    Abstract: Methods and apparatuses for converting carbon dioxide and treating waste material using a high energy electron beam are disclosed. For example, carbon dioxide and an aqueous reaction solution having a reactant can be combined to form an aqueous reaction mixture, and the aqueous reaction mixture can then be subjected to a high energy electron beam that initiates a reaction between carbon dioxide and the reactant to form a reaction product. Solid or liquid waste material can be treated by, for example, combining carbon dioxide and a solid or liquid waste material having a reactant and then subjecting the carbon dioxide and solid or liquid waste material having a reactant to a high energy electron beam to initiate a reaction between the carbon dioxide and the reactant to form a reaction product.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: March 24, 2015
    Assignee: IXYS Corporation
    Inventor: Nathan Zommer
  • Patent number: 8987911
    Abstract: A packaged power device involves no soft solder and no wire bonds. The direct-bonded metal layers of two direct metal bonded ceramic substrate assemblies, such as Direct Bonded Aluminum (DBA) substrates, are provided with sintered silver pads. Silver nanoparticle paste is applied to pads on the frontside of a die and the paste is sintered to form silver pads. Silver formed by an evaporative process covers the backside of the die. The die is pressed between the two DBAs such that direct silver-to-silver bonds are formed between sintered silver pads on the frontside of the die and corresponding sintered silver pads of one of the DBAs, and such that a direct silver-to-silver bond is formed between the backside silver of the die and a sintered silver pad of the other DBA. After leadforming, leadtrimming and encapsulation, the finished device has exposed ceramic of both DBAs on outside package surfaces.
    Type: Grant
    Filed: December 31, 2013
    Date of Patent: March 24, 2015
    Assignee: IXYS Corporation
    Inventor: Nathan Zommer
  • Patent number: 8901723
    Abstract: A packaged power semiconductor device is provided with voltage isolation between a metal backside and terminals of the device. The packaged power semiconductor device is arranged in an encapsulant defining a hole for receiving a structure for physically coupling the device to an object. A direct-bonded copper (“DBC”) substrate is used to provide electrical isolation and improved thermal transfer from the device to a heatsink. At least one power semiconductor die is mounted to a first metal layer of the DBC substrate. The first metal layer spreads heat generated by the semiconductor die. In one embodiment, the packaged power semiconductor device conforms to a TO-247 outline and is capable of receiving a screw for physically coupling the device to a heatsink.
    Type: Grant
    Filed: April 30, 2013
    Date of Patent: December 2, 2014
    Assignee: IXYS Corporation
    Inventors: Thomas Spann, Holger Ostmann, Kang Rim Choi
  • Patent number: 8900943
    Abstract: A process for fabrication of a power semiconductor device is disclosed in which a single photomask is used to define each of p-conductivity well regions and n-conductivity type source regions. In the process a single photomask is deposited on a layer of polysilicon on a wafer, the polysilicon layer is removed from first regions of the power semiconductor device where the p-conductivity well regions and the n-conductivity type source regions are to be formed, and both p-conductivity type and n-conductivity type dopants are introduced into the wafer through the first regions.
    Type: Grant
    Filed: May 31, 2014
    Date of Patent: December 2, 2014
    Assignee: IXYS Corporation
    Inventors: Kyoung Wook Seok, Jae Yong Choi, Vladimir Tsukanov
  • Publication number: 20140332841
    Abstract: In a first embodiment, an ultra-fast breakover diode has a turn on time TON that is less than 0.3 microseconds, where the forward breakover voltage is greater than +400 volts and varies less than one percent per ten degrees Celsius change. In a second embodiment, a breakover diode has a reverse breakdown voltage that is greater, in absolute magnitude, than the forward breakover voltage, where the forward breakover voltage is greater than +400 volts. In a third embodiment, a string of series-connected breakover diode dice is provided, along with a resistor string, in a packaged circuit. The packaged circuit acts like a single breakover diode having a large forward breakover voltage and a comparably large reverse breakdown voltage, even though the packaged circuit includes no discrete high voltage reverse breakdown diode. The packaged circuit is usable to supply a triggering current to a thyristor in a voltage protection circuit.
    Type: Application
    Filed: May 10, 2013
    Publication date: November 13, 2014
    Applicant: IXYS Corporation
    Inventor: Subhas Chandra Bose Jayappa Veeramma
  • Publication number: 20140332842
    Abstract: In a first embodiment, an ultra-fast breakover diode has a turn on time TON that is less than 0.3 microseconds, where the forward breakover voltage is greater than +400 volts and varies less than one percent per ten degrees Celsius change. In a second embodiment, a breakover diode has a reverse breakdown voltage that is greater, in absolute magnitude, than the forward breakover voltage, where the forward breakover voltage is greater than +400 volts. In a third embodiment, a string of series-connected breakover diode dice is provided, along with a resistor string, in a packaged circuit. The packaged circuit acts like a single breakover diode having a large forward breakover voltage and a comparably large reverse breakdown voltage, even though the packaged circuit includes no discrete high voltage reverse breakdown diode. The packaged circuit is usable to supply a triggering current to a thyristor in a voltage protection circuit.
    Type: Application
    Filed: May 10, 2013
    Publication date: November 13, 2014
    Applicant: IXYS Corporation
    Inventor: Subhas Chandra Bose Jayappa Veeramma
  • Patent number: 8878236
    Abstract: In a first embodiment, an ultra-fast breakover diode has a turn on time TON that is less than 0.3 microseconds, where the forward breakover voltage is greater than +400 volts and varies less than one percent per ten degrees Celsius change. In a second embodiment, a breakover diode has a reverse breakdown voltage that is greater, in absolute magnitude, than the forward breakover voltage, where the forward breakover voltage is greater than +400 volts. In a third embodiment, a string of series-connected breakover diode dice is provided, along with a resistor string, in a packaged circuit. The packaged circuit acts like a single breakover diode having a large forward breakover voltage and a comparably large reverse breakdown voltage, even though the packaged circuit includes no discrete high voltage reverse breakdown diode. The packaged circuit is usable to supply a triggering current to a thyristor in a voltage protection circuit.
    Type: Grant
    Filed: May 10, 2013
    Date of Patent: November 4, 2014
    Assignee: IXYS Corporation
    Inventor: Subhas Chandra Bose Jayappa Veeramma
  • Patent number: 8847328
    Abstract: A power semiconductor module has four power terminals. An IGBT has a collector connected to the first power terminal and an emitter coupled to the third power terminal. An anti-parallel diode is coupled in parallel with the IGBT. A DC-link is connected between the second and fourth power terminals. The DC-link may involve two diodes and two IGBTs, where the IGBTs are connected in a common collector configuration. The first and second power terminals are disposed in a first line along one side of the module, and the third and fourth power terminals are disposed in a second line along the opposite side of the module. Two identical instances of the module can be interconnected together to form a three-level NPC phase leg having low stray inductances, where the phase leg has two parallel DC-links.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: September 30, 2014
    Assignee: IXYS Corporation
    Inventor: Andreas Laschek-Enders
  • Publication number: 20140273357
    Abstract: A process for fabrication of a power semiconductor device is disclosed in which a single photomask is used to define each of p-conductivity well regions and n-conductivity type source regions. In the process a single photomask is deposited on a layer of polysilicon on a wafer, the polysilicon layer is removed from first regions of the power semiconductor device where the p-conductivity well regions and the n-conductivity type source regions are to be formed, and both p-conductivity type and n-conductivity type dopants are introduced into the wafer through the first regions.
    Type: Application
    Filed: May 31, 2014
    Publication date: September 18, 2014
    Applicant: IXYS Corporation
    Inventors: Kyoung Wook Seok, Jae Yong Choi, Vladimir Tsukanov
  • Publication number: 20140273384
    Abstract: A field-effect transistor involves a drain electrode, a drift region, a body region, a source region, a gate insulator layer, and a gate electrode. The drift region is disposed above the drain electrode. The body region extends down into the drift region from a first upper semiconductor surface. The source region is ladder-shaped and extends down in the body region from a second upper semiconductor surface. The first and second upper semiconductor surfaces are substantially planar and are not coplanar. A first portion of the body region is surrounded laterally by a second portion of the body region. The second portion of the body region and the drift region meet at a body-to-drift boundary. The body-to-drift boundary has a central portion that is non-planar. A gate insulator layer is disposed over the source region and a gate electrode is disposed over the gate insulator.
    Type: Application
    Filed: May 30, 2014
    Publication date: September 18, 2014
    Applicant: IXYS Corporation
    Inventor: Kyoung Wook Seok
  • Patent number: 8836090
    Abstract: A power device (such as a power diode) has a peripheral die area and a central area. The main PN junction of the device is formed by a P+ type region that extends down into an N? type layer. The central portion of the P+ type region has a plurality of openings so mesa structures of the underlying N? type material extend up to the semiconductor surface through the openings. Due to the mesa structures being located in the central portion of the die, there are vertically extending extensions of the PN junction in the central portion of the die. Minority carrier charge storage is more uniform per unit area across the surface of the die. Due to the form of the P+ type region and the mesa structures, the reverse recovery of the PN junction exhibits a soft characteristic.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: September 16, 2014
    Assignee: IXYS Corporation
    Inventor: Subhas Chandra Bose Jayappa Veeramma
  • Patent number: 8835975
    Abstract: In a first embodiment, an ultra-fast breakover diode has a turn on time TON that is less than 0.3 microseconds, where the forward breakover voltage is greater than +400 volts and varies less than one percent per ten degrees Celsius change. In a second embodiment, a breakover diode has a reverse breakdown voltage that is greater, in absolute magnitude, than the forward breakover voltage, where the forward breakover voltage is greater than +400 volts. In a third embodiment, a string of series-connected breakover diode dice is provided, along with a resistor string, in a packaged circuit. The packaged circuit acts like a single breakover diode having a large forward breakover voltage and a comparably large reverse breakdown voltage, even though the packaged circuit includes no discrete high voltage reverse breakdown diode. The packaged circuit is usable to supply a triggering current to a thyristor in a voltage protection circuit.
    Type: Grant
    Filed: May 10, 2013
    Date of Patent: September 16, 2014
    Assignee: IXYS Corporation
    Inventor: Subhas Chandra Bose Jayappa Veeramma
  • Publication number: 20140252410
    Abstract: A power semiconductor module has four power terminals. An IGBT has a collector connected to the first power terminal and an emitter coupled to the third power terminal. An anti-parallel diode is coupled in parallel with the IGBT. A DC-link is connected between the second and fourth power terminals. The DC-link may involve two diodes and two IGBTs, where the IGBTs are connected in a common collector configuration. The first and second power terminals are disposed in a first line along one side of the module, and the third and fourth power terminals are disposed in a second line along the opposite side of the module. Two identical instances of the module can be interconnected together to form a three-level NPC phase leg having low stray inductances, where the phase leg has two parallel DC-links.
    Type: Application
    Filed: March 8, 2013
    Publication date: September 11, 2014
    Applicant: IXYS Corporation
    Inventor: Andreas Laschek-Enders
  • Publication number: 20140246761
    Abstract: A power device (such as a power diode) has a peripheral die area and a central area. The main PN junction of the device is formed by a P+ type region that extends down into an N? type layer. The central portion of the P+ type region has a plurality of openings so mesa structures of the underlying N? type material extend up to the semiconductor surface through the openings. Due to the mesa structures being located in the central portion of the die, there are vertically extending extensions of the PN junction in the central portion of the die. Minority carrier charge storage is more uniform per unit area across the surface of the die. Due to the form of the P+ type region and the mesa structures, the reverse recovery of the PN junction exhibits a soft characteristic.
    Type: Application
    Filed: March 1, 2013
    Publication date: September 4, 2014
    Applicant: IXYS Corporation
    Inventor: Subhas Chandra Bose Jayappa Veeramma
  • Publication number: 20140225267
    Abstract: A DBA-based power device includes a DBA (Direct Bonded Aluminum) substrate. An amount of silver nanoparticle paste of a desired shape and size is deposited (for example by micro-jet deposition) onto a metal plate of the DBA. The paste is then sintered, thereby forming a sintered silver feature that is in electrical contact with an aluminum plate of the DBA. The DBA is bonded (for example, is ultrasonically welded) to a lead of a leadframe. Silver is deposited onto the wafer back side and the wafer is singulated into dice. In a solderless silver-to-silver die attach process, the silvered back side of a die is pressed down onto the sintered silver feature on the top side of the DBA. At an appropriate temperature and pressure, the silver of the die fuses to the sintered silver of the DBA. After wirebonding, encapsulation and lead trimming, the DBA-based power device is completed.
    Type: Application
    Filed: April 14, 2014
    Publication date: August 14, 2014
    Applicant: IXYS Corporation
    Inventor: Nathan Zommer
  • Patent number: 8796837
    Abstract: A power device includes a semiconductor chip provided over a substrate, and a patterned lead. The patterned lead includes a raised portion located between a main portion and an end portion. At least part of the raised portion is positioned over the semiconductor chip at a larger height than both the main portion and the end portion. A bonding pad may also be included. The end portion may include a raised portion, bonded portion, and connecting portion. At least part of the bonded portion is bonded to the bonding pad and at least part of the raised portion is positioned over the bonding pad at a larger height than the bonded portion and connecting portion. The end portion may also include a plurality of similarly raised portions.
    Type: Grant
    Filed: September 17, 2009
    Date of Patent: August 5, 2014
    Assignee: IXYS Corporation
    Inventors: Nathan Zommer, Kang Rim Choi
  • Patent number: 8787415
    Abstract: Embodiments for driving a laser diode includes generating a bias current having a duty cycle that is less than 100%. The current level of the bias current is insufficient to turn on the laser diode. A drive current is generated and combined with the bias current to turn on the laser diode almost instantly.
    Type: Grant
    Filed: June 11, 2010
    Date of Patent: July 22, 2014
    Assignee: IXYS Corporation
    Inventor: James Budai
  • Publication number: 20140183716
    Abstract: A packaged power device involves no soft solder and no wire bonds. The direct-bonded metal layers of two direct metal bonded ceramic substrate assemblies, such as Direct Bonded Aluminum (DBA) substrates, are provided with sintered silver pads. Silver nanoparticle paste is applied to pads on the frontside of a die and the paste is sintered to form silver pads. Silver formed by an evaporative process covers the backside of the die. The die is pressed between the two DBAs such that direct silver-to-silver bonds are formed between sintered silver pads on the frontside of the die and corresponding sintered silver pads of one of the DBAs, and such that a direct silver-to-silver bond is formed between the backside silver of the die and a sintered silver pad of the other DBA. After leadforming, leadtrimming and encapsulation, the finished device has exposed ceramic of both DBAs on outside package surfaces.
    Type: Application
    Filed: December 31, 2013
    Publication date: July 3, 2014
    Applicant: IXYS Corporation
    Inventor: Nathan Zommer